ONSEMI MC1488DR2

MC1488
Quad Line EIA−232D Driver
The MC1488 is a monolithic quad line driver designed to interface
data terminal equipment with data communications equipment in
conformance with the specifications of EIA Standard No. EIA−232D.
Features
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• Current Limited Output
± 10 mA typical
• Power−Off Source Impedance
300 W minimum
1
• Simple Slew Rate Control with External Capacitor
• Flexible Operating Supply Range
• Compatible with All ON Semiconductor MDTL and MTTL Logic
•
SOIC−14
D SUFFIX
CASE 751A
14
Families
Pb−Free Packages are Available
PDIP−14
P SUFFIX
CASE 646
14
1
SOEIAJ−14
M SUFFIX
CASE 965
14
1
PIN CONNECTIONS
Line Driver
MC1488
Interconnecting
Cable
MDTL Logic Input
Interconnecting
Cable
VEE 1
Line Receiver
MC1489
MDTL Logic Output
14 VCC
Input A 2
13 Input D1
Output A 3
12 Input D2
Input B1 4
11 Output D
Input B2 5
10 Input C1
Output B 6
9 Input C2
Gnd 7
8 Output C
Figure 1. Simplified Application
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
October, 2006 − Rev. 8
1
Publication Order Number:
MC1488/D
MC1488
VCC 14
6.2 k
8.2 k
Pins 4, 9, 12 or 2
Input
Input
Pins 5, 10, 13
70
300
Output
Pins 6, 8, 11 or 3
3.6 k
GND 7
10 k
7.0 k
VEE 1
Figure 2. Circuit Schematic
(1/4 of Circuit Shown)
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2
70
MC1488
MAXIMUM RATINGS (TA = + 25°C, unless otherwise noted.)
Symbol
Value
Unit
Power Supply Voltage
Rating
VCC
VEE
+ 15
− 15
Vdc
Input Voltage Range
VIR
− 15 p VIR p
7.0
Vdc
Output Signal Voltage
VO
± 15
Vdc
PD
1/RqJA
1000
6.7
mW
mW/°C
Power Derating (Package Limitation, SO−14 and Plastic Dual−In−Line Package)
Derate above TA = + 25°C
Operating Ambient Temperature Range
TA
0 to + 75
°C
Storage Temperature Range
Tstg
− 65 to + 175
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
ELECTRICAL CHARACTERISTICS (VCC = + 9.0 ± 1% Vdc, VEE = − 9.0 ± 1% Vdc, TA = 0 to 75°C, unless otherwise noted.)
Symbol
Min
Typ
Max
Unit
Input Current − Low Logic State (VIL = 0)
Characteristic
IIL
−
1.0
1.6
mA
Input Current − High Logic State (VIH = 5.0 V)
IIH
−
−
10
mA
+ 6.0
+ 9.0
+ 7.0
+ 10.5
−
−
− 6.0
− 9.0
− 7.0
− 10.5
−
−
Output Voltage − High Logic State
(VIL = 0.8 Vdc, RL = 3.0 kW , VCC = + 9.0 Vdc, VEE = − 9.0 Vdc)
(VIL = 0.8 Vdc, RL = 3.0 kW , VCC = + 13.2 Vdc, VEE = − 13.2 Vdc)
VOH
Output Voltage − Low Logic State
(VIH = 1.9 Vdc, RL = 3.0 kW , VCC = + 9.0 Vdc, VEE = − 9.0 Vdc)
(VIH = 1.9 Vdc, RL = 3.0 kW , VCC = + 13.2 Vdc, VEE = − 13.2 Vdc)
VOL
Positive Output Short−Circuit Current, Note 1
IOS +
+ 6.0
+ 10
+ 12
Negative Output Short−Circuit Current, Note 1
IOS −
− 6.0
− 10
− 12
mA
ro
300
−
−
Ohms
−
−
−
−
−
−
+ 15
+ 4.5
+ 19
+ 5.5
−
−
+ 20
+ 6.0
+ 25
+ 7.0
+ 34
+ 12
−
−
−
−
−
−
− 13
−
− 18
−
−
−
− 17
− 500
− 23
− 500
− 34
− 2.5
−
−
−
−
333
576
275
350
ns
Output Resistance (VCC = VEE = 0, ⎥ VO ⎜ = ± 2.0 V)
Positive Supply Current (RI = ∞)
(VIH = 1.9 Vdc, VCC = + 9.0 Vdc)
(VIL = 0.8 Vdc, VCC = + 9.0 Vdc)
(VIH = 1.9 Vdc, VCC = + 12 Vdc)
(VIL = 0.8 Vdc, VCC = + 12 Vdc)
(VIH = 1.9 Vdc, VCC = + 15 Vdc)
(VIL = 0.8 Vdc, VCC = + 15 Vdc)
ICC
Negative Supply Current (RL = ∞)
(VIH = 1.9 Vdc, VEE = − 9.0 Vdc)
(VIL = 0.8 Vdc, VEE = − 9.0 Vdc)
(VIH = 1.9 Vdc, VEE = − 12 Vdc)
(VIL = 0.8 Vdc, VEE = − 12 Vdc)
(VIH = 1.9 Vdc, VEE = − 15 Vdc)
(VIL = 0.8 Vdc, VEE = − 15 Vdc)
IEE
Power Consumption
(VCC = 9.0 Vdc, VEE = − 9.0 Vdc)
(VCC = 12 Vdc, VEE = − 12 Vdc)
PC
Vdc
Vdc
mA
mA
mA
mA
mA
mA
mA
mA
mW
SWITCHING CHARACTERISTICS (VCC = + 9.0 ± 1% Vdc, VEE = − 9.0 ± 1% Vdc, TA = + 25°C.)
Propagation Delay Time (zI = 3.0 k and 15 pF)
Fall Time
tPLH
−
(zI = 3.0 k and 15 pF)
tTHL
−
45
75
ns
Propagation Delay Time (zI = 3.0 k and 15 pF)
tPHL
−
110
175
ns
Rise Time
tTLH
−
55
100
ns
(zI = 3.0 k and 15 pF)
1. Maximum Package Power Dissipation may be exceeded if all outputs are shorted simultaneously.
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3
MC1488
CHARACTERISTIC DEFINITIONS
9.0 V
−9.0 V
14
9.0 V
1
14
1.9 V
5
2
1
2
3
4
6
9
8
12
11
VOL
10
4
−9.0 V
9
VOH
3.0 k
13
12
0.8 V
VOH
7
7
VOL
IIL
IIH
5.0 V
Figure 3. Input Voltage
VCC
Figure 4. Output Current
VEE
14
14
1.9 V
7
1
1
2
IOS +
2
3
4
6
9
8
3
VO
± 2.0 Vdc
4
6
5
IOS ±
8
± 6.6 mA Max
9
IOS −
11
10
12
11
12
13
7
0.8 V
Figure 5. Output Short−Circuit Current
Figure 6. Output Resistance (Power Off)
VCC
ein
2
VIH
VO
ICC
1.9 V
3.0 k
14
4
3.0 V
7
1.5 V
9
VIL
ein
12
0V
tPHL
1
tPLH
VO
0.8 V
15 pF
50%
IEE
tTHL
tTLH
tTHL and tTLH Measured 10% to 90%
VEE
Figure 7. Power Supply Currents
Figure 8. Switching Response
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4
MC1488
12
VCC = VEE = ± 12 V
9.0
V O , OUTPUT VOLTAGE (V)
I SC , SHORT CIRCUIT OUTPUT CURRENT (mA)
TYPICAL CHARACTERISTICS
(TA = +25°C, unless otherwise noted.)
VCC = VEE = ± 9.0 V
6.0
VCC = VEE = ± 6.0 V
3.0
VI
0
VO
−3.0
3.0 k
−6.0
−9.0
−12
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
12
9.0
IOS +
6.0
VCC = 9.0 V
1.9 V
3.0
VI
0
−3.0
0.8 V
VEE = 9.0 V
−6.0
IOS −
−9.0
−12
−55
0
25
75
125
Vin, INPUT VOLTAGE (V)
T, TEMPERATURE (°C)
Figure 9. Transfer Characteristics
versus Power Supply Voltage
Figure 10. Short Circuit Output Current
versus Temperature
20
1000
IO , OUTPUT CURRENT (mA)
100
10
VI
VO
CL
1.0
1.0
10
100
1,000
10,000
12
3.0 kW LOAD LINE
8.0
4.0
0
−4.0
−8.0
1.9 V
−12
IOS
VI
+
VO
−16 0.8 V VCC = VEE = ± 9.0V −
−20
−16
−12
−8.0
−4.0
0
4.0
8.0
CL, CAPACITANCE (pF)
VO, OUTPUT VOLTAGE (V)
Figure 11. Output Slew Rate
versus Load Capacitance
Figure 12. Output Voltage and
Current−Limiting Characteristics
VCC , VEE , POWER SUPPLY VOLTAGE (V)
SLEW RATE (V/s)
μ
16
16
14
VCC
14
12
3 3.0 k
10
6 3.0 k
8.0
8 3.0 k
6.0
11 3.0 k
4.0
7
2.0
0
−55
1
VEE
0
25
75
T, TEMPERATURE (°C)
Figure 13. Maximum Operating Temperature
versus Power Supply Voltage
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5
125
12
16
MC1488
APPLICATIONS INFORMATION
The Electronic Industries Association EIA−232D
specification details the requirements for the interface
between data processing equipment and data
communications equipment. This standard specifies not
only the number and type of interface leads, but also the
voltage levels to be used. The MC1488 quad driver and its
companion circuit, the MC1489 quad receiver, provide a
complete interface system between DTL or TTL logic levels
and the EIA−232D defined levels. The EIA−232D
requirements as applied to drivers are discussed herein.
The required driver voltages are defined as between
5.0 and 15 V in magnitude and are positive for a Logic “0”
and negative for a Logic “1.” These voltages are so defined
when the drivers are terminated with a 3000 to 7000 W
resistor. The MC1488 meets this voltage requirement by
converting a DTL/TTL logic level into EIA−232D levels
with one stage of inversion.
The EIA−232D specification further requires that
during transitions, the driver output slew rate must not
exceed 30 V per microsecond. The inherent slew rate of the
MC1488 is much too fast for this requirement. The current
limited output of the device can be used to control this slew
rate by connecting a capacitor to each driver output. The
required capacitor can be easily determined by using the
relationship C = IOS x DT/DV from which Figure 14 is
derived. Accordingly, a 330 pF capacitor on each output
will guarantee a worst case slew rate of 30 V per
microsecond.
power supply designs, a loss of system power causes a low
impedance on the power supply outputs. When this occurs,
a low impedance to ground would exist at the power inputs
to the MC1488 effectively shorting the 300 W output
resistors to ground. If all four outputs were then shorted to
plus or minus 15 V, the power dissipation in these resistors
would be excessive. Therefore, if the system is designed to
permit low impedances to ground at the power supplies of
the drivers, a diode should be placed in each power supply
lead to prevent overheating in this fault condition. These two
diodes, as shown in Figure 15, could be used to decouple all
the driver packages in a system. (These same diodes will
allow the MC1488 to withstand momentary shorts to the
±25 V limits specified in the earlier Standard EIA−232B.)
The addition of the diodes also permits the MC1488 to
withstand faults with power supplies of less than the 9.0 V
stated above.
VCC
14
14
14
MC1488
MC1488
MC1488
1000
SLEW RATE (V/s)
μ
7
100
1
7
1
7
1
VEE
30 V/ms
Figure 15. Power Supply Protection
to Meet Power Off Fault Conditions
10
The maximum short circuit current allowable under
fault conditions is more than guaranteed by the previously
mentioned 10 mA output current limiting.
333 pF
1.0
1.0
10
100
1,000
Other Applications
10,000
The MC1488 is an extremely versatile line driver with
a myriad of possible applications. Several features of the
drivers enhance this versatility:
1. Output Current Limiting − this enables the circuit
designer to define the output voltage levels independent of
power supplies and can be accomplished by diode
clamping of the output pins. Figure 16 shows the MC1488
used as a DTL to MOS translator where the high level
voltage output is clamped one diode above ground. The
resistor divider shown is used to reduce the output voltage
below the 300 mV above ground MOS input level limit.
C, CAPACITANCE (pF)
Figure 14. Slew Rate versus Capacitance
for ISC = 10 mA
The interface driver is also required to withstand an
accidental short to any other conductor in an
interconnecting cable. The worst possible signal on any
conductor would be another driver using a plus or minus
15 V, 500 mA source. The MC1488 is designed to
indefinitely withstand such a short to all four outputs in a
package as long as the power supply voltages are greater
than 9.0 V (i.e., VCC q 9.0 V; VEE p − 9.0 V). In some
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6
MC1488
2. Power Supply Range − as can be seen from the
schematic drawing of the drivers, the positive and negative
driving elements of the device are essentially independent
and do not require matching power supplies. In fact, the
positive supply can vary from a minimum 7.0 V (required for
driving the negative pulldown section) to the maximum
specified 15 V. The negative supply can vary from
approximately − 2.5 V to the minimum specified − 15 V. The
MC1488 will drive the output to within 2.0 V of the positive
or negative supplies as long as the current output limits are not
exceeded. The combination of the current limiting and supply
voltage features allow a wide combination of possible outputs
within the same quad package. Thus if only a portion of the
four drivers are used for driving EIA−232D lines, the
remainder could be used for DTL to MOS or even DTL to
DTL translation. Figure 17 shows one such combination.
12 V
1/4 MC1488
MDTL
MTTL
Input
MOS Output
(with VSS = GND)
1.0 k
10 k
−12 V
MDTL
Input
2
MDTL
NAND
Gate
Input
4
MDTL
MHTL
Input
−12 V
MDTL
MMOS
Input
Figure 16. MDTL/MTTL−to−MOS Translator
3
5
9
MRTL Output
−0.7 V to +3.7 V
6
3.0 V
8
5.0 V
MDTL Output
−0.7 V to +5.7 V
MC1488
MHTL Output
−0.7 V to 10 V
10
12
11
MOS Output
−10 V to 0 V
1.0 k
13
10 k
1
−12 V
7
14
12 V
Figure 17. Logic Translator Applications
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7
MC1488
ORDERING INFORMATION
Device
Package
MC1488D
SOIC−14
MC1488DG
SOIC−14
(Pb−Free)
MC1488DR2
SOIC−14
MC1488DR2G
SOIC−14
(Pb−Free)
MC1488P
PDIP−14
MC1488PG
PDIP−14
(Pb−Free)
Operating Temperature Range
55 Units/Rail
2500/Tape & Reel
TA = 0 to +75°C
MC1488M
SOEIAJ−14
MC1488MG
SOEIAJ−14
(Pb−Free)
MC1488MEL
SOEIAJ−14
MC1488MELG
SOEIAJ−14
(Pb−Free)
25 Units/Rail
50 Units/Rail
2000/Tape & Reel
MARKING DIAGRAMS
SOIC−14
D SUFFIX
CASE 751A
14
1
PDIP−14
P SUFFIX
CASE 646
14
MC1488G
AWLYWW
Shipping
14
MC1488DG
AWLYWW
MC1488P
AWLYYWWG
1
1
SOEIAJ−14
M SUFFIX
CASE 965
MC1488
ALYWG
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
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8
MC1488
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−A−
14
8
−B−
P 7 PL
0.25 (0.010)
M
7
1
G
−T−
D 14 PL
0.25 (0.010)
T B
S
A
DIM
A
B
C
D
F
G
J
K
M
P
R
J
M
K
M
F
R X 45 _
C
SEATING
PLANE
B
M
S
SOLDERING FOOTPRINT*
7X
7.04
14X
1.52
1
14X
0.58
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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9
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337 0.344
0.150 0.157
0.054 0.068
0.014 0.019
0.016 0.049
0.050 BSC
0.008 0.009
0.004 0.009
0_
7_
0.228 0.244
0.010 0.019
MC1488
PACKAGE DIMENSIONS
PDIP−14
CASE 646−06
ISSUE P
14
8
1
7
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
B
A
F
L
N
C
−T−
SEATING
PLANE
H
G
D 14 PL
J
K
0.13 (0.005)
M
M
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10
DIM
A
B
C
D
F
G
H
J
K
L
M
N
INCHES
MIN
MAX
0.715
0.770
0.240
0.260
0.145
0.185
0.015
0.021
0.040
0.070
0.100 BSC
0.052
0.095
0.008
0.015
0.115
0.135
0.290
0.310
−−−
10 _
0.015
0.039
MILLIMETERS
MIN
MAX
18.16
19.56
6.10
6.60
3.69
4.69
0.38
0.53
1.02
1.78
2.54 BSC
1.32
2.41
0.20
0.38
2.92
3.43
7.37
7.87
−−−
10 _
0.38
1.01
MC1488
PACKAGE DIMENSIONS
SOEIAJ−14
CASE 965−01
ISSUE A
14
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
LE
8
Q1
E HE
M_
L
7
1
DETAIL P
Z
D
VIEW P
A
e
A1
b
0.13 (0.005)
c
M
0.10 (0.004)
DIM
A
A1
b
c
D
E
e
HE
0.50
LE
M
Q1
Z
MILLIMETERS
MIN
MAX
−−−
2.05
0.05
0.20
0.35
0.50
0.10
0.20
9.90
10.50
5.10
5.45
1.27 BSC
7.40
8.20
0.50
0.85
1.10
1.50
10 _
0_
0.70
0.90
−−−
1.42
INCHES
MIN
MAX
−−−
0.081
0.002
0.008
0.014
0.020
0.004
0.008
0.390
0.413
0.201
0.215
0.050 BSC
0.291
0.323
0.020
0.033
0.043
0.059
10 _
0_
0.028
0.035
−−−
0.056
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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For additional information, please contact your local
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MC1488/D