LM833 Low Noise, Audio Dual Operational Amplifier The LM833 is a standard low−cost monolithic dual general−purpose operational amplifier employing Bipolar technology with innovative high−performance concepts for audio systems applications. With high frequency PNP transistors, the LM833 offers low voltage noise (4.5 nV/ Hz ), 15 MHz gain bandwidth product, 7.0 V/ms slew rate, 0.3 mV input offset voltage with 2.0 mV/°C temperature coefficient of input offset voltage. The LM833 output stage exhibits no dead−band crossover distortion, large output voltage swing, excellent phase and gain margins, low open loop high frequency output impedance and symmetrical source/sink AC frequency response. For an improved performance dual/quad version, see the MC33079 family. Features • • • • • • • • • http://onsemi.com MARKING DIAGRAMS 8 1 1 Low Voltage Noise: 4.5 nV/ ǸHz LM833N A WL YY WW G High Gain Bandwidth Product: 15 MHz High Slew Rate: 7.0 V/ms Low Input Offset Voltage: 0.3 mV Low T.C. of Input Offset Voltage: 2.0 mV/°C Low Distortion: 0.002% Excellent Frequency Stability Dual Supply Operation Pb−Free Packages are Available = Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package MAXIMUM RATINGS Supply Voltage (VCC to VEE) Symbol Value Unit VS +36 V VIDR 30 V Input Voltage Range (Note 1) VIR ±15 V Output Short Circuit Duration (Note 2) tSC Indefinite Operating Ambient Temperature Range TA −40 to +85 °C Operating Junction Temperature TJ +150 °C Storage Temperature Tstg −60 to +150 °C ESD Protection at any Pin − Human Body Model − Machine Model Vesd Input Differential Voltage Range (Note 1) Maximum Power Dissipation (Notes 2 and 3) December, 2005 − Rev. 5 LM833 A L Y W G = Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package PIN CONNECTIONS Output 1 1 2 1 8 VCC 7 Output 2 Inputs 1 3 500 mW Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Either or both input voltages must not exceed the magnitude of VCC or VEE. 2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded (see power dissipation performance characteristic). 3. Maximum value at TA ≤ 85°C. © Semiconductor Components Industries, LLC, 2005 1 V 600 200 PD LM833 ALYW G SOIC−8 D SUFFIX CASE 751 1 Rating LM833N AWL YYWWG PDIP−8 N SUFFIX CASE 626 1 6 Inputs 2 2 VEE 4 5 (Top View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. Publication Order Number: LM833/D LM833 ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = −15 V, TA = 25°C, unless otherwise noted.) Characteristic Symbol Min Typ Max Unit VIO − 0.3 5.0 mV DVIO/DT − 2.0 − mV/°C Input Offset Current (VCM = 0 V, VO = 0 V) IIO − 10 200 nA Input Bias Current (VCM = 0 V, VO = 0 V) IIB − 300 1000 nA Common Mode Input Voltage Range VICR − −12 +14 −14 +12 − V Large Signal Voltage Gain (RL = 2.0 kW, VO = ±10 V) AVOL 90 110 − dB Output Voltage Swing: RL = 2.0 kW, VID = 1.0 V RL = 2.0 kW, VID = 1.0 V RL = 10 kW, VID = 1.0 V RL = 10 kW, VID = 1.0 V VO+ VO− VO+ VO− 10 − 12 − 13.7 −14.1 13.9 −14.7 − −10 − −12 Common Mode Rejection (Vin = ±12 V) CMR 80 100 − Power Supply Rejection (VS = 15 V to 5.0 V, −15 V to −5.0 V) PSR 80 115 − dB ID − 4.0 8.0 mA Input Offset Voltage (RS = 10 W, VO = 0 V) Average Temperature Coefficient of Input Offset Voltage RS = 10 W, VO = 0 V, TA = Tlow to Thigh V Power Supply Current (VO = 0 V, Both Amplifiers) dB AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = −15 V, TA = 25°C, unless otherwise noted.) Characteristic Symbol Min Typ Max Unit SR 5.0 7.0 − V/ms GBW 10 15 − MHz Unity Gain Frequency (Open Loop) fU − 9.0 − MHz Unity Gain Phase Margin (Open Loop) qm − 60 − ° Equivalent Input Noise Voltage (RS = 100 W, f = 1.0 kHz) en − 4.5 − nVń ǸHz Equivalent Input Noise Current (f = 1.0 kHz) in − 0.5 − pAń ǸHz Power Bandwidth (VO = 27 Vpp, RL = 2.0 kW, THD ≤ 1.0%) BWP − 120 − kHz Distortion (RL = 2.0 kW, f = 20 Hz to 20 kHz, VO = 3.0 Vrms, AV = +1.0) THD − 0.002 − % CS − −120 − dB Slew Rate (Vin = −10 V to +10 V, RL = 2.0 kW, AV = +1.0) Gain Bandwidth Product (f = 100 kHz) 1000 800 IIB , INPUT BIAS CURRENT (nA) PD , MAXIMUM POWER DISSIPATION (mW) Channel Separation (f = 20 Hz to 20 kHz) 600 400 200 0 −50 0 50 100 TA, AMBIENT TEMPERATURE (°C) VCC = +15 V VEE = −15 V VCM = 0 V 800 600 400 200 0 −55 150 Figure 1. Maximum Power Dissipation versus Temperature −25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 Figure 2. Input Bias Current versus Temperature http://onsemi.com 2 LM833 10 TA = 25°C I S , SUPPLY CURRENT (mA) I IB , INPUT BIAS CURRENT (nA) 800 600 400 200 0 5.0 10 15 VCC, |VEE|, SUPPLY VOLTAGE (V) 8.0 6.0 RL = ∞ TA = 25°C VO + VEE 4.0 2.0 0 20 VCC IS 0 5.0 Figure 3. Input Bias Current versus Supply Voltage 110 VCC = +15 V VEE = −15 V RL = 2.0 kW 105 100 95 90 −55 −25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 RL = 2.0 kW TA = 25°C 100 90 80 5.0 125 100 45 80 Phase 40 20 VCC = +15 V VEE = −15 V RL = 2.0 kW TA = 25°C Gain 135 0 1.0 10 100 1.0 k 10 k 100 k f, FREQUENCY (Hz) 90 1.0 M 180 10 M GBW, GAIN BANDWIDTH PRODUCT (MHz) 0 60 10 15 VCC, |VEE|, SUPPLY VOLTAGE (V) 20 Figure 6. DC Voltage Gain versus Supply Voltage ∅ , EXCESS PHASE (DEGREES) AVOL, OPEN LOOP VOLTAGE GAIN (dB) Figure 5. DC Voltage Gain versus Temperature 120 20 Figure 4. Supply Current versus Supply Voltage AVOL, DC VOLTAGE GAIN (dB) AVOL, DC VOLTAGE GAIN (dB) 110 10 15 VCC, |VEE|, SUPPLY VOLTAGE (V) 20 15 10 5.0 0 −55 Figure 7. Open Loop Voltage Gain and Phase versus Frequency VCC = +15 V VEE = −15 V f = 100 kHz −25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 Figure 8. Gain Bandwidth Product versus Temperature http://onsemi.com 3 125 GBW, GAIN BANDWIDTH PRODUCT (MHz) LM833 30 10 SR, SLEW RATE (V/ μ s) f = 100 kHz TA = 25°C 20 10 0 5.0 10 15 VCC, |VEE|, SUPPLY VOLTAGE (V) 8.0 Falling Rising 6.0 VCC = +15 V VEE = −15 V RL = 2.0 kW AV = +1.0 4.0 2.0 −55 20 Figure 9. Gain Bandwidth Product versus Supply Voltage SR, SLEW RATE (V/ μ s) 8.0 RL = 2.0k W AV = +1.0 TA = 25°C Falling 4.0 + − Vin 2.0 VO RL 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 35 Rising 6.0 − + Figure 10. Slew Rate versus Temperature VO , OUTPUT VOLTAGE (Vpp ) 10 −25 Vin VO RL 30 25 20 VCC = +15 V VEE = −15 V RL = 2.0 kW THD v 1.0% TA = 25°C 15 10 5.0 0 5.0 10 15 VCC, |VEE|, SUPPLY VOLTAGE (V) 0 20 10 VO, OUTPUT VOLTAGE (Vpp ) 20 15 RL = 10 kW TA = 25°C VO + 10 5.0 0 −5.0 −10 VO − −15 −20 5.0 10 15 VCC, |VEE|, SUPPLY VOLTAGE (V) 1.0 k 10 k 1.0 M f, FREQUENCY (Hz) 10 M 100 k Figure 12. Output Voltage versus Frequency V sat , OUTPUT SATURATION VOLTAGE |V| Figure 11. Slew Rate versus Supply Voltage 100 20 15 +Vsat −Vsat 14 VCC = +15 V VEE = −15 V RL = 10 kW 13 −55 Figure 13. Maximum Output Voltage versus Supply Voltage −25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 Figure 14. Output Saturation Voltage versus Temperature http://onsemi.com 4 125 140 VCC = +15 V VEE = −15 V TA = 25°C 120 100 80 CMR, COMMON MODE REJECTION (dB) PSR, POWER SUPPLY REJECTION (dB) LM833 DVCC − ADM DVO + DVEE −PSR +PSR 60 40 20 +PSR = 20 Log −PSR = 20 Log 0 100 1.0 k DVO/ADM ( DVCC ) ( DVDVO/AEEDM ) 10 k 100 k f, FREQUENCY (Hz) 1.0 M 160 140 120 80 60 40 20 100 10 M − + VCC = +15 V VEE = −15 V RL = 2.0 kW TA = 25°C VO RL 0.01 VCC = +15 V VEE = −15 V VCM = 0 V DVCM = ±1.5 V TA = 25°C 1.0 k 10 k 100 k f, FREQUENCY (Hz) 1.0 M 10 M VO = 1.0 Vrms VO = 3.0 Vrms 100 1.0 k 10 k 5.0 VCC = +15 V VEE = −15 V RS = 100 W TA = 25°C 2.0 1.0 10 100 k Figure 17. Total Harmonic Distortion versus Frequency 100 2.0 100 VCC = +15 V VEE = −15 V TA = 25°C 1.0 0.7 0.5 0.4 0.3 100 1.0 k f, FREQUENCY (Hz) 10 k 1.0 k f, FREQUENCY (Hz) 10 k 100 k Figure 18. Input Referred Noise Voltage versus Frequency e n, INPUT NOISE VOLTAGE (nV/√ Hz ) i n , INPUT NOISE CURRENT (pA/√ Hz ) DVCM × ADM DV0 CMR = 20 Log f, FREQUENCY (Hz) 0.2 10 DVO 10 e n, INPUT NOISE VOLTAGE (nV/√ Hz ) THD, TOTAL HARMONIC DISTORTION (%) + Figure 16. Common Mode Rejection versus Frequency 1.0 0.001 10 − ADM 100 Figure 15. Power Supply Rejection versus Frequency 0.1 DVCM 100 k VCC = +15 V VEE = −15 V Vn(total) = (inRS)2 +en2 + Ǹ 4KTRS TA = 25°C 10 1.0 1.0 10 100 1.0 k 10 k 100 k RS, SOURCE RESISTANCE (W) Figure 19. Input Referred Noise Current versus Frequency Figure 20. Input Referred Noise Voltage versus Source Resistance http://onsemi.com 5 1.0 M VCC = +15 V VEE = −15 V RL = 2.0 kW CL = 0 pF AV = −1.0 TA = 25°C VO , OUTPUT VOLTAGE (5.0 V/DIV) VO , OUTPUT VOLTAGE (5.0 V/DIV) LM833 VCC = +15 V VEE = −15 V RL = 2.0 kW CL = 0 pF AV = +1.0 TA = 25°C t, TIME (2.0 ms/DIV) t, TIME (2.0 ms/DIV) VO , OUTPUT VOLTAGE (10 mV/DIV) Figure 21. Inverting Amplifier Figure 22. Noninverting Amplifier Slew Rate VCC = +15 V VEE = −15 V RL = 2.0 kW CL = 0 pF AV = +1.0 TA = 25°C t, TIME (200 ns/DIV) Figure 23. Noninverting Amplifier Overshoot ORDERING INFORMATION Device LM833N LM833NG LM833D Package PDIP−8 PDIP−8 (Pb−Free) 50 Units / Rail SOIC−8 LM833DG SOIC−8 (Pb−Free) LM833DR2 SOIC−8 LM833DR2G Shipping † SOIC−8 (Pb−Free) 98 Units / Rail 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 6 LM833 PACKAGE DIMENSIONS SOIC−8 D SUFFIX CASE 751−07 ISSUE AG NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. −X− A 8 5 S B 1 0.25 (0.010) M Y M 4 K −Y− G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− 0.10 (0.004) H D 0.25 (0.010) M Z Y S X M J S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 LM833 PACKAGE DIMENSIONS PDIP−8 N SUFFIX CASE 626−05 ISSUE L 8 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5 −B− 1 4 F −A− NOTE 2 L C J −T− MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC −−− 10 _ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC −−− 10_ 0.030 0.040 N SEATING PLANE D H DIM A B C D F G H J K L M N M K G 0.13 (0.005) M T A M B M ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Phone: 81−3−5773−3850 Email: [email protected] http://onsemi.com 8 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. LM833/D