Fairchild FQD18N20V2TM N-channel qfet mosfet 200 v, 15 a, 140 mohm Datasheet

FQD18N20V2 / FQU18N20V2
N-Channel QFET® MOSFET
200 V, 15 A, 140 mΩ
Description
Features
This N-Channel enhancement mode power MOSFET is
produced using Fairchild Semiconductor®’s proprietary
planar stripe and DMOS technology. This advanced
MOSFET technology has been especially tailored to
reduce on-state resistance, and to provide superior
switching performance and high avalanche energy
strength. These devices are suitable for switched mode
power supplies, active power factor correction (PFC), and
electronic lamp ballasts.
• 15 A, 200 V, RDS(on) = 140 mΩ @ VGS = 10 V,
ID = 7.5 A
• Low Gate Charge (Typ. 20 nC)
• Low Crss (Typ. 25 pF)
• 100% Avalanche Tested
D
!
D
G
G
S
"
D
G!
S
Absolute Maximum Ratings
Symbol
VDSS
ID
"
"
!
I-PAK
D-PAK
! "
S
TC = 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
- Continuous (TC = 100°C)
FQD18N20V2 / FQU18N20V2
200
Unit
V
15
A
9.75
A
60
A
IDM
Drain Current
VGSS
Gate-Source Voltage
EAS
Single Pulsed Avalanche Energy
(Note 2)
IAR
Avalanche Current
(Note 1)
15
A
EAR
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C) *
(Note 1)
8.3
6.5
2.5
mJ
V/ns
W
83
0.67
-55 to +150
W
W/°C
°C
300
°C
FQD18N20V2 / FQU18N20V2
Unit
°C/W
dv/dt
PD
TJ, TSTG
TL
- Pulsed
(Note 1)
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
± 30
V
340
mJ
Thermal Characteristics
Symbol
RθJC
Parameter
Thermal Resistance, Junction-to-Case, Max.
RθJA
Thermal Resistance, Junction-to-Ambient *
50
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient, Max.
110
°C/W
1.5
* When mounted on the minimum pad size recommended (PCB Mount)
©2009 Fairchild Semiconductor Corporation
FQD18N20V2 / FQU18N20V2 Rev. C0
www.fairchildsemi.com
FQD18N20V2 / FQU18N20V2 N-Channel QFET® MOSFET
April 2013
Symbol
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Unit
200
--
--
V
--
V/°C
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
∆BVDSS
/
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, Referenced to 25°C
--
0.25
IDSS
IGSSF
IGSSR
VDS = 200 V, VGS = 0 V
--
--
1
µA
VDS = 160 V, TC = 125°C
--
--
10
µA
Gate-Body Leakage Current, Forward
VGS = 30 V, VDS = 0 V
--
--
100
nA
Gate-Body Leakage Current, Reverse
VGS = -30 V, VDS = 0 V
--
--
-100
nA
3.0
--
5.0
V
--
0.12
0.14
Ω
--
11
--
S
--
830
1080
pF
--
200
260
pF
--
25
33
pF
--
70
--
pF
--
135
--
pF
ns
Zero Gate Voltage Drain Current
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static Drain-Source
On-Resistance
VGS = 10 V, ID = 7.5 A
gFS
Forward Transconductance
VDS = 40 V, ID = 7.5 A
(Note 4)
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Coss
Output Capacitance
Coss eff.
Effective Output Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
VDS = 160 V, VGS = 0 V,
f = 1.0 MHz
VDS = 0V to 160 V, VGS = 0 V
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = 100 V, ID = 18 A,
RG = 25 Ω
(Note 4, 5)
VDS = 160 V, ID = 18 A,
VGS = 10 V
(Note 4, 5)
--
16
40
--
133
275
ns
--
38
85
ns
--
62
135
ns
--
20
26
nC
--
5.6
--
nC
--
10
--
nC
A
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
15
ISM
--
--
60
A
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = 15 A
Drain-Source Diode Forward Voltage
--
--
1.5
V
trr
Reverse Recovery Time
--
158
--
ns
Qrr
Reverse Recovery Charge
--
1.0
--
µC
VGS = 0 V, IS = 18 A,
dIF / dt = 100 A/µs
(Note 4)
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 1.58mH, IAS = 18A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 18A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2009 Fairchild Semiconductor Corporation
FQD18N20V2 / FQU18N20V2 Rev. C0
www.fairchildsemi.com
FQD18N20V2 / FQU18N20V2 N-Channel QFET® MOSFET
Electrical Characteristics
VGS
Top :
15.0 V
10.0 V
ID, Drain Current [A]
10
8.0 V
1
7.0 V
1
ID , Drain Current [A]
6.5 V
6.0 V
Bottom :
10
5.5 V
0
※ Notes :
10
-1
150℃
10
25℃
-55℃
0
10
1. 250μ s Pulse Test
※ Notes :
1. VDS = 40V
2. 250μ s Pulse Test
2. TC = 25℃
10
-1
10
0
10
1
-1
10
VDS, Drain-Source Voltage [V]
4
5
Figure 1. On-Region Characteristics
6
7
8
9
VGS , Gate-Source Voltage [V]
10
Figure 2. Transfer Characteristics
0.4
VGS = 10V
IDR , Reverse Drain Current [A]
R DS(ON) [Ω ],
Drain-Source On-Resistance
0.5
1
10
VGS = 20V
0.3
0.2
0
10
0.1
150℃
25℃
※ Notes :
1. VGS = 0V
2. 250μ s Pulse Test
※ Note : TJ = 25℃
0.0
0
10
20
30
40
50
60
-1
10
ID, Drain Current [A]
0.2
0.6
0.8
1.0
1.2
1.4
1.6
VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
12
2500
Ciss = C gs + Cgd (Cds = shorted)
Coss = Cds + Cgd
1. VGS = 0 V
2. f = 1 MHz
Ciss
1000
Coss
500
Crss
0
-1
10
VGS , Gate-Source Voltage [V]
※ Notes :
1500
VDS = 40V
10
Crss = C gd
2000
Capacitance [pF]
0.4
VDS = 100V
VDS = 160V
8
6
4
2
※ Note : ID = 18A
10
0
10
1
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2009 Fairchild Semiconductor Corporation
FQD18N20V2 / FQU18N20V2 Rev. C0
0
0
5
10
15
20
25
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
www.fairchildsemi.com
FQD18N20V2 / FQU18N20V2 N-Channel QFET® MOSFET
Typical Characteristics
(Continued)
3.0
2.5
R DS(ON) , (Normalized)
1.1
1.0
※ Notes :
0.9
1. VGS = 0 V
2. ID = 250 μ A
0.8
-100
-50
0
50
100
150
Drain-Source On-Resistance
BV DSS , (Normalized)
Drain-Source Breakdown Voltage
1.2
2.0
1.5
1.0
※ Notes :
0.5
1. VGS = 10 V
2. ID = 7.5 A
0.0
-100
200
-50
0
o
TJ, Junction Temperature [ C]
20
15
ID, Drain Current [A]
ID , Drain Current [A]
200
is Limited by R DS(on)
2
100 us
1 ms
1
10 ms
DC
10
150
Figure 8. On-Resistance Variation
vs. Temperature
Operation in This Area
10
100
o
Figure 7. Breakdown Voltage Variation
vs. Temperature
10
50
TJ, Junction Temperature [ C]
0
※ Notes :
o
1. TC = 25 C
10
5
o
2. TJ = 150 C
3. Single Pulse
0
25
-1
10
0
1
10
10
10
2
50
75
1. Z
JC
(t) = 1 .5 ℃ /W M a x .
2 . D u ty F a c to r, D = t1 /t2
0 .0 2
0 .0 1
3. T
-5
JM
- T
C
= P
* Z
D M
θ
JC
(t)
PDM
t1
-2
10
θ
0 .0 5
s in g le p u ls e
θ
Z
N o te s :
※
-1
JC
(t) , T h e r m a l R e s p o n s e
D = 0 .5
0 .2
10
150
0
0 .1
10
125
Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 9. Maximum Safe Operating Area
10
100
TC, Case Temperature [℃]
VDS, Drain-Source Voltage [V]
10
-4
10
-3
10
-2
10
-1
t2
10
0
10
1
t1 , S q u a r e W a v e P u ls e D u r a t io n [s e c ]
Figure 11. Transient Thermal Response Curve
©2009 Fairchild Semiconductor Corporation
FQD18N20V2 / FQU18N20V2 Rev. C0
www.fairchildsemi.com
FQD18N20V2 / FQU18N20V2 N-Channel QFET® MOSFET
Typical Characteristics
FQD18N20V2 / FQU18N20V2 N-Channel QFET® MOSFET
Gate Charge Test Circuit & Waveform
50KΩ
200nF
12V
VGS
Same Type
as DUT
Qg
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RG
RL
VDS
90%
VDD
VGS
VGS
DUT
10V
10%
td(on)
tr
td(off)
t on
t off
tf
Unclamped Inductive Switching Test Circuit & Waveforms
VDS
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
BVDSS
IAS
ID
RG
VDD
DUT
10V
tp
©2009 Fairchild Semiconductor Corporation
FQD18N20V2 / FQU18N20V2 Rev. C0
ID (t)
VDS (t)
VDD
tp
Time
www.fairchildsemi.com
FQD18N20V2 / FQU18N20V2 N-Channel QFET® MOSFET
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
I SD
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
©2009 Fairchild Semiconductor Corporation
FQD18N20V2 / FQU18N20V2 Rev. C0
www.fairchildsemi.com
FQD18N20V2 / FQU18N20V2 N-Channel QFET® MOSFET
Mechanical Dimensions
D-PAK
Dimensions in Millimeters
©2009 Fairchild Semiconductor Corporation
FQD18N20V2 / FQU18N20V2 Rev. C0
www.fairchildsemi.com
FQD18N20V2 / FQU18N20V2 N-Channel QFET® MOSFET
Mechanical Dimensions
I-PAK
Dimensions in Millimeters
©2009 Fairchild Semiconductor Corporation
FQD18N20V2 / FQU18N20V2 Rev. C0
www.fairchildsemi.com
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I64
©2009 Fairchild Semiconductor Corporation
FQD18N20V2 / FQU18N20V2 Rev. C0
www.fairchildsemi.com
FQD18N20V2 / FQU18N20V2 N-Channel QFET® MOSFET
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