MAX3232 SLLS410K – JANUARY 2000 – REVISED JANUARY 2015 MAX3232 3-V to 5.5-V Multichannel RS-232 Line Driver/Receiver With ±15-kV ESD Protection 1 Features 3 Description • The MAX3232 device consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection terminal to terminal (serialport connection terminals, including GND). The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The devices operate at data signaling rates up to 250 kbit/s and a maximum of 30-V/μs driver output slew rate. 1 • • • • • • • • RS-232 Bus-Terminal ESD Protection Exceeds ±15 kV Using Human-Body Model (HBM) Meets or Exceeds the Requirements of TIA/EIA232-F and ITU V.28 Standards Operates With 3-V to 5.5-V VCC Supply Operates up to 250 kbit/s Two Drivers and Two Receivers Low Supply Current: 300 μA Typical External Capacitors: 4 × 0.1 μF Accepts 5-V Logic Input With 3.3-V Supply Alternative High-Speed Terminal-Compatible Devices (1 Mbit/s) – SN65C3232 (–40°C to 85°C) – SN75C3232 (0°C to 70°C) Device Information(1) PART NUMBER PACKAGE (PIN) BODY SIZE SOIC (16) 9.90 mm × 3.91 mm SSOP (16) 6.20 mm × 5.30 mm 2 Applications SOIC (16) 10.30 mm × 7.50 mm • • • • • • TSSOP (16) 5.00 mm × 4.40 mm MAX3232 Battery-Powered Systems PDAs Notebooks Laptops Palmtop PCs Hand-Held Equipment (1) For all available packages, see the orderable addendum at the end of the data sheet. 4 Simplified Schematic 3.3 V, 5 V POWER 2 DIN 2 TX RS232 2 ROUT DOUT RX 2 RIN RS232 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. MAX3232 SLLS410K – JANUARY 2000 – REVISED JANUARY 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Simplified Schematic............................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 1 2 3 4 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 4 4 4 4 5 5 5 6 6 Absolute Maximum Ratings ..................................... ESD Ratings.............................................................. Recommended Operating Conditions ...................... Thermal Information .................................................. Electrical Characteristics — Device ......................... Electrical Characteristics — Driver .......................... Electrical Characteristics — Receiver....................... Switching Characteristics .......................................... Typical Characteristics .............................................. Parameter Measurement Information .................. 7 9 Detailed Description .............................................. 8 9.1 9.2 9.3 9.4 Overview ................................................................... Functional Block Diagram ......................................... Feature Description................................................... Device Functional Modes.......................................... 8 8 8 9 10 Applications and Implementation...................... 10 10.1 Application Information.......................................... 10 10.2 Standard Application ............................................. 10 11 Power Supply Recommendations ..................... 11 12 Layout................................................................... 12 12.1 Layout Guidelines ................................................. 12 12.2 Layout Example .................................................... 12 13 Device and Documentation Support ................. 13 13.1 Trademarks ........................................................... 13 13.2 Electrostatic Discharge Caution ............................ 13 13.3 Glossary ................................................................ 13 14 Mechanical, Packaging, and Orderable Information ........................................................... 13 5 Revision History Changes from Revision J (January 2014) to Revision K • Page Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table, Typical Characteristics, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1 Changes from Revision I (January 2004) to Revision J Page • Updated document to new TI data sheet format - no specification changes. ........................................................................ 1 • Deleted Ordering Information table. ....................................................................................................................................... 1 • Added ESD warning. ............................................................................................................................................................ 13 2 Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: MAX3232 MAX3232 www.ti.com SLLS410K – JANUARY 2000 – REVISED JANUARY 2015 6 Pin Configuration and Functions D, DB, DW, OR PW PACKAGE (TOP VIEW) C1+ V+ C1− C2+ C2− V− DOUT2 RIN2 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC GND DOUT1 RIN1 ROUT1 DIN1 DIN2 ROUT2 Pin Functions PIN NAME NO. TYPE DESCRIPTION C1+ 1 — Positive lead of C1 capacitor V+ 2 O Positive charge pump output for storage capacitor only C1– 3 — Negative lead of C1 capacitor C2+ 4 — Positive lead of C2 capacitor C2– 5 — Negative lead of C2 capacitor V– 6 O Negative charge pump output for storage capacitor only DOUT2, DOUT1 7, 14 O RS232 line data output (to remote RS232 system) RIN2, RIN1 8, 13 I RS232 line data input (from remote RS232 system) ROUT2, ROUT1 9, 12 O Logic data output (to UART) DIN2, DIN1 10, 11 I Logic data input (from UART) GND 15 — Ground VCC 16 — Supply Voltage, Connect to external 3 V to 5.5 V power supply Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: MAX3232 3 MAX3232 SLLS410K – JANUARY 2000 – REVISED JANUARY 2015 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) Supply voltage range (2) VCC (2) V+ Positive output supply voltage range V– Negative output supply voltage range (2) V+ – V– Supply voltage difference (2) VI Input voltage range VO Output voltage range TJ Operating virtual junction temperature Tstg Storage temperature range (1) (2) MIN MAX –0.3 6 V –0.3 7 V –7 0.3 V 13 V Drivers –0.3 6 Receivers –25 25 –13.2 13.2 –0.3 VCC + 0.3 Drivers Receivers –65 UNIT V V 150 °C 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to network GND. 7.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 RIN , DOUT, and GND pins (1) 15000 Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 All other pins (1) 3000 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) 1000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions (see Figure 6) (1) VCC = 3.3 V MIN NOM MAX 3 3.3 3.6 4.5 5 5.5 VCC Supply voltage VIH Driver high-level input voltage DIN VIL Driver low-level input voltage DIN Driver input voltage DIN 0 5.5 Receiver input voltage RIN –25 25 0 70 –40 85 VI TA (1) VCC = 5 V VCC = 3.3 V 2 VCC = 5 V 0.8 MAX3232I V V 2.4 MAX3232C Operating free-air temperature UNIT V V °C Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. 7.4 Thermal Information MAX3232 THERMAL METRIC (1) SOIC SSOP SOIC TSSOP UNIT 57 108 °C/W 16 PINS RθJA (1) 4 Junction-to-ambient thermal resistance 73 82 For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953). Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: MAX3232 MAX3232 www.ti.com SLLS410K – JANUARY 2000 – REVISED JANUARY 2015 7.5 Electrical Characteristics — Device over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (1) (see Figure 6) PARAMETER ICC (1) (2) TEST CONDITIONS Supply current No load, MIN TYP (2) MAX 0.3 1 VCC = 3.3 V to 5 V UNIT mA Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. 7.6 Electrical Characteristics — Driver over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (1) (see Figure 6) PARAMETER TEST CONDITIONS MIN TYP (2) VOH High-level output voltage DOUT at RL = 3 kΩ to GND, DIN = GND 5 5.4 VOL Low-level output voltage DOUT at RL = 3 kΩ to GND, DIN = VCC –5 –5.4 IIH High-level input current VI = VCC IIL Low-level input current VI at GND IOS (3) Short-circuit output current rO Output resistance (1) (2) (3) VCC = 3.6 V VO = 0 V VCC = 5.5 V VO = 0 V VCC, V+, and V– = 0 V VO = ±2 V 300 MAX UNIT V V ±0.01 ±1 μA ±0.01 ±1 μA ±35 ±60 mA Ω 10M Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one output should be shorted at a time. 7.7 Electrical Characteristics — Receiver over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (1) (see Figure 6) PARAMETER TEST CONDITIONS VOH High-level output voltage IOH = –1 mA VOL Low-level output voltage IOL = 1.6 mA VIT+ Positive-going input threshold voltage VIT– Negative-going input threshold voltage Vhys Input hysteresis (VIT+ – VIT–) rI Input resistance (1) (2) MIN TYP (2) VCC – 0.6 VCC – 0.1 MAX V 0.4 VCC = 3.3 V 1.5 2.4 VCC = 5 V 1.8 2.4 VCC = 3.3 V 0.6 1.2 VCC = 5 V 0.8 1.5 3 5 V V V 0.3 VI = ±3 V to ±25 V UNIT V 7 kΩ Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: MAX3232 5 MAX3232 SLLS410K – JANUARY 2000 – REVISED JANUARY 2015 www.ti.com 7.8 Switching Characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (1) (see Figure 6) PARAMETER TEST CONDITIONS Maximum data rate RL = 3 kΩ, CL = 1000 pF One DOUT switching, See Figure 3 tsk(p) Driver Pulse skew (3) RL = 3 kΩ to 7 kΩ, SR(tr) Slew rate, transition region (see Figure 3) RL = 3 kΩ to 7 kΩ, VCC = 5 V tPLH®) Propagation delay time, low- to highlevel output tPHL®) Propagation delay time, high- to lowlevel output tsk(p) Receiver Pulse skew (1) (1) (2) (3) MIN TYP (2) 150 250 kbit/s 300 ns CL = 150 to 2500 pF See Figure 4 MAX CL = 150 to 1000 pF 6 30 CL = 150 to 2500 pF 4 30 UNIT V/μs 300 CL = 150 pF ns 300 300 Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Pulse skew is defined as |tPLH − tPHL| of each channel of the same device. 7.9 Typical Characteristics VCC = 3.3 V 6 1 VOH 0 5 ±1 VOL (V) VOH (V) 4 3 ±2 ±3 2 ±4 1 ±5 0 0 5 10 15 Output Current (mA) 20 25 0 5 10 15 Output Current (mA) C001 Figure 1. DOUT VOH vs Load Current, Both Drivers Loaded 6 VOL ±6 20 25 C001 Figure 2. DOUT VOL vs Load Current, Both Drivers Loaded Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: MAX3232 MAX3232 www.ti.com SLLS410K – JANUARY 2000 – REVISED JANUARY 2015 8 Parameter Measurement Information 3V Input Generator (see Note B) 1.5 V RS-232 Output 50 Ω RL 1.5 V 0V tTHL CL (see Note A) tTLH 3V Output −3 V TEST CIRCUIT SR(tr) = t THL 6V or t VOH 3V −3 V VOL VOLTAGE WAVEFORMS TLH A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 3. Driver Slew Rate 3V Generator (see Note B) RS-232 Output 50 Ω RL 1.5 V Input 1.5 V 0V CL (see Note A) tPHL tPLH VOH 50% 50% Output VOL TEST CIRCUIT VOLTAGE WAVEFORMS A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 4. Driver Pulse Skew 3V Input Generator (see Note B) 1.5 V 1.5 V −3 V Output 50 Ω tPHL CL (see Note A) tPLH VOH 50% Output 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 5. Receiver Propagation Delay Times Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: MAX3232 7 MAX3232 SLLS410K – JANUARY 2000 – REVISED JANUARY 2015 www.ti.com 9 Detailed Description 9.1 Overview The MAX3232 device consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection terminal to terminal (serial-port connection terminals, including GND). The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The device operates at data signaling rates up to 250 kbit/s and a maximum of 30V/μs driver output slew rate. Outputs are protected against shorts to ground. 9.2 Functional Block Diagram 3.3 V, 5 V POWER 2 DIN 2 TX RS232 2 ROUT DOUT RX 2 RIN RS232 9.3 Feature Description 9.3.1 Power The power block increases, inverts, and regulates voltage at V+ and V- pins using a charge pump that requires four external capacitors. 9.3.2 RS232 Driver Two drivers interface standard logic level to RS232 levels. Both DIN inputs must be valid high or low. 9.3.3 RS232 Receiver Two receivers interface RS232 levels to standard logic levels. An open input will result in a high output on ROUT. Each RIN input includes an internal standard RS232 load. 8 Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: MAX3232 MAX3232 www.ti.com SLLS410K – JANUARY 2000 – REVISED JANUARY 2015 9.4 Device Functional Modes Table 1. Each Driver (1) (1) INPUT DIN OUTPUT DOUT L H H L H = high level, L = low level Table 2. Each Receiver (1) (1) INPUT RIN OUTPUT ROUT L H H L Open H H = high level, L = low level, Open = input disconnected or connected driver off 9.4.1 VCC powered by 3 V to 5.5 V The device will be in normal operation. 9.4.2 VCC unpowered, VCC = 0 V When MAX3232 is unpowered, it can be safely connected to an active remote RS232 device. Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: MAX3232 9 MAX3232 SLLS410K – JANUARY 2000 – REVISED JANUARY 2015 www.ti.com 10 Applications and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 10.1 Application Information For proper operation, add capacitors as shown in Figure 6. 10.2 Standard Application ROUT and DIN connect to UART or general purpose logic lines. RIN and DOUT lines connect to a RS232 connector or cable. 1 + CBYPASS − = 0.1µF + C1 VCC 16 C1+ 2 †+ C3 − − 3 4 V+ GND 14 DOUT1 C1− 13 C2+ + C2 15 RIN1 5 kΩ − 5 C2− 12 6 C4 DOUT2 RIN2 − V− 11 ROUT1 DIN1 + 7 10 8 9 DIN2 ROUT2 5 kΩ † C3 can be connected to VCC or GND. NOTES: A. Resistor values shown are nominal. B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be connected as shown. VCC vs CAPACITOR VALUES VCC C1 C2, C3, C4 3.3 V ± 0.3 V 5 V ± 0.5 V 3 V to 5.5 V 0.1 µF 0.047 µF 0.1 µF 0.1 µF 0.33 µF 0.47 µF Figure 6. Typical Operating Circuit and Capacitor Values 10 Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: MAX3232 MAX3232 www.ti.com SLLS410K – JANUARY 2000 – REVISED JANUARY 2015 Standard Application (continued) 10.2.1 Design Requirements • • Recommended VCC is 3.3 V or 5 V. 3 V to 5.5 V is also possible Maximum recommended bit rate is 250 kbit/s. 10.2.2 Detailed Design Procedure • • All DIN, FORCEOFF and FORCEON inputs must be connected to valid low or high logic levels. Select capacitor values based on VCC level for best performance. Voltage (V) 10.2.3 Application Curves 6 5 4 3 2 1 0 ±1 ±2 ±3 ±4 ±5 ±6 ±7 ±8 ±9 DIN DOUT to RIN ROUT 0 1 2 3 4 5 6 7 Time (s) 8 9 10 C001 Figure 7. 250 kbit/s Driver to Receiver Loopback Timing Waveform, VCC= 3.3 V 11 Power Supply Recommendations VCC should be between 3 V and 5.5 V. Charge pump capacitors should be chosen using table in Figure 6. Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: MAX3232 11 MAX3232 SLLS410K – JANUARY 2000 – REVISED JANUARY 2015 www.ti.com 12 Layout 12.1 Layout Guidelines Keep the external capacitor traces short. This is more important on C1 and C2 nodes that have the fastest rise and fall times. 12.2 Layout Example Ground C3 C1 1 C1+ VCC 16 2 V+ GND 15 3 C1– DOUT1 14 4 C2+ RIN1 13 5 C2– ROUT1 12 VCC 0.1µF Ground C2 Ground 6 V– DIN1 11 7 DOUT2 DIN2 10 C4 8 RIN2 ROUT2 9 Figure 8. Layout Diagram 12 Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: MAX3232 MAX3232 www.ti.com SLLS410K – JANUARY 2000 – REVISED JANUARY 2015 13 Device and Documentation Support 13.1 Trademarks All trademarks are the property of their respective owners. 13.2 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 13.3 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms and definitions. 14 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser based versions of this data sheet, refer to the left hand navigation. Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: MAX3232 13 PACKAGE OPTION ADDENDUM www.ti.com 15-Nov-2014 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) MAX3232CD ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3232C MAX3232CDB ACTIVE SSOP DB 16 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3232C MAX3232CDBE4 ACTIVE SSOP DB 16 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3232C MAX3232CDBG4 ACTIVE SSOP DB 16 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3232C MAX3232CDBR ACTIVE SSOP DB 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3232C MAX3232CDBRE4 ACTIVE SSOP DB 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3232C MAX3232CDBRG4 ACTIVE SSOP DB 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3232C MAX3232CDE4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3232C MAX3232CDG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3232C MAX3232CDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 MAX3232C MAX3232CDRE4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3232C MAX3232CDRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3232C MAX3232CDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3232C MAX3232CDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3232C MAX3232CDWR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 MAX3232C MAX3232CDWRE4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3232C MAX3232CDWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MAX3232C Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 15-Nov-2014 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) MAX3232CPW ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3232C MAX3232CPWE4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3232C MAX3232CPWG4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3232C MAX3232CPWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 MA3232C MAX3232CPWRE4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3232C MAX3232CPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3232C MAX3232ID ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3232I MAX3232IDB ACTIVE SSOP DB 16 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3232I MAX3232IDBE4 ACTIVE SSOP DB 16 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3232I MAX3232IDBG4 ACTIVE SSOP DB 16 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3232I MAX3232IDBR ACTIVE SSOP DB 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3232I MAX3232IDBRE4 ACTIVE SSOP DB 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3232I MAX3232IDBRG4 ACTIVE SSOP DB 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3232I MAX3232IDE4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3232I MAX3232IDG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3232I MAX3232IDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 MAX3232I MAX3232IDRE4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3232I MAX3232IDRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3232I Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 15-Nov-2014 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) MAX3232IDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3232I MAX3232IDWE4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3232I MAX3232IDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3232I MAX3232IDWR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 MAX3232I MAX3232IDWRE4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3232I MAX3232IDWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MAX3232I MAX3232IPW ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3232I MAX3232IPWE4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3232I MAX3232IPWG4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3232I MAX3232IPWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 MB3232I MAX3232IPWRE4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3232I MAX3232IPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 MB3232I SN003232CPWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 MA3232C (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Addendum-Page 3 Samples PACKAGE OPTION ADDENDUM www.ti.com 15-Nov-2014 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. 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OTHER QUALIFIED VERSIONS OF MAX3232 : • Enhanced Product: MAX3232-EP NOTE: Qualified Version Definitions: • Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 4 PACKAGE MATERIALS INFORMATION www.ti.com 28-May-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant MAX3232CDBR SSOP DB 16 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 MAX3232CDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 MAX3232CDRG4 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 MAX3232CDWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 MAX3232CDWRG4 SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 MAX3232CPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 MAX3232CPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 MAX3232CPWRG4 TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 MAX3232IDBR SSOP DB 16 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 MAX3232IDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 MAX3232IDRG4 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 MAX3232IDWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 MAX3232IDWRG4 SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 MAX3232IPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 MAX3232IPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 MAX3232IPWRG4 TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 28-May-2016 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) MAX3232CDBR SSOP DB 16 2000 367.0 367.0 38.0 MAX3232CDR SOIC D 16 2500 333.2 345.9 28.6 MAX3232CDRG4 SOIC D 16 2500 333.2 345.9 28.6 MAX3232CDWR SOIC DW 16 2000 367.0 367.0 38.0 MAX3232CDWRG4 SOIC DW 16 2000 367.0 367.0 38.0 MAX3232CPWR TSSOP PW 16 2000 367.0 367.0 35.0 MAX3232CPWR TSSOP PW 16 2000 364.0 364.0 27.0 MAX3232CPWRG4 TSSOP PW 16 2000 367.0 367.0 35.0 MAX3232IDBR SSOP DB 16 2000 367.0 367.0 38.0 MAX3232IDR SOIC D 16 2500 333.2 345.9 28.6 MAX3232IDRG4 SOIC D 16 2500 333.2 345.9 28.6 MAX3232IDWR SOIC DW 16 2000 367.0 367.0 38.0 MAX3232IDWRG4 SOIC DW 16 2000 367.0 367.0 38.0 MAX3232IPWR TSSOP PW 16 2000 364.0 364.0 27.0 MAX3232IPWR TSSOP PW 16 2000 367.0 367.0 35.0 MAX3232IPWRG4 TSSOP PW 16 2000 367.0 367.0 35.0 Pack Materials-Page 2 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. 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