ON NVMFS5832NLT1G Power mosfet 40 v, 4.2 m , 120 a, single n.channel Datasheet

NVMFS5832NL
Power MOSFET
40 V, 4.2 mW, 120 A, Single N−Channel
Features
•
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low RDS(on) to Minimize Conduction Losses
Low QG and Capacitance to Minimize Driver Losses
AEC−Q101 Qualified and PPAP Capable
These are Pb−Free Devices
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V(BR)DSS
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Parameter
Value
Unit
VDSS
40
V
Gate−to−Source Voltage
VGS
± 20
V
ID
120
A
Power Dissipation
RYJ−mb (Notes 1, 2, 3)
Continuous Drain Current RqJA (Notes 1, 3,
4)
Power Dissipation
RqJA (Notes 1 & 3)
Pulsed Drain Current
Tmb = 25°C
Steady
State
Tmb = 100°C
Tmb = 25°C
Steady
State
PD
ID
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, VGS = 10 V, IL(pk) = 52 A,
L = 0.1 mH, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
PD
Junction−to−Ambient − Steady State (Note 3)
1.9
IDM
557
A
TJ, Tstg
−55 to
+ 175
°C
IS
120
A
EAS
134
mJ
TL
260
°C
March, 2013 − Rev. 2
MARKING
DIAGRAM
D
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
A
Y
W
ZZ
S
S
S
G
D
V5832L
AYWZZ
D
D
= Assembly Location
= Year
= Work Week
= Lot Traceability
ORDERING INFORMATION
Symbol
Value
Unit
RYJ−mb
1.2
°C/W
RqJA
40
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
4. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2013
S (1,2,3)
N−CHANNEL MOSFET
W
3.7
THERMAL RESISTANCE MAXIMUM RATINGS
Junction−to−Mounting Board (top) − Steady
State (Notes 2, 3)
G (4)
A
21
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
Parameter
D (5,6)
15
TA = 100°C
TA = 25°C, tp = 10 ms
W
127
64
TA = 100°C
TA = 25°C
120 A
6.5 mW @ 4.5 V
84
Tmb = 100°C
TA = 25°C
ID MAX
4.2 mW @ 10 V
40 V
Drain−to−Source Voltage
Continuous Drain Current RYJ−mb (Notes 1,
2, 3, 4)
RDS(ON) MAX
1
Package
Shipping†
NVMFS5832NLT1G
SO−8FL
(Pb−Free)
1500 /
Tape & Reel
NVMFS5832NLT3G
SO−8FL
(Pb−Free)
5000 /
Tape & Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NVMFS5832NL/D
NVMFS5832NL
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
40
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
V
34.2
VGS = 0 V,
VDS = 40 V
mV/°C
TJ = 25 °C
1
TJ = 125°C
100
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
±100
mA
nA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
Forward Transconductance
RDS(on)
1.4
2.4
6.4
VGS = 10 V
ID = 20 A
3.1
4.2
VGS = 4.5 V
ID = 20 A
5.0
6.5
gFS
VDS = 15 V, ID = 20 A
V
mV/°C
21
mW
S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
2700
VGS = 0 V, f = 1 MHz, VDS = 25 V
360
pF
250
Total Gate Charge
QG(TOT)
VGS = 4.5 V, VDS = 20 V; ID = 20 A
25
Total Gate Charge
QG(TOT)
VGS = 10 V, VDS = 20 V; ID = 20 A
51
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Plateau Voltage
VGP
3.2
td(ON)
13
2.0
VGS = 4.5 V, VDS = 20 V; ID = 20 A
nC
8.0
12.7
V
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
td(OFF)
VGS = 4.5 V, VDS = 20 V,
ID = 10 A, RG = 1.0 W
tf
24
ns
27
8.0
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
0.73
TJ = 125°C
0.57
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 5 A
1.2
V
28.6
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 10 A
QRR
14
14.5
23.4
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
ns
nC
NVMFS5832NL
TYPICAL CHARACTERISTICS
ID, DRAIN CURRENT (A)
TJ = 25°C
5.0 V
VDS ≥ 10 V
200
ID, DRAIN CURRENT (A)
10 V
200
4.5 V
150
4.0 V
100
3.5 V
50
150
100
TJ = 25°C
50
TJ = 125°C
3.0 V
0
1
2
3
4
5
2
3
4
5
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.015
0.010
0.005
1
3
2
5
4
6
7
9
8
VGS, GATE−TO−SOURCE VOLTAGE (V)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
VGS, GATE−TO−SOURCE VOLTAGE (V)
ID = 20 A
TJ = 25°C
10
0.007
TJ = 25°C
0.006
VGS = 4.5 V
0.005
0.004
VGS = 10 V
0.003
0.002
10
20
30
40
50
60
70
80
90
100 110
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
100000
2.2
2.0
TJ = −55°C
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
0.020
0.000
0
0
VGS = 0 V
VGS = 10 V
ID = 20 A
1.8
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0
1.6
1.4
1.2
1.0
TJ = 150°C
10000
TJ = 125°C
1000
0.8
0.6
−50 −25
0
25
50
75
100
125
150
175
100
10
20
30
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
40
NVMFS5832NL
TYPICAL CHARACTERISTICS
C, CAPACITANCE (pF)
3500
Ciss
3000
2500
2000
1500
1000
Coss
500
0
Crss
0
10
20
30
VGS, GATE−TO−SOURCE VOLTAGE (V)
VGS = 0 V
TJ = 25°C
40
VDS
70
VGS
60
6
50
Qgs
4
40
Qgd
30
20
2
ID = 20 A
TJ = 25°C
0
0
10
20
30
40
50
10
0
60
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Charge
100
1000
IS, SOURCE CURRENT (A)
VDD = 20 V
ID = 20 A
VGS = 4.5 V
100
td(off)
td(on)
tr
10
tf
1
10
100
80
VGS = 0 V
TJ = 25°C
60
40
20
0
0.5
0.6
0.7
0.8
0.9
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
ID, DRAIN CURRENT (A)
t, TIME (ns)
80
8
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1
90
QT
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
10
4000
100
10 ms
100 ms
10
1 ms
0.1
0.01
10 ms
VGS = 10 V
Single Pulse
TC = 25°C
1
RDS(on) Limit
Thermal Limit
Package Limit
0.1
dc
1
10
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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4
100
1.0
NVMFS5832NL
TYPICAL CHARACTERISTICS
RqJA(t) (°C/W) EFFECTIVE TRANSIENT
THERMAL RESISTANCE
100
Duty Cycle = 0.5
10
0.2
0.1
1 0.05
0.02
0.01
0.1
0.01
0.000001
Single Pulse
0.00001
0.0001
0.001
0.01
0.1
PULSE TIME (sec)
Figure 12. Thermal Response
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5
1
10
100
1000
NVMFS5832NL
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE H
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
0.20 C
D
2
A
B
D1
2X
0.20 C
4X
E1
2
1
2
3
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
q
E
c
A1
4
TOP VIEW
C
3X
e
0.10 C
SEATING
PLANE
DETAIL A
A
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
0.10 C
SIDE VIEW
SOLDERING FOOTPRINT*
DETAIL A
3X
8X
0.10
C A B
0.05
c
4X
e/2
1
0.965
4
K
G
0.750
1.000
L
PIN 5
(EXPOSED PAD)
4X
1.270
b
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.15 BSC
4.70
4.90
5.10
3.80
4.00
4.20
6.15 BSC
5.70
5.90
6.10
3.45
3.65
3.85
1.27 BSC
0.51
0.61
0.71
1.20
1.35
1.50
0.51
0.61
0.71
0.05
0.17
0.20
3.00
3.40
3.80
0_
−−−
12 _
1.330
2X
0.905
2X
E2
L1
M
0.495
4.530
3.200
0.475
D2
2X
1.530
BOTTOM VIEW
4.560
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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