MOTOROLA MCM32257BZ25 256k x 32 bit fast static ram module Datasheet

MOTOROLA
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by MCM32257B/D
SEMICONDUCTOR TECHNICAL DATA
256K x 32 Bit
Fast Static RAM Module
The MCM32257B is an 8M bit static random access memory module organized as 262,144 words of 32 bits. The module is a 64–lead zig–zag in–line package (ZIP) of eight MCM6229 fast static RAMs packaged in 28–lead SOJ
packages and mounted on a printed circuit board along with eight decoupling capacitors.
The MCM6229 is a high–performance CMOS fast static RAM organized as
262,144 words of 4 bits, fabricated using high–performance silicon–gate CMOS
technology. Static design eliminates the need for external clocks or timing
strobes, while CMOS circuitry reduces power consumption and provides for
greater reliability.
The MCM32257B is equipped with output enable (G) and four separate byte
enable (E1 – E4) inputs, allowing for greater system flexibility. The G input, when
high, will force the outputs to high impedance. Ex high will do the same for byte x.
PD0 and PD1 are reserved for density identification. PD0 and PD1 are connected to ground. These pins can be used to identify the density of the memory
module.
•
•
•
•
•
•
•
•
•
Single 5 V ± 10% Power Supply
Fast Access Time: 15/20/25 ns
Three–State Outputs
Fully TTL Compatible
JEDEC Standard Pinout
Power Requirement: 960/880/840 mA Maximum, Active AC
High Board Density ZIP Package
Byte Operation: Four Separate Chip Enables, One for Each Byte (Eight Bits)
High Quality Four–Layer FR4 PWB with Separate Internal Power and
Ground Planes
• Incorporates Motorola’s State–of–the–Art Fast Static RAMs
PIN NAMES
A0 – A17 . . . . . . . . . . . . . . . . . . . . . . . . . . . Address Inputs
W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Write Enable
G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Enable
E1 – E4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Byte Enables
DQ0 – DQ31 . . . . . . . . . . . . . . . . . . . . . . Data Input/Output
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . + 5 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ground
PD0 – PD1 . . . . . . . . . . . . . . . . . . . . . . . . Package Density
For proper operation of the device, VSS must be connected
to ground.
MCM32257B
PIN ASSIGNMENT
TOP VIEW
64 LEAD ZIP — CASE 871–01
1
VSS
4
3
PD1
DQ1
6
5
DQ8
DQ2
8
7
DQ9
DQ3
10
PD0
2
DQ0
VCC
12
A1
14
9
DQ10
11
DQ11
13
A0
A2
A3
16
15
A5
18
17
A4
19
DQ12
21
DQ13
23
DQ14
25
DQ15
27
VSS
29
A6
31
E2
33
E4
35
A8
37
G
39
DQ24
41
DQ25
DQ26
DQ4
20
DQ5
22
DQ6
24
DQ7
26
W
28
A7
30
E1
32
E3
34
A9
36
VSS
DQ16
38
DQ17
42
40
DQ18
44
43
DQ19
46
45
DQ27
A11
48
47
A10
49
A12
A13
50
A15
52
51
A14
A16
54
53
VCC
DQ20
56
55
A17
DQ21
58
57
DQ28
DQ22
60
59
DQ29
DQ23
62
61
DQ30
64
63
DQ31
VSS
5/95
 Motorola, Inc. 1995
MOTOROLA
FAST SRAM
MCM32257B
6–1
FUNCTIONAL BLOCK DIAGRAM
256K x 32 MEMORY MODULE
DQ0 – DQ3
4
DQ0 – DQ3
DQ16 – DQ19
4
DQ0 – DQ3
A0 – A17
A0 – A17
E
W
E
W
G
G
E1
E3
DQ4 – DQ7
DQ8 – DQ11
4
4
4
DQ0 – DQ3
DQ0 – DQ3
DQ20 – DQ23
A0 – A17
A0 – A17
E
W
E
W
G
G
DQ0 – DQ3
DQ24 – DQ27
4
DQ0 – DQ3
A0 – A17
A0 – A17
E
W
E
W
G
G
E2
E4
4
DQ12 – DQ15
DQ0 – DQ3
DQ28 – DQ31
4
DQ0 – DQ3
A0 – A17
A0 – A17
E
W
E
W
G
G
W
G
VCC
VSS
A0 – A17
PD0 – PD1
MCM32257B
6–2
MOTOROLA FAST SRAM
TRUTH TABLE
Ex
G
W
Mode
VCC Current
Output
Cycle
H
X
X
Not Selected
ISB1 or ISB2
High–Z
—
L
H
H
Read
ICCA
High–Z
—
L
L
H
Read
ICCA
Dout
Read Cycle
L
X
L
Write
ICCA
Din
Write Cycle
ABSOLUTE MAXIMUM RATINGS (Voltages referenced to VSS = 0 V)
Rating
Symbol
Value
Unit
VCC
– 0.5 to 7.0
V
Voltage Relative to VSS
Vin, Vout
– 0.5 to VCC + 0.5
V
Output Current (per I/O)
Iout
± 30
mA
Power Dissipation
PD
8.8
W
Temperature Under Bias
Tbias
– 10 to + 85
°C
Operating Temperature
TA
0 to + 70
°C
Tstg
– 25 to + 125
°C
Power Supply Voltage
Storage Temperatrue
The devices on this module contain circuitry
to protect the inputs against damage due to
high static voltages or electric fields; however,
it is advised that normal precautions be taken
to avoid application of any voltage higher than
maximum rated voltages to these high impedance circuits.
These CMOS memory circuits have been
designed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established. The module is in a test
socket or mounted on a printed circuit board
and transverse air flow of at least 500 linear
feet per minute is maintained.
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED
OPERATING CONDITIONS. Exposure to higher than recommended voltages for
extended periods of time could affect device reliability.
DC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 V ± 10%, TA = 0 to + 70°C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS (Voltages referenced to VSS = 0 V)
Symbol
Min
Max
Unit
Supply Voltage (Operating Voltage Range)
VCC
4.5
5.5
V
Input High Voltage
VIH
2.2
VCC + 0.3*
V
Input Low Voltage
VIL
– 0.5**
0.8
V
Parameter
* VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2 V ac (pulse width ≤ 20 ns)
** VIL (min) = – 3.0 V ac (pulse width ≤ 20 ns)
DC CHARACTERISTICS
Symbol
Min
Max
Unit
Input Leakage Current (All Inputs, Vin = 0 to VCC)
Parameter
Ilkg(I)
—
±8
µA
Output Leakage Current (G, Ex = VIH, Vout = 0 to VCC)
Ilkg(O)
—
±8
µA
ICCA
—
—
—
960
880
840
mA
AC Standby Current (Ex = VIH, Cycle time ≥ tAVAV min)
ISB1
—
320
mA
CMOS Standby Current (Ex ≥ VCC – 0.2 V, All Inputs ≥ VCC – 0.2 V or ≤ 0.2 V)
ISB2
—
40
mA
AC Active Supply Current (G, Ex = VIL, Iout = 0 mA,
Cycle time ≥ tAVAV min)
MCM32257B–15: tAVAV = 15 ns
MCM32257B–20: tAVAV = 20 ns
MCM32257B–25: tAVAV = 25 ns
Output Low Voltage (IOL = + 8.0 mA)
VOL
—
0.4
V
Output High Voltage (IOH = – 4.0 mA)
VOH
2.4
—
V
Symbol
Max
Unit
Cin
48
14
pF
Cout
9
pF
NOTE: Good decoupling of the local power supply should always be used.
CAPACITANCE (f = 1.0 MHz, dV = 3.0 V, TA = 25°C, Periodically Sampled Rather Than 100% Tested)
Characteristic
Input Capacitance
Input/Output Capacitance
MOTOROLA FAST SRAM
(All pins except DQ0 – DQ31 and E1 – E4)
(E1 – E4)
(DQ0 – DQ31)
MCM32257B
6–3
AC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 V ± 10%, TA = 0 to + 70°C, Unless Otherwise Noted)
Input Timing Measurement Reference Level . . . . . . . . . . . . . . . 1.5 V
Output Timing Reference Level . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 V
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 3.0 V
Output Load . . . . . . . . . . . . See Figure 1A Unless Otherwise Noted
Input Rise/Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 ns
READ CYCLE TIMING (See Notes 1 and 2)
MCM32257B–15
Parameter
MCM32257B–20
MCM32257B–25
Symbol
Min
Max
Min
Max
Min
Max
Unit
Notes
Read Cycle Time
tAVAV
15
—
20
—
25
—
ns
3
Address Access Time
tAVQV
—
15
—
20
—
25
ns
Enable Access Time
tELQV
—
15
—
20
—
25
ns
Output Enable Access Time
tGLQV
—
8
—
9
—
10
ns
Output Hold from Address Change
tAXQX
5
—
5
—
5
—
ns
Enable Low to Output Active
tELQX
5
—
5
—
5
—
ns
4,5,6
Output Enable to Output Active
tGLQX
0
—
0
—
0
—
ns
4,5,6
Enable High to Output High–Z
tEHQZ
0
6
0
7
0
8
ns
4,5,6
Output Enable High to Output High–Z
tGHQZ
0
6
0
7
0
8
ns
4,5,6
Power Up Time
tELICCH
0
—
0
—
0
—
ns
Power Down Time
tEHICCL
—
15
—
20
—
25
ns
NOTES:
1. W is high for read cycle.
2. E1 – E4 are represented by E in these timing specifications, any combination of Exs may be asserted.
3. All read cycle timing is referenced from the last valid address to the first transitioning address.
4. At any given voltage and temperature, tEHQZ max is less than tELQX min, and tGHQZ max is less than tGLQX min, both for a given
device and from device to device.
5. Transition is measured ± 500 mV from steady–state voltage with load of Figure 1B.
6. This parameter is sampled and not 100% tested.
7. Device is continuously selected (E = VIL, G = VIL). See Read Cycle 1.
TIMING LIMITS
AC TEST LOADS
+5V
RL = 50 Ω
OUTPUT
480 Ω
OUTPUT
Z0 = 50 Ω
255 Ω
5 pF
VL = 1.5 V
Figure 1A
MCM32257B
6–4
Figure 1B
The table of timing values shows either a
minimum or a maximum limit for each parameter. Input requirements are specified from
the external system point of view. Thus, address setup time is shown as a minimum
since the system must supply at least that
much time (even though most devices do not
require it). On the other hand, responses from
the memory are specified from the device
point of view. Thus, the access time is shown
as a maximum since the device never provides data later than that time.
MOTOROLA FAST SRAM
READ CYCLE 1 (See Note 7 Above)
tAVAV
A (ADDRESS)
tAXQX
Q (DATA OUT)
PREVIOUS DATA VALID
DATA VALID
tAVQV
READ CYCLE 2 (See Note)
tAVAV
A (ADDRESS)
tELQV
Ex (BYTE ENABLE)
tEHQZ
tELQX
G (OUTPUT ENABLE)
tGLQV
tGHQZ
tGLQX
Q (DATA OUT)
DATA VALID
tAVQV
VCC SUPPLY CURRENT
ICC
tELICCH
tEHICCL
ISB
NOTE: Addresses valid prior to or coincident with E going low.
MOTOROLA FAST SRAM
MCM32257B
6–5
WRITE CYCLE 1 (W Controlled, See Notes 1 and 2)
MCM32257B–15
Parameter
Write Cycle Time
MCM32257B–20
MCM32257B–25
Symbol
Min
Max
Min
Max
Min
Max
Unit
Notes
tAVAV
15
—
20
—
25
—
ns
3
Address Setup Time
tAVWL
0
—
0
—
0
—
ns
Address Valid to End of Write
tAVWH
12
—
15
—
17
—
ns
Write Pulse Width
tWLWH,
tWLEH
12
—
15
—
17
—
ns
Data Valid to End of Write
tDVWH
7
—
8
—
10
—
ns
Data Hold Time
tWHDX
0
—
0
—
0
—
ns
Write Low to Data High–Z
tWLQZ
0
6
0
7
0
8
ns
4,5,6
Write High to Output Active
tWHQX
5
—
5
—
5
—
ns
4,5,6
Write Recovery Time
tWHAX
0
—
0
—
0
—
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. E1 – E4 are represented by E in these timing specifications, any combination of Exs may be asserted. G is a don‘t care when W is low.
3. All write cycle timing is referenced from the last valid address to the first transitioning address.
4. Transition is measured ± 500 mV from steady–state voltage with load of Figure 1B.
5. This parameter is sampled and not 100% tested.
6. At any given voltage and temperature, tWLQZ max is less than tWHQX min both for a given device and from device to device.
WRITE CYCLE 1
tAVAV
A (ADDRESS)
tAVWH
tWHAX
Ex (BYTE ENABLE)
tWLWH
W (WRITE ENABLE)
tAVWL
tDVWH
DATA VALID
D (DATA IN)
tWLQZ
Q (DATA OUT)
MCM32257B
6–6
tWHDX
HIGH–Z
tWHQX
HIGH–Z
MOTOROLA FAST SRAM
WRITE CYCLE 2 (E Controlled, See Notes 1 and 2)
MCM32257B–15
Parameter
MCM32257B–20
MCM32257B–25
Symbol
Min
Max
Min
Max
Min
Max
Unit
Notes
Write Cycle Time
tAVAV
15
—
20
—
25
—
ns
3
Address Setup Time
tAVEL
0
—
0
—
0
—
ns
Address Valid to End of Write
tAVEH
12
—
15
—
17
—
ns
Enable to End of Write
tELEH
10
—
12
—
15
—
ns
Enable to End of Write
tELWH
10
—
12
—
15
—
ns
Write Pulse Width
tWLEH
10
—
12
—
15
—
ns
Data Valid to End of Write
tDVEH
7
—
8
—
10
—
ns
Data Hold Time
tEHDX
0
—
0
—
0
—
ns
Write Recovery Time
tEHAX
0
—
0
—
0
—
ns
4,5
NOTES:
1. A write occurs during the overlap of E low and W low.
2. E1 – E4 are represented by E in these timing specifications, any combination of Exs may be asserted. G is a don’t care when W is low.
3. All write cycle timing is referenced from the last valid address to the first transitioning address.
4. If E goes low coincident with or after W goes low, the output will remain in a high impedance condition.
5. If E goes high coincident with or before W goes high, the output will remain in a high impedance condition.
WRITE CYCLE 2
tAVAV
A (ADDRESS)
tAVEH
Ex (BYTE ENABLE)
tELEH
tELWH
tAVEL
tEHAX
W (WRITE ENABLE)
tWLEH
tDVEH
DATA VALID
D (DATA IN)
tEHDX
HIGH–Z
Q (DATA OUT)
ORDERING INFORMATION
(Order by Full Part Number)
MCM
32257B
X
XX
Motorola Memory Prefix
Speed (15 = 15 ns, 20 = 20 ns, 25 = 25 ns)
Part Number
Package (Z = ZIP Module)
Full Part Numbers — MCM32257BZ15
MOTOROLA FAST SRAM
MCM32257BZ20
MCM32257BZ25
MCM32257B
6–7
PACKAGE DIMENSIONS
64 LEAD
ZIP PACKAGE
CASE 871–01
-AP
P
A
S
-B-T-
K
N
SEATING
PLANE
DETAIL B
G 62 PL
A
V
U
R
L
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
DETAIL C
G
C
Y
E
H
W
DETAIL C
CARD EDGE
SEATING PLANE
X
DETAIL B
0.25 (0.010) M T A
F
S
J 64 PL
B S
DIM
A
B
C
D
E
F
G
H
J
K
L
N
P
R
S
U
V
W
X
INCHES
MIN
MAX
3.640 3.660
—
0.550
—
0.370
0.015 0.025
0.035 0.055
0.040 0.055
0.050 BSC
0.100 BSC
0.008 0.014
0.120 0.160
3.345 3.355
0.010 0.055
0.045 0.055
0.135 0.165
—
0.100
1.550 REF
0.250 REF
—
0.345
—
0.150
MILLIMETERS
MIN
MAX
92.46 92.96
—
13.97
—
9.40
0.38
0.64
0.89
1.40
1.02
1.40
1.27 BSC
2.54 BSC
0.20
0.36
3.05
4.06
84.96 85.22
0.25
1.40
1.14
1.40
3.43
4.19
—
2.54
39.37 REF
6.35 REF
—
8.76
—
3.81
H
D 64 PL
0.25 (0.010)
M
T A
S
B
S
VIEW A-A
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
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applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does
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MCM32257B
6–8
◊
*MCM32257B/D*
MCM32257B/D
MOTOROLA FAST
SRAM
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