LMH6639 www.ti.com SNOS989G – JANUARY 2002 – REVISED MARCH 2013 LMH6639 190MHz Rail-to-Rail Output Amplifier with Disable Check for Samples: LMH6639 FEATURES DESCRIPTION • • • • • • • • • • • • The LMH6639 is a voltage feedback operational amplifier with a rail-to-rail output drive capability of 110mA. Employing TI’s patented VIP10 process, the LMH6639 delivers a bandwidth of 190MHz at a current consumption of only 3.6mA. An input common mode voltage range extending to 0.2V below the V− and to within 1V of V+, makes the LMH6639 a true single supply op-amp. The output voltage range extends to within 30mV of either supply rail providing the user with a dynamic range that is especially desirable in low voltage applications. 1 2 • • • • (VS = 5V, Typical Values Unless Specified) Supply Current (No Load) 3.6mA Supply Current (Off Mode) 400μA Output Resistance (Closed Loop 1MHz) 0.186Ω −3dB BW (AV = 1) 190MHz Settling Time 33nsec Input Common Mode Voltage −0.2V to 4V Output Voltage Swing 40mV from Rails Linear Output Current 110mA Total Harmonic Distortion −60dBc Fully Characterized for 3V, 5V and ±5V No Output Phase Reversal with CMVR Exceeded Excellent Overdrive Recovery Off Isolation 1MHz −70dB Differential Gain 0.12% Differential Phase 0.045° The LMH6639 offers a slew rate of 172V/μs resulting in a full power bandwidth of approximately 28MHz. The LMH6639 also offers protection for the input transistors by using two anti-parallel diodes and a series resistor connected across the inputs. The TON value of 83nsec combined with a settling time of 33nsec makes this device ideally suited for multiplexing applications (see application note for details). Careful attention has been paid to ensure device stability under all operating voltages and modes. The result is a very well behaved frequency response characteristic for any gain setting including +1, and excellent specifications for driving video cables including harmonic distortion of −60dBc, differential gain of 0.12% and differential phase of 0.045° APPLICATIONS • • • • • Active Filters CD/DVD ROM ADC Buffer Amplifier Portable Video Current Sense Buffer 100n 5V + + INPUT 1k V OUT 75: - SD V - 75: 75: VREF 1k 10n SHUTDOWN INPUT Figure 1. Typical Single Supply Schematic 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2002–2013, Texas Instruments Incorporated LMH6639 SNOS989G – JANUARY 2002 – REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) 2KV (3) ESD Tolerance 200V (4) VIN Differential ±2.5V Input Current ±10mA Supply Voltage (V+ – V−) 13.5V V+ +0.8V, V− −0.8V Voltage at Input/Output pins −65°C to +150°C Storage Temperature Range Junction Temperature (5) (6) +150°C Soldering Information (1) (2) (3) (4) (5) (6) Infrared or Convection (20 sec) 235°C Wave Soldering (10 sec) 260°C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Human body model, 1.5kΩ in series with 100pF. Machine Model, 0Ω in series with 200pF. The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board. Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C. Operating Ratings (1) Supply Voltage (V+ to V−) Operating Temperature Range 3V to 12V (2) Package Thermal Resistance (θJA) (2) (1) (2) −40°C to +85°C SOT-23-6 265°C/W SOIC-8 190°C/W Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board. 3V Electrical Characteristics Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 3V, V− = 0V, VO = VCM = V+/2, and RL = 2kΩ to V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter −3dB BW BW Conditions AV = +1 AV = −1 Min (1) Typ (2) 120 170 63 Max (1) Units MHz BW0.1dB 0.1dB Gain Flatness RF = 2.65kΩ , RL = 1kΩ, 16.4 MHz FPBW Full Power Bandwidth AV = +1, VOUT = 2VPP, −1dB V+ = 1.8V, V− = 1.2V 21 MHz GBW Gain Bandwidth product AV = +1 83 MHz en Input-Referred Voltage Noise RF = 33kΩ in Input-Referred Current Noise THD (1) (2) 2 Total Harmonic Distortion RF = 1MΩ f = 10kHz 19 f = 1MHz 16 f = 10kHz 1.30 f = 1MHz 0.36 f = 5MHz, VO = 2VPP, AV = +2, RL = 1kΩ to V+/2 −50 nV/√Hz pA/√Hz dBc All limits are ensured by testing or statistical analysis. Typical values represent the most likely parametric norm. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 LMH6639 www.ti.com SNOS989G – JANUARY 2002 – REVISED MARCH 2013 3V Electrical Characteristics (continued) Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 3V, V− = 0V, VO = VCM = V+/2, and RL = 2kΩ to V+/2. Boldface limits apply at the temperature extremes. Symbol TS Parameter Settling Time SR Slew Rate VOS Input Offset Voltage TC VOS Input Offset Average Drift Conditions Min (1) VO = 2VPP, ±0.1% AV = −1 (3) Typ (2) Units 37 120 See (4) ns 167 1.01 See Max (1) V/μs 5 7 μV/°C 8 (5) mV −1.02 −2.6 −3.5 μA 20 800 1000 nA IB Input Bias Current IOS Input Offset Current RIN Common Mode Input Resistance AV = +1, f = 1kHz, RS = 1MΩ 6.1 MΩ CIN Common Mode Input Capacitance AV = +1, RS = 100kΩ 1.35 pF CMVR Input Common-Mode Voltage Range CMRR ≥ 50dB −0.3 1.8 1.6 Common Mode Rejection Ratio See (6) 72 93 AVOL Large Signal Voltage Gain VO = 2VPP, RL = 2kΩ to V+/2 80 76 100 VO = 2VPP, RL = 150Ω to V+/2 74 70 78 RL = 2kΩ to V+/2, VID = 200mV 2.90 2.98 RL = 150Ω to V+/2, VID = 200mV 2.75 2.93 2.6 2.85 Output Swing High + RL = 50Ω to V /2, VID = 200mV Output Swing Low Output Short Circuit Current V 25 75 75 200 130 300 Sourcing to V+/2 (7) 50 35 120 Sinking to V+/2 (7) 67 40 140 IOUT Output Current VO = 0.5V from either supply PSRR Power Supply Rejection Ratio See (6) IS Supply Current (Enabled) No Load 72 Supply Current (Disabled) mV mA 99 mA 96 dB 3.5 5.6 7.5 0.3 0.5 0.7 mA V+−1.59 V −13 μA On Time After Shutdown 83 nsec Off Time to Shutdown 160 nsec TH_SD Threshold Voltage for Shutdown Mode I_SD PIN Shutdown Pin Input Current TON TOFF ROUT Output Resistance Closed Loop (3) (4) (5) (6) (7) (8) dB RL = 150Ω to V+/2, VID = −200mV RL = 50Ω to V /2, VID = −200mV ISC dB RL = 2kΩ to V+/2, VID = −200mV + V 2 CMRR VO −0.2 −0.1 SD Pin Connect to 0V (8) RF = 10kΩ, f = 1kHz, AV = −1 27 RF = 10kΩ, f = 1MHz, AV = −1 266 mΩ Slew rate is the average of the rising and falling slew rates. Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change. Positive current corresponds to current flowing into the device. f ≤ 1kHz (see typical performance Characteristics) Short circuit test is a momentary test. Positive current corresponds to current flowing into the device. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 3 LMH6639 SNOS989G – JANUARY 2002 – REVISED MARCH 2013 www.ti.com 5V Electrical Characteristics Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 5V, V− = 0V, VO = VCM = V+/2, and RL = 2kΩ to V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter −3dB BW BW Min (1) Conditions AV = +1 130 AV = −1 Typ (2) Max (1) 190 Units MHz 64 BW0.1dB 0.1dB Gain Flatness RF = 2.51kΩ, RL = 1kΩ, 16.4 MHz FPBW Full Power Bandwidth AV = +1, VOUT = 2VPP, −1dB 28 MHz GBW Gain Bandwidth Product AV = +1 86 MHz en Input-Referred Voltage Noise RF = 33kΩ in Input-Referred Current Noise RF = 1MΩ f = 10kHz 19 f = 1MHz 16 f = 10KHz 1.35 f = 1MHz 0.35 nV/√Hz pA/√Hz THD Total Harmonic Distortion f = 5MHz, VO = 2VPP, AV = +2 RL = 1kΩ to V+/2 −60 dBc DG Differential Gain NTSC, AV = +2 RL = 150Ω to V+/2 0.12 % DP Differential Phase NTSC, AV = +2 RL = 150Ω to V+/2 0.045 deg TS Settling Time VO = 2VPP, ±0.1% SR Slew Rate AV = −1 (3) VOS Input Offset Voltage TC VOS Input Offset Average Drift See (4) 8 IB Input Bias Current See (5) −1.2 −2.6 −3.25 µA IOS Input Offset Current 20 800 1000 nA RIN Common Mode Input Resistance AV = +1, f = 1kHz, RS = 1MΩ 6.88 MΩ CIN Common Mode Input Capacitance AV = +1, RS = 100kΩ 1.32 pF CMVR Common-Mode Input Voltage Range CMRR ≥ 50dB −0.3 −0.2 −0.1 4 3.8 3.6 130 33 ns 172 V/µs 1.02 CMRR Common Mode Rejection Ratio See (6) 72 95 AVOL Large Signal Voltage Gain VO = 4VPP RL = 2kΩ to V+/2 86 82 100 VO = 3.75VPP RL = 150Ω to V+/2 74 70 77 RL = 2kΩ to V+/2, VID = 200mV 4.90 4.97 RL = 150Ω to V+/2, VID = 200mV 4.65 4.90 RL = 50Ω to V+/2, VID = 200mV 4.40 4.77 VO Output Swing High Output Swing Low (1) (2) (3) (4) (5) (6) 4 RL = 2kΩ to V+/2, VID = −200mV 5 7 mV µV/°C V dB dB V 25 100 + RL = 150Ω to V /2, VID = −200mV 85 200 RL = 50Ω to V+/2, VID = −200mV 190 400 mV All limits are ensured by testing or statistical analysis. Typical values represent the most likely parametric norm. Slew rate is the average of the rising and falling slew rates. Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change. Positive current corresponds to current flowing into the device. f ≤ 1kHz (see typical performance Characteristics) Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 LMH6639 www.ti.com SNOS989G – JANUARY 2002 – REVISED MARCH 2013 5V Electrical Characteristics (continued) Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 5V, V− = 0V, VO = VCM = V+/2, and RL = 2kΩ to V+/2. Boldface limits apply at the temperature extremes. Symbol ISC Parameter Output Short Circuit Current Min (1) Conditions + Sourcing to V /2 (7) Sinking from V+/2 (7) IOUT Output Current 160 120 85 190 Power Supply Rejection Ratio See Supply Current (Enabled) No Load Max (1) Units mA 110 (6) IS (2) 100 79 VO = 0.5V from either supply PSRR Typ 72 mA 96 Supply Current (Disabled) dB 3.6 5.8 8.0 0.40 0.8 1.0 mA V+ −1.65 TH_SD Threshold Voltage for Shutdown Mode I_SD PIN Shutdown Pin Input Current −30 μA TON On Time after Shutdown 83 nsec TOFF Off Time to Shutdown 160 nsec ROUT Output Resistance Closed Loop (7) SD Pin Connected to 0V (5) RF = 10kΩ, f = 1kHz, AV = −1 29 RF = 10kΩ, f = 1MHz, AV = −1 253 V mΩ Short circuit test is a momentary test. ±5V Electrical Characteristics Unless otherwise specified, all limits ensured for at TJ = 25°C, VSUPPLY = ±5V, VO = VCM = GND, and RL = 2kΩ to V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter −3dB BW BW Conditions AV = +1 Min (1) Typ (2) 150 228 AV = −1 65 Max (1) Units MHz BW0.1dB 0.1dB Gain Flatness RF = 2.26kΩ, RL = 1kΩ 18 MHz FPBW Full Power Bandwidth AV = +1, VOUT = 2VPP, −1dB 29 MHz GBW Gain Bandwidth Product AV = +1 90 MHz en Input-Referred Voltage Noise RF = 33kΩ in Input-Referred Current Noise RF = 1MΩ f = 10kHz 19 f = 1MHz 16 f = 10kHz 1.13 f = 1MHz 0.34 nV/√Hz pA/√Hz THD Total Harmonic Distortion f = 5MHz, VO = 2VPP, AV = +2, RL = 1kΩ −71.2 dBc DG Differential Gain NTSC, AV = +2 RL = 150Ω 0.11 % DP Differential Phase NTSC, AV = +2 RL = 150Ω 0.053 deg TS Settling Time VO = 2VPP, ±0.1% SR Slew Rate AV = −1 (3) VOS Input Offset Voltage TC VOS Input Offset Voltage Drift IB (1) (2) (3) (4) (5) Input Bias Current 140 33 ns 200 V/µs 1.03 See (4) See (5) 5 7 8 −1.40 mV µV/°C −2.6 −3.25 µA All limits are ensured by testing or statistical analysis. Typical values represent the most likely parametric norm. Slew rate is the average of the rising and falling slew rates. Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change. Positive current corresponds to current flowing into the device. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 5 LMH6639 SNOS989G – JANUARY 2002 – REVISED MARCH 2013 www.ti.com ±5V Electrical Characteristics (continued) Unless otherwise specified, all limits ensured for at TJ = 25°C, VSUPPLY = ±5V, VO = VCM = GND, and RL = 2kΩ to V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (1) Typ (2) Max (1) Units 20 800 1000 nA IOS Input Offset Current RIN Common Mode Input Resistance AV +1, f = 1kHz, RS = 1MΩ 7.5 MΩ CIN Common Mode Input Capacitance AV = +1, RS = 100kΩ 1.28 pF CMVR Common Mode Input Voltage Range CMRR ≥ 50dB −5.3 3.8 3.6 4.0 CMRR Common Mode Rejection Ratio See (6) 72 95 AVOL Large Signal Voltage Gain VO = 9VPP, RL = 2kΩ 88 84 100 VO = 8VPP, RL = 150Ω 74 70 77 RL = 2kΩ, VID = 200mV 4.85 4.96 RL = 150Ω, VID = 200mV 4.55 4.80 RL = 50Ω, VID = 200mV 3.60 VO Output Swing High Output Swing Low Output Short Circuit Current 4.55 −4.90 −4.85 −4.55 −4.65 −4.30 Sourcing to Ground (7) 100 80 168 Sinking to Ground (7) 110 85 190 Output Current VO = 0.5V from either supply Power Supply Rejection Ratio See (8) IS Supply Current (Enabled) No Load Supply Current (Disabled) 72 V mA 112 mA 96 dB 4.18 6.5 8.5 0.758 1.0 1.3 mA V+ − 1.67 V −84 μA On Time after Shutdown 83 nsec Off Time to Shutdown 160 nsec TH_SD Threshold Voltage for Shutdown Mode I_SD PIN Shutdown Pin Input Current TON TOFF ROUT Output Resistance Closed Loop 6 V RL = 150Ω, VID = −200mV PSRR (6) (7) (8) (9) dB −4.97 IOUT V dB RL = 2kΩ, VID = −200mV RL = 50Ω, VID = −200mV ISC −5.2 −5.1 SD Pin Connected to −5V (9) RF = 10kΩ, f = 1kHz, AV = −1 32 RF = 10kΩ, f = 1MHz, AV = −1 226 mΩ f ≤ 1kHz (see typical performance Characteristics) Short circuit test is a momentary test. f ≤ 1kHz (see typical performance Characteristics) Positive current corresponds to current flowing into the device. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 LMH6639 www.ti.com SNOS989G – JANUARY 2002 – REVISED MARCH 2013 Connection Diagram 6 1 OUTPUT 5 V - 2 + +IN V + N/C -IN +IN 4 2 8 - 7 SD - 3 1 -IN V Figure 2. SOT-23-6 Top View - 3 4 + 6 5 SD + V OUTPUT N/C Figure 3. SOIC-8 Top View Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 7 LMH6639 SNOS989G – JANUARY 2002 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics − + At TJ = 25°C, V = +2.5, V = −2.5V, RF = 330Ω for AV = +2, RF = 1kΩ for AV = −1. Unless otherwise specified. Output Sinking Saturation Voltage vs. IOUT for Various Temperature Output Sourcing Saturation Voltage vs. IOUT for Various Temperature 1 1 85°C 0.9 0.8 0.8 0.7 0.7 85°C + - VOUT FROM V (V) 25°C 125°C VOUT FROM V (V) 125°C 0.9 0.6 0.5 0.4 -40°C 0.3 0.6 25°C 0.5 0.4 -40°C 0.3 0.2 0.2 0.1 0.1 VS=±2.5V 0 0 VS=±2.5V 0 20 40 60 80 100 120 140 160 180 200 0 20 40 60 80 100 120 140 160 180 200 ISOURCING (mA) ISINK (mA) Figure 4. Figure 5. Positive Output Saturation Voltage vs. VSUPPLY for Various Temperature Negative Output Saturation Voltage vs. VSUPPLY for Various Temperature 0.2 125°C SATURATION VOLTAGE FROM V- (V) + SATURATION VOLTAGE FROM V (V) 0.2 0.18 0.16 85°C 0.14 0.12 0.1 -40°C 0.08 0.06 25°C 0.04 RL = 150: TIED TO VS/ 2 0.02 0 2 4 6 8 0.18 125°C 0.16 85°C 0.14 0.12 0.1 0.08 0.04 RL=150: TIED TO VS/2 0.02 0 10 2 12 4 6 Figure 6. Figure 7. VOUT from V+ vs. ISOURCE VOUT from V− vs. ISINK VS=±5V VS=±5V VOUT FROM V (V) 1 1 - + 12 10 10 VOUT FROM V (V) 10 8 VS (V) VS (V) 125°C -40°C 0.1 125°C 25°C 85°C 85°C 0.01 0.1 1 100 10 ISOURCE (mA) -40°C 0.1 25°C 1000 0.01 0.1 Figure 8. 8 -40°C 25°C 0.06 1 10 ISINK (mA) 100 1000 Figure 9. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 LMH6639 www.ti.com SNOS989G – JANUARY 2002 – REVISED MARCH 2013 Typical Performance Characteristics (continued) − + At TJ = 25°C, V = +2.5, V = −2.5V, RF = 330Ω for AV = +2, RF = 1kΩ for AV = −1. Unless otherwise specified. IOS vs. VS for Various Temperature VOS vs. VS for 3 Representative Units 1 0.01 TJ = 125°C 125°C 0 0.5 -0.01 UNIT 1 85°C 25°C -0.02 VOS (mV) IOS (nA) 0 -0.03 UNIT 2 -0.5 -1 -0.04 UNIT 3 -40°C -1.5 -0.05 -0.06 -2 2 8 6 4 10 12 2 3 4 5 VS (V) 7 8 10 9 Figure 10. Figure 11. VOS vs. VS for 3 Representative Units VOS vs. VS for 3 Representative Units 0.6 1 TJ = 85°C 0.4 0.5 0.2 VOS (mV) 0 UNIT 2 -0.5 UNIT 1 TJ = 25°C 0 UNIT 1 VOS (mV) 6 VS (V) -0.2 UNIT 2 -0.4 -0.6 UNIT 3 -0.8 -1 UNIT 3 -1 -1.2 -1.5 2 3 4 5 7 6 8 9 2 10 3 4 6 7 8 10 9 Figure 12. Figure 13. VOS vs. VS for 3 Representative Units ISUPPLY vs. VCM for Various Temperature 7 0.6 6.5 0.4 VS=10V 6 UNIT 1 0.2 125°C 5.5 0 IS (mA) VOS (mV) 5 VS (V) VS (V) UNIT 2 -0.2 TJ= -40°C -0.4 UNIT 3 5 85°C 4.5 4 3.5 -0.6 25°C 3 -0.8 2.5 -1 2 -40°C 2 3 4 5 6 7 8 9 10 VS (V) Figure 14. -1 0 1 2 3 4 5 VCM (V) 6 7 8 9 10 Figure 15. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 9 LMH6639 SNOS989G – JANUARY 2002 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) − + At TJ = 25°C, V = +2.5, V = −2.5V, RF = 330Ω for AV = +2, RF = 1kΩ for AV = −1. Unless otherwise specified. ISUPPLY vs. VS for Various Temperature IB vs. VS for Various Temperature -1 7 125°C 6.5 -1.2 6 -1.6 5 IB (µA) IS (mA) 5.5 -40°C -1.4 85°C 4.5 25°C 4 -1.8 25°C -2 3.5 -2.2 -40°C 3 85°C -2.4 2.5 125°C -2.6 2 2 3 4 5 6 7 9 8 10 4 2 11 VS (V) Figure 16. 1 0 8 6 VS (V) Figure 17. Bandwidth for Various VS Bandwidth for Various VS 6 6 VS = 3V 3V 0 3 0 -6 VS = 10V 5V -3 dB dB -12 10V -6 -18 -9 -24 3V 5V -12 AV = +1 -30 RL = 500: -15 1M AV = -1 10M 100M 300M 10M Figure 18. Figure 19. Gain vs. Frequency Normalized Gain vs. Frequency Normalized 5 5 0 0 -5 -5 -20 -25 AV = +1 -20 AV = -5 -25 AV = +5 -30 AV = +10 RL = 500: -45 10k 1M 10M 100k FREQUENCY (Hz) AV = -10 -35 -40 -40 100M 300M RL - 500: -45 10k 100k 1M 10M 100M 300M FREQUENCY (Hz) Figure 20. 10 AV = -2 -15 AV = +2 -30 -35 300M AV = -1 -10 dB dB -15 100M FREQUENCY (Hz) FREQUENCY (Hz) -10 10V RL = 500: -36 1M Figure 21. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 LMH6639 www.ti.com SNOS989G – JANUARY 2002 – REVISED MARCH 2013 Typical Performance Characteristics (continued) − + At TJ = 25°C, V = +2.5, V = −2.5V, RF = 330Ω for AV = +2, RF = 1kΩ for AV = −1. Unless otherwise specified. Gain and phase vs. Frequency for Various Temperature 0.1dB Gain Flatness 70 140 PHASE 85/25/ & -40°C 60 0.00 10V 3V + - RS -0.40 GAIN (dB) dB -0.20 RF -0.60 RS = 1k 50 100 40 80 30 60 20 40 5V 0 GAIN 85/25/ & -40°C -10 RF = 2.51k VS = 5V -40 1 10M M FREQUENCY (Hz) -30 100k 100M 1M 10M Figure 23. Frequency Response vs. Temperature Harmonic Distortion 10 -40 85°C 5 -50 DISTORTION (dBc) 0 -5 dB -60 100M 200M FREQUENCY (Hz) Figure 22. 25°C -10 -40°C -15 -20 -20 -20 RF = 2.26k VS = 10V -1.00 100k 20 10 0 RF = 2.65k VS = 3V -0.80 THD -60 3rd 2nd -70 3rd 2nd -80 f = 5MHz A = +2 4th AV = +1 -90 RL = 1k RL = 500: -25 100k VS = 5V 10 M FREQUENCY (Hz) 1M -100 100M 300M 1 2.5 3 3.5 4 4.5 4.75 On-Off Switching DC Voltage 0.07 0.12 VS = 5V 0.1 RL = 150: f = 3.58MHz 0.08 0.06 0.05 0.04 0.03 PHASE 0.04 0.02 0.02 0.01 0 0.00 -0.02 -0.01 -0.04 -0.02 -0.06 -0.03 -0.08 -0.1 -0.04 -25 0 25 50 SHUTDOWN PULSE VOLT GAIN DIFF PHASE (°) DIFF GAIN (%) Differential Gain/Phase -50 2 Figure 25. 0.14 -100 -75 1.5 OUTPUT VOLTAGE (VPP) Figure 24. 0.06 120 PHASE (°) 0.20 -0.05 75 100 0.8 SWITCHED DC VOLTAGE 0.3 AV = 2 0 -0.2 80 ns/DIV IRE Figure 26. Figure 27. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 11 LMH6639 SNOS989G – JANUARY 2002 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) − + At TJ = 25°C, V = +2.5, V = −2.5V, RF = 330Ω for AV = +2, RF = 1kΩ for AV = −1. Unless otherwise specified. On-Off Switching 10MHz Slew Rate (Positive) 1.50 OUTPUT 1.00 SHUTDOWN PULSE 0.50 VOLT VOLT 0.6 0.4 0.2 0.00 -0.50 0 SWITCHED 10MHz SIGNAL -0.2 INPUT AV = 2 -1.00 -0.4 -0.6 -1.50 100 ns/DIV 4 ns/DIV Figure 28. Figure 29. Slew Rate (Negative) On-Off Switching of Sinewave 1.50 SHUTDOWN PULSE INPUT 1.00 VOLT VOLT 0.50 0.00 1.00 0.00 OUTPUT -0.50 -1.00 -1.00 AV = +2 -2.00 -1.50 4 ns/DIV 25 ms/DIV Figure 30. Figure 31. Power Sweep CMRR vs. Frequency 120 20 1MHz AV = +1 15 VS = 5V VS = 10V 100 10MHz 10 80 dB OUTPUT (dBm) 25MHz 5 50MHz 60 VS = 3V 0 40 100MHz -5 20 -10 -15 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 14 16 INPUT (dBm) Figure 32. 12 VS = 5V 0 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 33. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 LMH6639 www.ti.com SNOS989G – JANUARY 2002 – REVISED MARCH 2013 Typical Performance Characteristics (continued) − + At TJ = 25°C, V = +2.5, V = −2.5V, RF = 330Ω for AV = +2, RF = 1kΩ for AV = −1. Unless otherwise specified. PSRR vs. Frequency Current Noise 80 6 VS = 3V TO 10V (pA/ Hz) NEGATIVE PSRR 70 60 4 INPUT CURRENT NOISE 50 POSITIVE PSRR dB RF = 1M 5 40 30 20 VS = 5V 10 3 2 1 AV = +1 0 10 100 10k 100k 1k FREQUENCY (Hz) 1M 0 1k 10M 100k 10k FREQUENCY (Hz) 1M Figure 34. Figure 35. Voltage Noise Closed Loop Output Resistance vs. Frequency 1000 40 VS = 3V TO 10V 900 35 RF = RS = 10k 3V AV = -1 800 30 700 600 m: en(nV/ Hz) 5V 25 20 500 400 15 300 10 200 10V 5 100 0 100 0 1k 10k 100k 1M 10M 100k 10k FREQUENCY (Hz) 1k FREQUENCY (Hz) 1M 10M Figure 36. Figure 37. Off Isolation Small Signal Pulse Response (AV = +1, RL = 2k ) -10 -20 -30 50 mV/DIV AV = +1 dB -40 -50 AV = +2 -60 -70 -80 1k VS = 3 to 10V 10k 100k 1M 10M 100M 50 ns/DIV FREQUENCY (Hz) Figure 38. Figure 39. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 13 LMH6639 SNOS989G – JANUARY 2002 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) + − At TJ = 25°C, V = +2.5, V = −2.5V, RF = 330Ω for AV = +2, RF = 1kΩ for AV = −1. Unless otherwise specified. Small Signal Pulse Response (AV = −1) Large Signal Pulse Response (RL = 2k) VS = 3V AV = +1 RL = 100: 0.5 V/DIV 50 mV/DIV CL = ~ 5pF VS = 3 to 10V CL = 10pF RS = 10: 50 ns/DIV 50 ns/DIV Figure 40. Figure 41. Large Signal Pulse Response Large Signal Pulse Response VS = 10V AV = +1 AV = +1 RL = 100: RL = 100: CL = ~5pF CL = ~ 5pF 0.5 V/DIV 0.5 V/DIV VS = 5V 50 ns/DIV 50 ns/DIV Figure 42. 14 Figure 43. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 LMH6639 www.ti.com SNOS989G – JANUARY 2002 – REVISED MARCH 2013 APPLICATION NOTES INPUT AND OUTPUT TOPOLOGY All input / output pins are protected against excessive voltages by ESD diodes connected to V+ and V- rails (see Figure 44). These diodes start conducting when the input / output pin voltage approaches 1Vbe beyond V+ or Vto protect against over voltage. These diodes are normally reverse biased. Further protection of the inputs is provided by the two resistors (R in Figure 44), in conjunction with the string of anti-parallel diodes connected between both bases of the input stage. The combination of these resistors and diodes reduces excessive differential input voltages approaching 2Vbe. The most common situation when this occurs is when the device is put in shutdown and the LMH6639’s inputs no longer follow each other. In such a case, the diodes may conduct. As a consequence, input current increases, and a portion of signal may appear at the Hi-Z output. Another possible situation for the conduction of these diodes is when the LMH6639 is used as a comparator (or with little or no feedback). In either case, it is important to make sure that the subsequent current flow through the device input pins does not violate the Absolute Maximum Ratings of the device. To limit the current through the protection circuit extra series resistors can be placed. Together with the build in series resistors of several hundred ohms this extra resistors can limit the input current to a safe number depending on the used application. Be aware of the effect that extra series resistors may impact the switching speed of the device. A special situation occurs when the part is configured for a gain of +1, which means the output is directly connected to the inverting input, see Figure 45. When the part is now placed in shutdown mode the output comes in a high impedance state and is unable to keep the inverting input at the same level as the non-inverting input. In many applications the output is connected to the ground via a low impedance resistor. When this situation occurs and there is a DC voltage offset of more than 2 volt between the non-inverting input and the output, current flows from the non-inverting input through the series resistors R via the bypass diodes to the output. Now the input current becomes much bigger than expected and in many cases the source at the input cannot deliver this current and will drop down. Be sure in this situation that no DC current path is available from the non-inverting input to the output pin, or from the output pin to the load resistor. This DC path is drawn by a curved line and can be broken by placing one of the capacitors CIN or COUT or both, depending on the used application. V+ V+ V+ R R IN- IN+ V- V- Figure 44. 5V 2 - 7 6 SD + CIN 3 4 8 COUT 1k Figure 45. DC path while in shutdown Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 15 LMH6639 SNOS989G – JANUARY 2002 – REVISED MARCH 2013 www.ti.com MULTIPLEXING 5 AND 10MHz The LMH6639 may be used to implement a circuit which multiplexes two signals of different frequencies. Three LMH6639 high speed op-amps are used in the circuit of Figure 46 to accomplish the multiplexing function. Two LMH6639 are used to provide gain for the input signals, and the third device is used to provide output gain for the selected signal. 330: 330: 1k 5V 2 6 IC1 3 FREQ 1 5V 7 - 1k 2 - + 7 3 4 50 OUT 8 + 4 330: 6 IC3 8 2k 5V 330: 5V VREF 7 - 6 IC2 + FREQ 2 8 4 50 SD SD Note: Pin numbers pertain to SOIC-8 package Figure 46. Multiplexer Multiplexing signals “FREQ 1” and “FREQ 2” exhibit closed loop non-inverting gain of +2 each based upon identical 330Ω resistors in the gain setting positions of IC1 and IC2. The two multiplexing signals are combined at the input of IC3, which is the third LMH6639. This amplifier may be used as a unity gain buffer or may be used to set a particular gain for the circuit. 1.5 SHUTDOWN 1 VOLT 0.5 0 -0.5 -1 TIME (400 ns/DIV) Figure 47. Switching between 5 and 10MHz 1k resistors are used to set an inverting gain of −1 for IC3 in the circuit of Figure 46. Figure 47 illustrates the waveforms produced. The upper trace shows the switching waveform used to switch between the 5MHz and 10MHz multiplex signals. The lower trace shows the output waveform consisting of 5MHz and 10MHz signals corresponding to the high or low state of the switching signal. 16 Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 LMH6639 www.ti.com SNOS989G – JANUARY 2002 – REVISED MARCH 2013 In the circuit of Figure 46, the outputs of IC1 and IC2 are tied together such that their output impedances are placed in parallel at the input of IC3. The output impedance of the disabled amplifier is high compared both to the output impedance of the active amplifier and the 330Ω gain setting resistors. The closed loop output resistance for the LMH6639 is around 0.2Ω. Thus the active state amplifier output impedance dominates the input node to IC3, while the disabled amplifier is assured of a high level of suppression of unwanted signals which might be present at the output. SHUTDOWN OPERATION With SD pin left floating, the device enters normal operation. However, since the SD pin has high input impedance, it is best tied to V+ for normal operation. This will avoid inadvertent shutdown due to capacitive pickup from nearby nodes. LMH6639 will typically go into shutdown when SD pin is more than 1.7V below V+, regardless of operating supplies. The SD pin can be driven by push-pull or open collector (open drain) output logic. Because the LMH6639's shutdown is referenced to V+, interfacing to the shutdown logic is rather simple, for both single and dual supply operation, with either form of logic used. Typical configurations are shown in Figure 48 and Figure 49 below for push-pull output: + V PUSH-PULL OUTPUT LOGIC GATE VS V - + - + V V - SD LMH6639 Figure 48. Shutdown Interface (Single Supply) V + PUSH-PULL OUTPUT LOGIC GATE V + V - + - V + V V - SD LMH6639 - Figure 49. Shutdown Interface (Dual Supplies) Common voltages for logic gates are +5V or +3V. To ensure proper power on/off with these supplies, the logic should be able to swing to 3.4V and 1.4V minimum, respectively. LMH6639’s shutdown pin can also be easily controlled in applications where the analog and digital sections are operated at different supplies. Figure 50 shows a configuration where a logic output, SD, can turn the LMH6639 on and off, independent of what supplies are used for the analog and the digital sections: Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 17 LMH6639 SNOS989G – JANUARY 2002 – REVISED MARCH 2013 www.ti.com SD V + + + - + V - - V SD LMH6639 Figure 50. Shutdown Interface (Single Supply, Open Collector Logic) The LMH6639 has an internal pull-up resistor on SD such that if left un-connected, the device will be in normal operation. Therefore, no pull-up resistor is needed on this pin. Another common application is where the transistor in Figure 50 above, would be internal to an open collector (open drain) logic gate; the basic connections will remain the same as shown. PCB LAYOUT CONSIDERATION AND COMPONENTS SELECTION Care should be taken while placing components on a PCB. All standard rules should be followed especially the ones for high frequency and/ or high gain designs. Input and output pins should be separated to reduce crosstalk, especially under high gain conditions. A groundplane will be helpful to avoid oscillations. In addition, a ground plane can be used to create micro-strip transmission lines for matching purposes. Power supply, as well as shutdown pin de-coupling will reduce cross-talk and chances of oscillations. Another important parameter in working with high speed amplifiers is the component values selection. Choosing high value resistances reduces the cut-off frequency because of the influence of parasitic capacitances. On the other hand choosing the resistor values too low could "load down" the nodes and will contribute to higher overall power dissipation. Keeping resistor values at several hundreds of ohms up to several kΩ will offer good performance. Texas Instruments suggests the following evaluation boards as a guide for high frequency layout and as an aid in device testing and characterization: 18 Device Package Evaluation Board PN LMH6639MA 8-Pin SOIC CLC730027 LMH6639MF SOT-23-6 CLC730116 Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 LMH6639 www.ti.com SNOS989G – JANUARY 2002 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision F (March 2013) to Revision G Page Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6639 19 PACKAGE OPTION ADDENDUM www.ti.com 27-Jul-2016 PACKAGING INFORMATION Orderable Device Status (1) LMH6639 MDC Package Type Package Pins Package Drawing Qty ACTIVE DIESALE Y 0 400 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -40 to 85 Device Marking (4/5) LMH6639MA NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LMH6639MA/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMH66 39MA LMH6639MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMH66 39MA LMH6639MF NRND SOT-23 DBV 6 1000 TBD Call TI Call TI -40 to 85 LMH6639MF/NOPB ACTIVE SOT-23 DBV 6 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A81A LMH6639MFX/NOPB ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A81A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 27-Jul-2016 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 24-Dec-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LMH6639MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMH6639MF/NOPB SOT-23 DBV 6 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMH6639MFX/NOPB SOT-23 DBV 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 24-Dec-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMH6639MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMH6639MF/NOPB SOT-23 DBV 6 1000 210.0 185.0 35.0 LMH6639MFX/NOPB SOT-23 DBV 6 3000 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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