ON MJD148T4 Npn silicon power transistor Datasheet

MJD148
NPN Silicon Power
Transistor
DPAK For Surface Mount Applications
Designed for general purpose amplifier and low speed switching
applications.
http://onsemi.com
POWER TRANSISTOR
4.0 AMPERES
45 VOLTS, 20 WATTS
Features
• High Gain − 50 Min @ IC = 2.0 A
• Low Saturation Voltage − 0.5 V @ IC = 2.0 A
• High Current Gain − Bandwidth Product − fT = 3.0 MHz Min @
IC = 250 mAdc
MARKING
DIAGRAM
• Epoxy Meets UL 94 V−0 @ 0.125 in
• ESD Ratings: Human Body Model, 3B; >8000 V
•
4
Machine Model, C; >400 V
This is a Pb−Free Package
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1 2
Symbol
Value
Unit
VCEO
45
Vdc
Collector−Base Voltage
VCB
45
Vdc
Emitter−Base Voltage
VEB
5.0
Vdc
IC
4.0
7.0
Adc
Collector−Emitter Voltage
Collector Current
− Continuous
− Peak
AYWW
J148G
3
A
Y
WW
J148
G
MAXIMUM RATINGS
Rating
DPAK
CASE 369C
STYLE 1
= Assembly Location
= Year
= Work Week
= Device Code
= Pb−Free Package
ORDERING INFORMATION
Device
Package
Shipping†
DPAK
2500/Tape & Reel
DPAK
(Pb−Free)
2500/Tape & Reel
Base Current
IB
50
mAdc
MJD148T4
Total Power Dissipation @ TC = 25°C
Derate above 25°C
PD
20
0.16
W
W/°C
MJD148T4G
Total Power Dissipation (Note 1)
@ TA = 25°C
Derate above 25°C
PD
1.75
0.014
W
W/°C
Operating and Storage Junction
Temperature Range
TJ, Tstg
−55 to +150
°C
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Symbol
Max
Unit
Thermal Resistance, Junction−to−Case
RqJC
6.25
°C/W
Thermal Resistance, Junction−to−Ambient
(Note 1)
RqJA
71.4
°C/W
THERMAL CHARACTERISTICS
Characteristic
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. These ratings are applicable when surface mounted on the minimum pad
sizes recommended.
© Semiconductor Components Industries, LLC, 2011
January, 2011 − Rev. 5
1
Publication Order Number:
MJD148/D
MJD148
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ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Characteristic
Test Conditions
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (Note 2)
IC = 100 mAdc, IB = 0
VCEO(sus)
45
−
Vdc
Collector Cutoff Current
VCB = 45 Vdc, IE = 0
ICBO
−
20
mAdc
Emitter Cutoff Current
VBE = 5 Vdc, IC = 0
IEBO
−
1
mAdc
DC Current Gain (Note 2)
IC = 10 mAdc, VCE = 5 Vdc
IC = 0.5 Adc, VCE = 1 Vdc
IC = 2 Adc, VCE = 1 Vdc
IC = 3 Adc, VCE = 1 Vdc
hFE
40
85
50
30
−
375
−
−
−
Collector−Emitter Saturation Voltage (Note 2)
IC = 2 Adc, IB = 0.2 Adc
VCE(sat)
−
0.5
Vdc
Base−Emitter On Voltage (Note 2)
IC = 2 Adc, VCE = 1 Vdc
VBE(on)
−
1.1
Vdc
fT
3
−
MHz
ON CHARACTERISTICS
DYNAMIC CHARACTERISTICS
Current−Gain−Bandwidth Product
IC = 250 mAdc, VCE = 1 Vdc, f = 1 MHz
2. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
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2
MJD148
hFE, DC CURRENT GAIN (NORMALIZED)
10
TYPICAL CHARACTERISTICS
TJ = 150°C
VCE = 2 V
VCE = 10 V
5
3
2
1
= 25°C
0.5
−55°C
0.3
0.2
0.1
0.004
0.007 0.01
0.02
0.03
0.05
0.1
0.2
0.3
IC, COLLECTOR CURRENT (A)
0.5
1
2
3
4
VCE, COLLECTOR−EMITTER VOLTAGE (V)
Figure 1. DC Current Gain
2
TJ = 25°C
1.6
1.2
IC = 10 mA
100 mA
1A
3A
0.8
0.4
0
0.05 0.07 0.1
0.2
0.3
0.5 0.7
1
2
3
5 7 10
IB, BASE CURRENT (mA)
20
30
50 70 100
200 300 500
Figure 2. Collector Saturation Region
+ 2.5
qy, TEMPERATURE COEFFICIENTS
(mV/°C)
2
TJ = 25°C
VOLTAGE (V)
1.6
1.2
0.8
VBE(sat) @ IC/IB = 10
VBE @ VCE = 2 V
0.4
VCE(sat) @ IC/IB = 10
0
0.005 0.01 0.020.030.05 0.1 0.20.3 0.5
1
IC, COLLECTOR CURRENT (A)
2
34
*APPLIES FOR IC/IB ≤ hFE/2
*TJ = − 65°C to + 150°C
+2
+ 1.5
+1
+ 0.5
0
*qV for VCE(sat)
−0.5
−1
−1.5
qV for VBE
−2
−2.5
0.005 0.01 0.020.030.05 0.1 0.20.3 0.5
1
IC, COLLECTOR CURRENT (A)
Figure 3. “On” Voltages
Figure 4. Temperature Coefficients
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3
2
34
MJD148
IC, COLLECTOR CURRENT (mA)
103
102
101
100
VCE = 30 V
TJ = 150°C
100°C
10−1
REVERSE
10−2
25°C
10−3
−0.4 −0.3 −0.2 −0.1
FORWARD
ICES
0
+ 0.1 + 0.2 + 0.3 + 0.4 + 0.5 + 0.6
VBE, BASE−EMITTER VOLTAGE (V)
r(t), TRANSIENT THERMAL RESISTANCE
(NORMALIZED)
Figure 5. Collector Cut−Off Region
1
0.7
0.5
D = 0.5
0.3
0.2
0.2
P(pk)
ZqJC(t) = r(t) RqJC
RqJC = 6.25°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
t1
READ TIME AT t1
t2
TJ(pk) − TC = P(pk) ZqJC(t)
DUTY CYCLE, D = t1/t2
0.1
0.05
0.1
0.07
0.05
0.01
0.03
SINGLE PULSE
0.02
0.01
0.01
0.02
0.05
0.1
0.2
1
0.5
2
5
t, TIME (ms)
10
20
50
100
200
500
1k
Figure 6. Thermal Response
FORWARD BIAS SAFE OPERATING AREA
INFORMATION
IC, COLLECTOR CURRENT (A)
10
5
3
2
500 ms
1
5 ms
0.5
0.3
0.2
1 ms
BONDING WIRE LIMIT
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
TC = 25°C SINGLE PULSE, D ≤ 0.1%
TJ = 150°C
0.1
0.05
0.03
0.02
0.01
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC − VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 7 is based on TJ(pk) = 150°C; TC
is variable depending on conditions. Second breakdown
pulse limits are valid for duty cycles to 10% provided TJ(pk)
v 150°C. TJ(pk) may be calculated from the data in
Figure 6. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
dc
1
5 7 10
2
3
20 30
50 70
VCE, COLLECTOR−EMITTER VOLTAGE (V)
Figure 7. Maximum Rated Forward Bias
http://onsemi.com
4
MJD148
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C−01
ISSUE D
A
E
b3
c2
B
Z
D
1
L4
A
4
L3
b2
e
2
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
C
H
DETAIL A
3
c
b
0.005 (0.13)
M
H
C
L2
GAUGE
PLANE
C
L
SEATING
PLANE
A1
L1
DETAIL A
ROTATED 905 CW
SOLDERING FOOTPRINT*
6.20
0.244
2.58
0.101
5.80
0.228
MILLIMETERS
MIN
MAX
2.18
2.38
0.00
0.13
0.63
0.89
0.76
1.14
4.57
5.46
0.46
0.61
0.46
0.61
5.97
6.22
6.35
6.73
2.29 BSC
9.40 10.41
1.40
1.78
2.74 REF
0.51 BSC
0.89
1.27
−−−
1.01
3.93
−−−
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
3.0
0.118
1.6
0.063
INCHES
MIN
MAX
0.086 0.094
0.000 0.005
0.025 0.035
0.030 0.045
0.180 0.215
0.018 0.024
0.018 0.024
0.235 0.245
0.250 0.265
0.090 BSC
0.370 0.410
0.055 0.070
0.108 REF
0.020 BSC
0.035 0.050
−−− 0.040
0.155
−−−
DIM
A
A1
b
b2
b3
c
c2
D
E
e
H
L
L1
L2
L3
L4
Z
6.172
0.243
SCALE 3:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
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MJD148/D
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