Vectron FX-424DPC-D1G Low jitter frequency translator Datasheet

FX-424
Low Jitter Frequency Translator
FX-424
Description
The FX-424 is a precision quartz-based frequency translator used to translate an input frequency such as 8 kHz, 1.544 MHz, 2.048
MHz, 19.44 MHz etc. to any specific frequency from 1.544 MHz to 1.0 GHz. The FX-424 can perform either up or down frequency
conversion. The FX-424’s superior jitter performance is achieved through the use of a precision VCXO or VCSO. With the use of an
external multiplexer, up to 4 different input clocks can be translated to a common output frequency.
Features
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Applications
Quartz-based PLL for Ultra-Low Jitter
Frequency Translation up to 850 MHz
Accepts up to 4 ext.-muxed clock inputs
CMOS / LVDS / LVPECL Inputs compatible
Differential LVPECL or LVCMOS Output
Lock Detect / Loss of Signal Alarms
Output Disable
20.3 x 13.7 x 5.1 mm SMT package
RoHS/Lead Free Compliant
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Wireless Infrastructure
10 Gigabit FC
10GbE LAN / WAN
OADM and IP Routers
Test Equipment
Military Communications
Block Diagram
VCC
(14)
FIN1
FIN2
FFIN
(
(13)
÷
FIN3
LD
(10)
VMON
(5)
Phase
Detector
& LD
Loop Filter
VCSO
(8)
FOUT1
(9)
CFOUT1
FIN4
÷
μ Controller
SEL0 (1)
SEL1 (2)
GND
(3, 7, 11, 12)
OD
(6)
Figure 1. Functional block diagram
Page 1 of 8
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Performance Specifications
Table 1. Electrical Performance
Parameter
Symbol
Min
Frequency
Input Frequency
Capture Range
Output Frequency
FIN
APR
FOUT
0.008
±40
1.544
Supply
Voltage 2, 3
Current (No Load)3
VCC
ICC
3.13
Input Signal 2, 3
CMOS
LVPECL
FIN
FIN
Typical
Maximum
Units
170
1.0
MHz
ppm
GHz
3.46
60
V
mA
VCC-1.0
950
VCC-2.5
450
V
mV p-p
V
mV p-p
ns
ns
%
1, 2, 3
CMOS
LVPECL
LVCMOS Output (Option A) 2, 3
Differential Output (Options F and P)
Mid Level - LVPECL
Swing - LVPECL
Mid Level - LVDS
Swing - LVDS
Rise Time
Fall Time
Symmetry
3.3
45
LVCMOS
2, 3, 4, 5
VCC-1.4
450
VCC-2.4
250
tR
tF
SYM
45
VCC-1.25
600
VCC-2.3
410
0.5
0.5
50
55
SSB Phase Noise, Fout = 155.52/622.08 5, 6
10Hz Offset
100Hz Offset
1kHz Offset
10kHz Offset
100kHz Offfset
1 MHz Offset
10 MHz Offset
Φn
Φn
Φn
Φn
Φn
Φn
Φn
-64/-27
-95/-55
-123/-123
-143/-110
-146/-130
-146/-146
-146/-146
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Jitter Generation 5, 6
155.52 MHz (12kHz - 20MHz BW)
622.08 MHz (12kHz - 20 MHz BW)
ΦJ
ΦJ
0.30
0.12
ps RMS
ps RMS
Operating Temperature (Options C of F) 1 ,3
TOP
0 to 70 or -40 to 85
0C
1.
2.
3.
4.
5.
6.
See Standard Frequencies and Ordering Information.
Parameters are tested with production test circuit below (Fig 2).
Parameters are tested at ambient temperature with test limits guard-banded for specified operating temperature.
Measured from 20% to 80% of a full output swing (Fig 3).
Not tested in production, guaranteed by design, verified at qualification.
The FX-424 phase noise and jitter performance can be optimized for specific applications. Please consult with Vectron’s Application Engineers
for more information.
Page 2 of 8
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional operation is not implied
at these or any other conditions in excess of conditions represented in the operational sections of this data sheet. Exposure to
absolute maximum ratings for extended periods may adversely affect device reliability.
Table 2. Absolute Maximum Ratings
Symbol
Ratings
Unit
Power Supply
Parameter
VDD
6
V
Storage Temperature
TSTR
-55 to 125
0C
Soldering Temp/TIme
TLS
260/40
0C/sec
Reliability
The FX-424 is capable of meeting the following qualification tests
Table 3. Environmental Compliance
Parameter
Conditions
Mechanical Shock
MIL-STD-883, Method 2002
Mechanical Vibration
MIL-STD-883, Method 2007
Solderability
MIL-STD-883, Method 2003
Gross and Fine Leak
MIL-STD-883, Method 1014
Resistance to Solvents
MIL-STD-883, Method 2016
Handling Precautions
Although ESD protection circuitrry has been designed into the the FX-424, proper precautions should be taken when handling
and mounting. VI employs a human body model and a charged-device model (CDM) for ESD susceptibility testing and design
protection evaluation. ESD thresholds are dependent on the circuit parameters used to define the model. Although no industry
wide standard has been adopted for the CDM, a standard HBM of resistance=1.5Kohms and capacitance = 100pF is widely used
and therefore can be used for comparison purposes
Table 4. Predicted ESD R$atings
Model
Minimum
Conditions
Human Body Model
500 V
MIL-STD 883, Method 3015
Charged Device Model
500 V
JEDEC, JESD22-C101
Page 3 of 8
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Reflow Profile
Table 5. Reflow Profile (IPC/JEDEC J-STD-020C)
Parameter
Symbol
Value
tS
60 sec Min, 180 sec Max
PreHeat Time
RUP
3 0C/sec Max
tL
60 sec Min, 150 sec Max
tAMB-P
480 sec Max
tP
20 sec Min, 40 sec Max
RDN
6 0C/sec Max
Ramp Up
Time Above 217 0C
Time To Peak Temperature
Time At 260 0C
Ramp Down
The FX-424 is qualified to meet the JEDEC standard for Pb-Free assembly. The temperatures
and time intervals listed are based on the Pb-Free
small body requirements. The temperatures refer
to the topside of the package, measured on the
package body surface. The FX-427 should not
be subjected to a wash process that will immerse
it in solvents. NO CLEAN is the recommended
procedure. The FX-427 has been designed for pick
and place reflow soldering. The FX-427 may be
reflowed once and should not be reflowed in the
inverted position.
Figure 4. Suggested IR Profile
Tape and Reel
Table 6. Tape and Reel Information
Tape Dimensions (mm)
Reel Dimensions (mm)
W
F
Do
Po
P1
A
B
C
D
N
W1
W2
#/Reel
44
20.2
1.5
4
20
330
1.5
13
20.2
100
44.4
50.4
200
Figure 5. Tape and Reel
Page 4 of 8
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Pin Configuration
Figure 6. Pin Configuration
Table 7. Pin Functions
Pin #
Symbol
I/O
1
SEL0
I
LVTTL
Level
Frequency Select *
2
SEL1
I
LVTTL
Frequency Select *
3
GND
GND
Supply
4
Function
Case and Electrical Ground
Not present
5
VMON
O
6
OD
I
7
GND
GND
8
FOUT
9
VCXO Control Voltage Monitor
Under locked conditions VMON should be > 0.3V and <3.0V. The input frequency may
be out of range if the voltage exceeds these levels
LVCMOS
Output Disable
Disabled = Logic “1”
Enabled = Logic “0” or no connect
Supply
Case and Electrical Ground
O
LCPECL. LVDS or
LVCMOS
Frequency Output
CFOUT
O
LVPECL, LVDS or
LVCMOS
Complementary Frequency Output – Note for LVCMOS option this pad will be tied to
GND.
10
LD
O
LVCMOS
Lock Detect
Locked = Logic “1”
Loss of Signal = Logic “0”
11
GND
GND
Supply
Complimentary Divided-Down VCSO/VCXO Output, or Disabled
12
GND
GND
Supply
Case and Electrical Ground
13
FIN
I
LVCMOS or
LVPECL
Input Frequency – AC Coupled
14
VCC
VCC
Supply
Power Supply Voltage (3.3 V ±5%)
*
For applications requiring two to four input frequencies, Vectron will assign a unique part number and the Input Frequency versus SEL[1:0] settings will be provided in a Specification Control Drawing. For single input configurations it is recommended that SEL0 and SEL1 are tied to ground.
Page 5 of 8
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
FX-424 Outline Diagram and Pad Layout
Figure 7. Outline and Pad Layout
Page 6 of 8
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Suggested Output Load Configurations
Figure 8. Single Input Frequency Translation - LVPECL Termination
Figure 8. Four Input Frequencies Translated to Common Output Frequency – LVPECL Termination
Page 7 of 8
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Ordering Information
Table 8. Standard Frequencies
8.00 kHz
C
26.00 MHz
T
622.08 MHz
8
16.00 kHz
D
27.00 MHz
W
666.5143 MHz
9
64.00 kHz
E
38.88 MHz
X
1.024 MHz
F
44.736 MHz
Y
1.544 MHz
H
51.84 MHz
0
2.048 MHz
J
614.44 MHz
1
4.096 MHz
K
77.76 MHz
2
Special SCD
S
8.192 MHz
L
82.944 MHz
3
13.000 MHz
M
112.00 MHz
4
16.384 MHz
N
139.264 MHz
5
19.440 MHz
P
155.520 MHz
6
20.480 MHz
R
166.6286 MHz
7
FX-424-XXX-XXXXX
Power Supply
D: 3.3 Vdc
RoHs Compliant
G: Yes
Blank: Mat contain Pb
Output
A: LVCMOS
F: LVPECL
P: LVDS
Ouptut Frequency 1
(See Table)
Temperature Range
C: 0 to 700C
F: -40 to 850C
Input Frequency 1, 2
(See Table)
Input Logic
A: LVCMOS
D: LVPECL
Number of Input Frequencies 2
1: 1 input frequency
2: 2 input frequencies
3: 3 input frequencies
4: 4 input frequencies
1. For non-listed frequencies and/or multiple input frequencies a unique part number will be assigned with the following format FX-424-XXX-SNNNN.
“SNNNN” is the SCD number.
2. To request initial samplesfor an FX-424 with more than one input frequency, please use the following format FX-424-XXX-XNSX followed by the input
frequencies. For example, to request samples for a translator with and operating temperature of -40 to +85°C, input frequencies of 8 kHz, 1.544 MHz,
19.44 MHz, 77.76 MHz and an output frequency of 622.08 MHz, the part number would be FX-424-DFF-A4S8, S = 8 kHz, 1.544 MHz, 19.44 MHz, 77.76
MHz.
For Additional Information, Please Contact
USA:
Europe:
Asia:
Vectron International
267 Lowell Road
Hudson, NH 03051
Tel: 1.888.328.7661
Fax: 1.888.329.8328
Vectron International
Landstrasse, D-74924
Neckarbischofsheim, Germany
Tel: +49 (0) 3328.4784.17
Fax: +49 (0) 3328.4784.30
Vectron International
1F-2F, No 8 Workshop, No 308 Fenju Road
WaiGaoQiao Free Trade Zone
Pudong, Shanghai, China 200131
Tel: 86.21.5048.0777
Fax: 86.21.5048.1881
Disclaimer
Vectron International reserves the right to make changes to the product(s) and or information contained herein without notice. No liability is assumed as a result of their use or application.
No rights under any patent accompany the sale of any such product(s) or information.
Rev: 8/2008
Page 8 of 8
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
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