DIODES DO1608-103

ZXLD1601
ADJUSTABLE DC - DC BOOST CONVERTER WITH INTERNAL SWITCH
IN SC70
DESCRIPTION
The ZXLD1601 is a PFM inductive boost converter
designed to provide output voltages of up to 28V from
a 2.5V to 5.5V input supply.
The ZXLD1601 includes the output switch and peak
current sense resistor, and can provide up to 10mA
output current at maximum output voltage. Higher
current is available at lower output voltages.
Output voltage is set to a nominal value between 26V
and 28V, by an internal resistor network, but can be
adjusted to lower values by external resistors, an
external PWM control signal applied to the ‘Enable’
pin, or a combination of the two. Depending upon the
control frequency, the PWM signal will provide either
continuous (low ripple) or gated control. The PWM
filter components are contained within the chip.
Minimum output voltage is determined by the input
supply.
The device is assembled in a low profile SC70-6 pin
package.
Quiescent current is typically 60␮A and a shutdown
function is provided to reduce this current to less than
100nA in the ‘off’ state.
ADVANCED FEATURES
• Internal 30V NDMOS switch, current sense and
APPLICATIONS
output setting resistors.
• LCD and OLED bias
• True analogue output voltage control via PWM
• Cellular / mobile phones
with internal filter
• Digital cameras
FEATURES
• PDAs
• Low profile SC70-6 pin package
• LCD modules
• Internal PWM filter for adjustable output
• Varactor and PIN diode bias
• High efficiency (85% typ)
• Palmtop computers
• Wide input voltage range: 2.5V to 5.5V
• Up to 250mA output current at 5V
TYPICAL APPLICATION CIRCUIT
• Low quiescent current: (60␮A typ)
• 100nA maximum shutdown current
• Up to 1MHz switching frequency
• Low external component count
PINOUT
TOP VIEW
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SEMICONDUCTORS
ZXLD1601
ABSOLUTE MAXIMUM RATINGS
(Voltages to GND unless otherwise stated)
Input voltage (VIN)
7V
LX output voltage (VLX)
Switch output current (ILX)
30V
Power dissipation (PD)
500mA
300mW
Operating temperature (TOP)
-40 to 85°C
Storage temperature (TST)
-55 to 150°C
Junction temperature (Tj MAX)
125°C
ELECTRICAL CHARACTERISTICS: (Test conditions: VIN=VEN=3V, TAMB=25°C unless otherwise stated(1))
Symbol
Parameter
V IN
Input voltage
I IN
Supply current
Conditions
Min
Typ
2.5
Quiescent
V EN = VIN, ILX = 0, Output not switching
Shutdown
V EN = 0V
60
<10
Units
5.5
V
100
µA
100
nA
1.07
V
V FB
FB pin control voltage
R1
Internal resistor from FB pin
to GND pin
135
k⍀
R2
Internal resistor from FB pin
to V SENSE pin
3.45
M⍀
f LX
Operating frequency
600
kHz
T OFF
LX output ‘OFF’ time
500
ns
T ON
(2)
0.98
Max
L=10␮H, V OUT =28V, 5mA load
350
LX output ‘ON’ time
5
I LXpk
Switch peak current limit
R LX
Switch ‘On’ resistance
I LX(leak)
Switch leakage current
V LX =20V
V OUT
Controller default output
voltage
FB pin floating
V ENH
EN pin high level Input voltage Device active
V ENL
EN pin low level Input voltage
Device in shutdown
I ENL
EN pin low level input current
V EN =0V
I ENH
EN pin high level input current V EN =VIN
TEN(hold)(3) EN pin turn off delay
L=10␮H, V OUT =28V, 5mA load
V EN switched from high to low
µs
320
mA
1.75
⍀
1
µA
26
28
V
1.5
V IN
V
0.4
V
-100
nA
1
␮A
120
µs
NOTES:
1 Production testing of the device is performed at 25°C. Functional operation of the device over a –40°C to +85°C temperature range is
guaranteed by design, characterization and process control.
2 Nominal ‘on’ time (TONnom ) is defined by the input voltage (VIN), coil inductance (L) and peak current (ILXpkdc) according to the expression:
TONnom = {ILX(pkdc) x L/VIN} +200ns
3 This is the time for which the device remains active after the EN pin has been asserted low. This delay is necessary to allow the output to be
maintained during dc PWM mode operation.
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SEMICONDUCTORS
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ZXLD1601
ELECTRICAL CHARACTERISTICS (Cont.): (Test conditions: VIN=VEN=3V, TAMB=25°C unless otherwise stated(1) )
Symbol Parameter
Conditions
⌬T/T
PWM duty cycle range at
‘EN’ input for dc output
voltage control
10kHz < f < 100kHz, VENH =VIN
fLPF
Internal PWM low pass filter
cut-off frequency
ALPF
⌬T/T
Filter attenuation
(4)
Min
f=30kHz
f < 1kHz, VENH =VIN
PWM duty cycle range at
‘EN’ input for ‘gated’ output
voltage control
Typ
20
0
Max
Units
100
%
4
kHz
52.5
dB
100
%
NOTES:
4 The maximum PWM signal frequency during this mode of operation should be kept as low as possible to minimize errors due to the turn-off
delay
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SEMICONDUCTORS
ZXLD1601
PIN DESCRIPTION
Pin No.
Name
Description
1
LX
Output of NDMOS switch
2
GND
Ground (0V)
3
FB
Feedback pin for voltage control loop
4
EN
Enable input (active high to turn on device)
Nominal voltage 1.025V
Also used to adjust output current by PWM signal.
Connect to V in for permanent operation.
5
V SENSE
Output voltage sense
6
V IN
Input voltage (2.5V to 5.5V). Decouple with
capacitor close to device.
BLOCK DIAGRAM
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SEMICONDUCTORS
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ZXLD1601
Device Description
The device is a PFM flyback dc-dc boost converter,
working in discontinuous mode.
With reference to the chip block diagram and typical
application circuit, the operation of the device is as
follows:
Filtered PWM operation
The input of an internal low pass filter is switched to
VREF when the EN pin is high and switched to ground
when the EN pin is low. The output of this filter drives
the comparator within the control loop. A continuous
high state on EN therefore provides a filtered voltage of
value Vref to the comparator. However, by varying the
duty cycle of the EN signal at a suitably high frequency
(f>10kHz), the control loop will see a voltage, that has
an average value equal to the duty cycle multiplied by
VREF. This provides a means of adjusting the output
voltage to a lower value. It also allows the device to be
both turned on and adjusted with a single signal at the
‘EN’ pin. The output during this mode of operation will
be a dc voltage equal to VREF*(R1+R2)/R1 x duty cycle.
Control loop
When ‘EN’ is high, the control circuits become active
and the low side of the coil (L1) is switched to ground
via NDMOS transistor (MN). The current in L1 is
allowed to build up to an internally defined level
(nominally 320mA) before MN is turned off. The energy
stored in L1 is then transferred to the output capacitor
(C2) via Schottky diode (D1). The output voltage is
sensed at pin ‘VSENSE’ by internal resistors R1 and R2
(which may be shunted externally at pin ‘FB’) and
compared to a reference voltage V REF (1.025V
nominal). A comparator senses when the output
voltage is above that set by the reference and its output
is used to control the ‘off’ time of the output switch. The
control loop is self-oscillating, producing pulses of up
to 5µs maximum duration (switch ‘on’), at a frequency
that varies in proportion to the output current. The
feedback loop maintains a voltage of VREF at the FB pin
and therefore defines a maximum output voltage equal
to VREF *(R1+R2)/R1. The minimum ‘off’ time of the
output switch is fixed at 0.5µs nominal, to allow time
for the coil’s energy to be dissipated before the switch
is turned on again. This maintains stable and efficient
operation in discontinuous mode.
Gated PWM operation
The internal circuitry of the ZXLD1601 is turned off
when no signal is present on the ‘EN’ pin for more than
120µs (nominal). A low frequency signal applied to the
EN pin will therefore gate the device ‘on’ and ‘off’ at the
gating frequency and the duty cycle of this signal can
be varied to provide an average output equal to VREF
*(R1+R2)/R1 x duty cycle. For best accuracy, the gating
frequency should be made as low as possible (e.g.
below 1kHz), such that the turn off delay of the chip is
only a small proportion of the gating period
Further details of setting output current are given in the
application notes.
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SEMICONDUCTORS
ZXLD1601
TYPICAL CHARACTERISTICS
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ZXLD1601
TYPICAL PERFORMANCE GRAPHS
(For typical applications circuit at VIN=3V, L=22µH Murata LQH32CN series, TA=25°C unless otherwise stated)
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SEMICONDUCTORS
ZXLD1601
APPLICATIONS
1) PWM output voltage adjustment (analogue mode)
During this mode of operation the device operation is
continuous, providing a low ripple output voltage
(VOUT) directly proportional to the duty cycle (D) of the
logic signal applied to the EN pin according to the
relationship:
Setting output voltage
When connected as shown in the typical application
circuit, the ZXLD1601 will produce a nominal default
output of between 26V and 28V. This is set by the
internal potential divider comprising of resistors R1
and R2. (See device block diagram).
The internal potential divider network R1/R2 is
accessible at the FB pin and can be shunted by means
of external resistors to set different nominal output
voltages. The potential divider defines output voltage
according to the relationship:
R2 ⎞
⎛
⎟
V OUT = V FB ⎜1 +
⎝
R1⎠
VOUT = D x VOUT(nom)
Square wave signals applied to the EN pin, for
example, will turn the device on and produce a nominal
regulated output of 13.5V.
The ZXLD1601 contains a timing circuit that switches
the device on a few microseconds after the application
of a rising edge to EN and turns it back off again
nominally 120µs after the falling edge of EN. For
continuous PWM mode operation, the frequency of the
control signal must therefore be maintained above
10kHz at all times, to prevent the internal delay circuit
from timing out and switching the device into standby
mode. The maximum frequency applied to EN should
be limited to 100kHz to minimize errors due to internal
switching delays
where VFB = 1.025V.
When using external resistors, these should be chosen
with lower values than the internal resistors to
minimize errors caused by the device to device
variation in absolute value of the internal resistors
(±30% max). The internal resistors have high values in
order to minimize these errors.
Required
External
output voltage resistor across
R1
External resistor
across R2
5V
43K⍀
130K⍀
12V
56K⍀
487K⍀
18V
43K⍀
649K⍀
21V
34.8K⍀
649K⍀
25V
27K⍀
620K⍀
28V
40.2K⍀
1.07M⍀
2) PWM output voltage adjustment (gated mode)
This method of adjustment can be used in applications
where the output ripple is less important than the
supply current. The method of adjustment is the same
as in 1) above, however, during this mode of operation,
the device is gated on and off, providing an average
output voltage (VOUT) directly proportional to the duty
cycle (D) of the logic signal applied to the EN pin
according to the relationship:
VOUT(AVG) = D x VOUT(nom)
The ripple on this voltage will be determined by the size
of the output capacitor.
The output voltage can be adjusted all the way down to
the input voltage by either method of PWM control, but
for best results, the duty cycle range should be kept
within the specified range. Lower duty cycles will result
in increased output ripple and non-linearity in the
relationship between duty cycle and output voltage. If a
greater control range is required, the nominal output
can be reduced by the use of external resistors before
the PWM signal is applied.
The following table gives suggested values for various
output voltages.
Once the nominal output voltage has been set, it can be
adjusted to a lower value by applying a pulse width
modulated (PWM) control signal to the EN pin, using
one of the two methods described below.
Minimizing output voltage ripple
PWM adjustment permits the device to be turned on
and the output voltage set by a single logic signal
applied to the EN pin. No external resistors are
required and the amplitude of the control signal is not
critical, providing it conforms to the limits defined in
the electrical characteristics.
For applications requiring lower output ripple it may be
necessary to add a small ceramic capacitor in parallel
with R2. A value of 4.7pF is suitable for most output
ranges.
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ZXLD1601
Capacitor selection
A ceramic capacitor grounded close to the GND pin of
the package is recommended at the output of the
device. Surface mount types offer the best
performance due to their lower inductance. A
minimum value of 0.22µF is advised, although higher
values will lower switching frequency and improve
efficiency especially at lower load currents. A higher
value will also minimize ripple when using the device
to provide an adjustable dc output current.
A good quality, low ESR capacitor should also be used
for input decoupling, as the ESR of this capacitor is
effectively in series with the source impedance and
lowers overall efficiency. This capacitor has to supply
the relatively high peak current to the coil and smooth
the current ripple on the input supply. A minimum
value of 4.7µF is acceptable if the input source is close
to the device, but higher values will improve
performance at lower input voltages, when the source
impedance is high. The input capacitor should be
mounted as close as possible to the IC
For maximum stability over temperature, capacitors
with X7R dielectric are recommended, as these have a
much smaller temperature coefficient than other types.
A table of recommended manufacturers is provided
below:
Manufacturer
Website
Murata
www.murata.com
Taiyo Yuden
www.t-yuden.com
Kemet
www.kement.com
AVX
www.avxcorp.com
Inductor selection
Recommended inductor values for the ZXLD1601 are
in the range 6.8µH to 22µH. The inductor should be
mounted as close to the device as possible with low
resistance connections to the LX and VIN pins.
Suitable coils for use with the ZXLD1601 are shown in
the table below:
The choice of inductor will depend on available board
space as well as required performance. Small value
inductors have the advantage of smaller physical size
and may offer lower series resistance and higher
saturation current compared to larger values. A
disadvantage of lower inductor values is that they
result in higher frequency switching, which in turn
causes reduced efficiency due to switch losses. Higher
inductor values can provide better performance at
lower supply voltages. However, if the inductance is
too high, the output power will be limited by the
internal oscillator, which will prevent the coil current
from reaching its peak value. This condition will arise
whenever the ramp time (ILX(peak) x L/VIN) exceeds the
nominal 5µs maximum ‘on’ time limit for the LX output.
L
DCR
I SAT
( H)
( )
(A)
CMD4D11-100MC
10
0.457
0.5
Sumida
www.sumida.com
DO1608-103
10
0.16
1.1
Coilcraft
www.coilcraft.com
LQH31CN100
10
1.3
0.23
Murata
www.murata.com
LB2012Y100MR
10
0.5
0.1
Taiyo Yuden
www.t-yuden.com
Part No.
Manufacturer
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SEMICONDUCTORS
ZXLD1601
Diode selection
The rectifier diode (D1) should be a fast low
capacitance Schottky diode with low reverse leakage at
the working voltage. It should also have a peak current
rating above the peak coil current and a continuous
current rating higher than the maximum output load
current.
The table below gives some typical characteristics for
diodes that can be used with the ZXLD1601:
Diode
V F @ 100mA (mV)
I FSM (mA)
Ic (mA)
I R at 30V ( A)
Package
ZHCS400
300
1000
400
15
SOD323
ZHCS500
300
1000
500
15
SOT23
Layout considerations
PCB tracks should be kept as short as possible to
minimize ground bounce, and the ground pin of the
device should be soldered directly to the ground plane.
It is particularly important to mount the coil and the
input/output capacitors close to the device to minimize
parasitic resistance and inductance, which will
degrade efficiency. The FB pin is a high impedance
input, so PCB track lengths to this should also be kept
as short as possible to reduce noise pickup. Excess
capacitance from the FB pin to ground should be
avoided.
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ZXLD1601
NOTES:
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SEMICONDUCTORS
ZXLD1601
PACKAGE OUTLINE
PACKAGE DIMENSIONS
Millimeters
Inches
DIM
Min
Max
Min
Max
A
0.80
1.10
0.0315
0.0433
A1
-
0.10
-
0.0039
A2
0.80
1.00
0.0315
0.0394
b
0.15
0.30
0.006
0.0118
C
0.08
0.25
0.0031
0.0098
D
2.00 BSC
0.0787 BSC
E
2.10 BSC
0.0826 BSC
E1
1.25
1.35
0.0492
0.0531
e
0.65 BSC
0.0255 BSC
e1
1.30 BSC
0.0511 BSC
L
0.26
0.46
0.0102
0.0181
a°
0°
8°
0°
8°
ORDERING INFORMATION
DEVICE
DEVICE DESCRIPTION
TEMPERATURE RANGE
ZXLD1601H6 Boost converter in SC70-6 -40°C to +85°C
PART MARK
TAPING OPTIONS
601
TA, TC
TA reels 3000 devices, TC reels 10000 devices
© Zetex Semiconductors plc 2004
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SEMICONDUCTORS
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