DIODES AP393_10

AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Description
Pin Assignments
The AP393 consists of two independent precision voltage
comparators with an offset voltage specification as low as
2.0mV max for two comparators which were designed
specifically to operate from a single power supply over a wide
range of voltages. Operation from split power supplies is also
possible and the low power supply current drain is
independent of the magnitude of the power supply voltage.
These comparators also have a unique characteristic in that
the input common-mode voltage range includes ground, even
though operated from a single power supply voltage.
Application areas include limit comparators, simple analog to
digital converters; pulse, squarewave and time delay
generators; wide range VCO; MOS clock timers;
multivibrators and high voltage digital logic gates. The AP393
is designed to directly interface with TTL and CMOS. When
operated from both plus and minus power supplies, the
AP393 will directly interface with MOS logic where their low
power drain is a distinct advantage over standard
comparators.
( Top View )
OUTPUT 1 1
2
INVERTING INPUT 1
NON-INVERTING INPUT 1
3
GND
4
OUTPUT 1
1
INVERTING INPUT 1
NON-INVERTING INPUT 1
3
GND
4
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
• Single or dual supplies: ±1.0V to ±18V
Very low supply current drain (0.4mA) – independent of
supply voltage
Low input biasing current: 25nA
Low input offset current: ±5nA
Maximum offset voltage: ±3mV
Input common-mode voltage range includes ground
Differential input voltage range equal to the power supply
voltage
Low output saturation voltage: 250mV at 4mA
Output voltage compatible with TTL, DTL, ECL, MOS and
CMOS logic systems
Lead Free packages: SOP-8L and PDIP-8L
SOP-8L and PDIP-8L: Available in “Green” Molding
Compound (No Br, Sb)
Lead Free Finish/RoHS Compliant (Note 1)
Notes:
5
NON-INVERTING INPUT 2
8
7
V+
OUTPUT 2
2
AP393
6
INVERTING INPUT 2
5
NON-INVERTING INPUT 2
PDIP-8L
•
Voltage range: 2.0V to 36V
OUTPUT 2
INVERTING INPUT 2
( Top View )
Application
•
V+
7
6
SOP-8L
Features
Wide supply
AP393
8
High precision comparators
Reduced VOS drift over temperature
Eliminates need for dual supplies
Allows sensing near ground
Compatible with all forms of logic
Power drain suitable for battery operation
1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at
http://www.diodes.com/products/lead_free.html.
AP393
Document number: DS31006 Rev. 8 - 2
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Typical Circuit (Vcc=5.0VDC)
+5.0VDC
V+
+VIN
3.0K
+
100K
+
AP393
VO
AP393
-
+VREF
1/4 MM54CXX
Driving CMOS
Basic Comparator
V+
+5VDC
100K
4.3K
75 pF
-
10K
+
1/2 AP393
AP393
V+
0
1:100kHz
VO
+
1/4 DM54XX
-
100K
100K
V+
100K
Squarewave Oscillator
Driving TTL
AP393
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Typical Circuit (Continued) (Vcc=5.0VDC)
V+
R1
1M
D1
1N914 *
V+
15K
200K
80 pF
+15VDC
0.1μF
VO
1/2 AP393
VO
1/2 AP393
1M
-V
60μs
0
t2
tO t1
V+
0
-
+
6μs
-
2.0K
100K
R2
D2
100K 1N914
+
+
1M
1M
200K
CRYSTAL
f=100KHz
*For large ratios of R1/R2, D1 can
be omitted
Pulse Generator
Crystal Controlled Oscillator
V+
V+
100K
100K
10
+VC
FREQUENCY
CONTROL
VOLTAGE
INPUT
500pF
1/2 AP393
0.1μF
3.0K
5.1K
0.01μF
+
3.0K
+
OUTPUT1
1/2 AP393
-
V+/2
20K
50K
20K
OUTPUT2
-
V+/2
1/2 AP393
+
Two-Decade High Frequency VCO
V*=+30VDC
+250mVDC < VC < +50VDC
700Hz < fO < 100KHz
+VIN
+
V
3K
-
+VREF
3.0K
1/2 AP393
1/2 AP393
+VREF
V+
+
VO
+VIN
-
Document number: DS31006 Rev. 8 - 2
+
10M
Non-Inverting Comparator with
Hysteresis
Basic Comparator
AP393
10K
VO
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Typical Circuit (Continued) (Vcc=5.0VDC)
V+
V+
3K
-
+VIN
VO
1/2 AP393
1M
V+
6.2K
-
1/2 AP393
+
VO
+
STROBE
INPUT
*
1M
1M
* OR LOGIC GATE WITHOUT PULL-UP
RESISTOR
Inverting Comparator with
Hysteresis
Output Strobing
V+
V+
100K
V+
0
"0" "1"
-
1K
1/2 AP393
1/2 AP393
100K
f
A
+
B
100K
C
3K
+0.075V
-
A
B
200K
3K
39K
+0.375V
1K
100K
C
1K
100K
+
100K
1K
V+
0
"0" "1"
Or Gate
AND Gate
V+
10K
V+ (12VDC)
R4
3K
100K
+VREF HI
2RS
D1
10K
1/2 AP393
1/2 AP393
A
+
100K
V+
0
"0" "1"
f
VOUT
-
+
D2
B
LAMP
12 ESB
RS
+VIN
D3
+
C
D4
D
1/2 AP393
ALL DIODES 1N914
+VREF LOW
Document number: DS31006 Rev. 8 - 2
-
Limit Comparator
Large Fan-in AND Gate
AP393
2RS
2N2222
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Typical Circuit (Continued) (Vcc=5.0VDC)
V+
+
+VIN1
-VIN2
-
5.1K
-
100K
VO
1/2 AP393
2N2222
100K
3.0K
1/2 AP393
+
+
1/2 AP393
-
Comparing Input Voltages of
Opposite Polarity
ORing the Outputs
V+
V+
+
100K
0
100K
5.1K
5.1K 5.1K
t0
100pF
1M
1N914
1M
10K
-
-
VIN
1N914
1/2 AP393
1/2 AP393
VO
VO
+
+
0.001μF
20M
1ms
PW
t0
t1
1N914
1M
10K
One-Shot Multivibrator
Zero Crossing Detector
(Single Power Supply)
V+
51K
100K
V+
0
S
100K
S
+
1/2 AP393
V+
0
15K
100K
R
R
+15V
0
VO
-
Bi-Stable Multivibrator
AP393
Document number: DS31006 Rev. 8 - 2
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Typical Circuit (Continued) (Vcc=5.0VDC)
V+
1M
100K
1M
10M
15K
560K
-
+VIN
100K
1/2 AP393
-
+4V
+
1μs
t0
1/2 AP393
100pF
0
V+
40μs
0
t1
VO
+
10M
240K
62K
One-Shot Multivibrator with Input Lock Out
V+
3.0K
10K
15K
10M
200K
10K
+
1/2 AP393
V3
V+
VO3
0
-
VC1
10K
1/2 AP393
0
t0
t4
+VIN
10K
+
1/2 AP393
V2
INPUT GATING SIGNAL
V+
VO2
10M
51K
10K
0
V1
t0 t1 t2 t3 t4
t
t0 t2
3.0K
V+
+
1/2 AP393
VC1 V2
V1
V+
0
-
V+
V3
t3
C1
0.001μF
+
t0
3.0K
10M
51K
V+
V+
0
t0 t1
VO1
-
51K
Time Delay Generator
AP393
Document number: DS31006 Rev. 8 - 2
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Split-Supply Applications (V+ = +15VDC and V - = -15 VDC)
V+
51K
51K
2K
10K
3.9K
-
2.4K
2.4K
φA
1/2 AP393
+
1/2 AP393
+
8.2K
1/2 AP393
2K
-
φB
+
5.1K
1/2 AP393
-
50pF
6.8K
V-
MOS Clock Driver
V+
+
VIN
+
V+
5.1K
1/2 AP393
VO
+
+
VIN
1/2 AP393
-5 VDC
V-
Document number: DS31006 Rev. 8 - 2
VO
V
Comparator With a
Negative Reference
Zero Crossing Detector
AP393
5.1K
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Functional Block Diagram
OUTPUT 1
INVERTING INPUT 1
1
8
V+
2
7
OUTPUT 2
A
-
NON-INVERTING INPUT 1 3
GND
B
+ +
-
6
5
4
INVERTING INPUT 2
NON-INVERTING INPUT 2
V+
3.5μA
Q2
+INPUT
100μA
3.5μA
100μA
Q3
Q1
Q4
OUTPUT
Q5
-INPUT
Q6
Q8
Q7
Pin Descriptions
Pin Name
OUTPUT 1
Pin #
1
INVERTING INPUT 1
2
Channel 1 Negative Input
NON-INVERTING INPUT 1
3
Channel 1 Positive Input
GND
NON-INVERTING INPUT 2
4
5
Ground
Channel 2 Positive Input
INVERTING INPUT 2
6
Channel 2 Negative Input
OUTPUT 2
V+
7
8
Channel 2 Output
VCC
AP393
Document number: DS31006 Rev. 8 - 2
Description
Channel 1 Output
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Absolute Maximum Ratings
Symbol
VCC
VIN
VIN
ICC
Parameter
Supply Voltage
Differential Input Voltage (Note 9)
Input Voltage
Input Current (VIN-0.3V) (Note 4)
PDIP-8L
SOP-8L
PD
Power Dissipation (Note 2)
TOP
TST
Output Short-Circuit to Ground (Note 3)
Operating Junction Temperature Range
Storage Temperature Range
Rating
36
36
-0.3 to +36
50
780
510
Continuous
0 to +70
-65 to +150
Unit
V
V
V
mA
mW
o
C
C
o
Electrical Characteristics (VCC = 5V, TA = 25oC, unless otherwise stated)
Symbol
VOFFSET
IBIAS
IOFFSET
Parameter
Input Offset Voltage
Input Bias Current
Input Offset Current
Input Common Mode Voltage
Range
Conditions
(Note 10)
IIN(+) or IIN(-) with Output In
Linear Range, VCM = 0V
(Note 6)
IIN(+) - IIN(-) VCM = 0V
+
V = 30V (Note 7)
+
ICC
Supply Current
Voltage Gain
Large Signal Response Time
Response Time
IO(Sink)
Output Sink Current
VSAT
Saturation Voltage
IO(Leak)
Output Leakage Current
AP393
Document number: DS31006 Rev. 8 - 2
V = 5V
V+ = 36V
RL > 15kΩ, V+ = 15V
VO = 1V to 11V
VIN = TTL Logic Swing,
VREF = 1.4V, VRL = 5V,
RL = 5.1kΩ
VRL = 5V, RL = 5.1kΩ (Note 8)
VIN(-) = 1V, VIN(+) = 0,
VO < 1.5V
VIN(-) = 1V, VIN(+) = 0,
ISINK < 4mA
VIN(-) = 0, VIN(+) = 1V, VO = 5V
RL = ∞
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Min
-
Typ.
1.0
Max
5.0
Unit
mV
-
25
250
nA
-
5.0
50
nA
+
0
-
V -1.5
V
-
0.4
1
1
2.5
mA
50
200
-
V/mV
-
300
-
ns
-
1.3
-
μs
6.0
16
-
mA
-
250
400
mV
-
0.1
-
nA
July 2010
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Electrical Characteristics (Continued)
(VCC = 5V) (Note 5)
Symbol
Parameter
VOFFSET Input Offset Voltage
IOFFSET Input Offset Current
IBIAS
Input Bias Current
Input Common Mode Voltage
Range
VSAT
Saturation Voltage
IO(Leak)
Output Leakage Current
Differential Input Voltage
Notes:
Conditions
(Note 10)
IIN(+) -IIN(-), VCM = 0V
IIN(+) or IIN(-) with Output In
Linear Range, VCM = 0V
(Note 6)
V+ =30V (Note 7)
VIN(-) = 1V, VIN(+) = 0,
ISINK < 4mA
VIN(-) = 0, VIN(+) = 1V,
VO = 30V
Keep All VIN’s > 0V (or V-, if
Used), (Note 9)
Min
-
Typ.
-
Max
9
150
Unit
mV
nA
-
-
400
nA
0
-
V+ -2.0
V
-
-
700
mV
-
-
1.0
μA
-
-
36
V
2. For operating at high temperatures, the AP393 must be derated based on a 125°C maximum junction temperature and a
thermal resistance of 170°C/W which applies for the device soldered in a printed circuit board, operating in a still air
ambient.The low bias dissipation and the “ON-OFF” characteristic of the outputs keeps the chip dissipation very small.
(PD<100mW), provided the output transistors are allowed to saturate
+
3. Short circuits from the output to V can cause excessive heating and eventual destruction. When considering short circuits to
+
ground, the maximum output current is approximately 20mA independent of the magnitude of V .
4. This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base
junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this
diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output
+
voltages of the comparators to go to the V voltage level (or to ground for a large overdrive) for the time duration that an input
is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which is negative,
again returns to a value greater than -0.3V.
5. The AP393 temperature specifications are limited to 0°C < TOP < +70°C.
6. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of
the state of the output so no loading change exists on the reference or input lines.
7. The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The
+
upper end of the common-mode voltage range is V -1.5V at 25°C, but either or both inputs can go to 36V without damage,
+
independent of the magnitude of V .
8. The response time specified is for a 100mV input step with 5mV overdrive. For larger overdrive signals 300ns can be obtained,
see typical performance characteristics section.
9. Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the
common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than -0.3V
(or 0.3V below the magnitude of the negative power supply, if used).
+
+
10. At output switch point, VO ~ 1.4V, RS=0Ω with V from 5V to 30V; and over the full input common-mode range (0V to V -1.5V),
at 25°C.
AP393
Document number: DS31006 Rev. 8 - 2
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Typical Performance Characteristics
Supply Current
Input Current
Response Time for Various Input Overdrives—
Negative Transition
Response Time for Various Input Overdrives—
Positive Transition
Output Saturation Voltage
AP393
Document number: DS31006 Rev. 8 - 2
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Application Information
The AP393 is high gain, wide bandwidth devices, like most comparators, can easily oscillate if the output
lead is inadvertently allowed to capacitively couple to the inputs via stray capacitance. This shows up only during
the output voltage transition intervals as the comparator change states. Power supply bypassing is not required
to solve this problem. Standard PC board layout is helpful as it reduces stray input-output coupling. Reducing the
input resistors to < 10kΩ reduces the feedback signal levels and finally, adding even a small amount (1.0 to
10 mV) of positive feedback (hysteresis) causes such a rapid transition that oscillations due to stray feedback
are not possible. Simply socketing the IC and attaching resistors to the pins will cause input-output oscillations
during the small transition intervals unless hysteresis is used. If the input signal is a pulse waveform, with
relatively fast rise and fall times, hysteresis is not required. All input pins of any unused comparators should be
tied to the negative supply.
The bias network of the AP393 establishes a drain current independent of the magnitude of the power
supply voltage over the range of from 2.0 VDC to 30 VDC. It is usually unnecessary to use a bypass capacitor
across the power supply line.
The differential input voltage may be larger than V+ without damaging the device (Note 11). Protection
should be provided to prevent the input voltages from going negative more than -0.3 VDC (at 25°C). An input
clamp diode can be used as shown in the applications section.
The output of the AP393 is the uncommitted collector of a grounded-emitter NPN output transistor. Many
collectors can be tied together to provide an output OR’ing function. An output pull-up resistor can be connected
to any available power supply voltage within the permitted supply voltage range and there is no restriction on this
voltage due to the magnitude of the voltage applied to the V+ terminal of the AP393 package. The output can
also be used as a simple SPST switch to ground (when a pull-up resistor is not used). The amount of current the
output device can sink is limited by the drive available (which is independent of V+) and the β of this device.
When the maximum current limit is reached (approximately 16mA), the output transistor will come out of
saturation and the output voltage will rise very rapidly. The output saturation voltage is limited by the
approximately 60Ω rSAT of the output transistor. The low offset voltage of the output transistor (1.0 mV) allows the
output to clamp essentially to ground level for small load currents.
AP393
Document number: DS31006 Rev. 8 - 2
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Ordering Information
AP 3 9 3 X X - X
Device
Lead-free
Lead-free
AP393SL-13
AP393SG-13
AP393NL-U
AP393NG-U
Notes:
Package
Lead Free
S : SOP-8L
N : PDIP-8L
L : Lead Free
G : Green
Package
Code
Packaging
(Note 11)
S
S
N
N
SOP-8L
SOP-8L
PDIP-8L
PDIP-8L
Packing
U : Tube
13 : Tape & Reel
Tube
Quantity Part Number
Suffix
NA
NA
NA
NA
60
-U
60
-U
13” Tape and Reel
Part Number
Quantity
Suffix
2500/Tape & Reel
-13
2500/Tape & Reel
-13
NA
NA
NA
NA
11. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at
http://www.diodes.com/datasheets/ap02001.pdf.
Marking Information
(1) SOP-8L
(Top View)
8
7
6
5
Logo
Part Number
YY : Year : 08, 09,10~
WW : Week : 01~52; 52
represents 52 and 53 week
X : Internal Code
G : Green
L : Lead Free
AP393
YY WW X X
1
2
3
4
(2) PDIP-8L
(Top View)
8
7
6
5
YY : Year : 08, 09,10~
WW : Week : 01~52; 52
represents 52 and 53 week
X : Internal Code
G : Green
L : Lead Free
Logo
Part Number
AP393
YY WW X X
1
AP393
Document number: DS31006 Rev. 8 - 2
2
3
4
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Package Outline Dimensions (All Dimensions in mm)
0.254
0.10/0.20
5.90/6.10
3.85/3.95
(1) Package type: SOP- 8L
Gauge Plane
Seating Plane
0.62/0.82
Detail "A"
7°~9°
0.15/0.25
1.30/1.50
1.75max.
0.35max. 45°
7°~9°
Detail "A"
0°/8°
0.3/0.5
1.27typ
4.85/4.95
5.4
8x-0.60
8x-1.55
6x-1.27
Land Pattern Recommendation
(Unit: mm)
(2) Package type: PDIP- 8L
AP393
Document number: DS31006 Rev. 8 - 2
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
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Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes
Incorporated products in such safety-critical, life support devices or systems.
Copyright © 2010, Diodes Incorporated
www.diodes.com
AP393
Document number: DS31006 Rev. 8 - 2
15 of 15
www.diodes.com
July 2010
© Diodes Incorporated