ONSEMI NTF3055

NTF3055−100
Preferred Device
Power MOSFET
3.0 Amps, 60 Volts
N−Channel SOT−223
Designed for low voltage, high speed switching applications in
power supplies, converters and power motor controls and bridge
circuits.
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3.0 A, 60 V
RDS(on) = 110 mW
Features
• Pb−Free Packages are Available
N−Channel
D
Applications
•
•
•
•
Power Supplies
Converters
Power Motor Controls
Bridge Circuits
G
S
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
60
Vdc
Drain−to−Gate Voltage (RGS = 10 MW)
VDGR
60
Vdc
Gate−to−Source Voltage
− Continuous
− Non−repetitive (tp ≤ 10 ms)
VGS
± 20
± 30
Vdc
Vpk
Drain Current
− Continuous @ TA = 25°C
− Continuous @ TA = 100°C
− Single Pulse (tp ≤ 10 ms)
ID
ID
3.0
1.4
9.0
Adc
PD
2.1
1.3
0.014
W
W
W/°C
TJ, Tstg
−55
to 175
°C
EAS
74
mJ
Total Power Dissipation @ TA = 25°C (Note 1)
Total Power Dissipation @ TA = 25°C (Note 2)
Derate above 25°C
Operating and Storage Temperature Range
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc,
IL(pk) = 7.0 Apk, L = 3.0 mH, VDS = 60 Vdc)
Thermal Resistance
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
IDM
RqJA
RqJA
72.3
114
TL
260
°C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits
are exceeded, device functional operation is not implied, damage may occur
and reliability may be affected.
1. When surface mounted to an FR4 board using 1″ pad size, 1 oz.
(Cu. Area 1.127 sq in).
2. When surface mounted to an FR4 board using minimum recommended pad
size, 2−2.4 oz. (Cu. Area 0.272 sq in).
© Semiconductor Components Industries, LLC, 2006
February, 2006 − Rev. 3
4
1
2
3
Drain
4
SOT−223
CASE 318E
STYLE 3
1
AWW
3055 G
G
1
Gate
Apk
°C/W
MARKING
DIAGRAM
& PIN
ASSIGNMENT
2
3
Drain Source
A
= Assembly Location
WW
= Work Week
3055
= Specific Device Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Shipping†
Device
Package
NTF3055−100T1
SOT−223
NTF3055−100T1G
SOT−223 1000/Tape & Reel
(Pb−Free)
NTF3055−100T3
SOT−223
4000/Tape & Reel
NTF3055−100T3G
SOT−223
(Pb−Free)
4000/Tape & Reel
NTF3055−100T3LF SOT−223
4000/Tape & Reel
1000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
NTF3055−100/D
NTF3055−100
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
60
−
68
66
−
−
−
−
−
−
1.0
10
−
−
± 100
2.0
−
3.0
6.6
4.0
−
−
88
110
−
0.27
0.24
0.40
−
gfs
−
3.2
−
Mhos
Ciss
−
324
455
pF
Coss
−
35
50
Crss
−
110
155
td(on)
−
9.4
20
tr
−
14
30
td(off)
−
21
45
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage (Note 3)
(VGS = 0 Vdc, ID = 250 mAdc)
Temperature Coefficient (Positive)
V(BR)DSS
Zero Gate Voltage Drain Current
(VDS = 60 Vdc, VGS = 0 Vdc)
(VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150°C)
IDSS
Gate−Body Leakage Current
(VGS = ± 20 Vdc, VDS = 0 Vdc)
IGSS
Vdc
mV/°C
mAdc
nAdc
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage (Note 3)
(VDS = VGS, ID = 250 mAdc)
Threshold Temperature Coefficient (Negative)
VGS(th)
Static Drain−to−Source On−Resistance (Note 3)
(VGS = 10 Vdc, ID = 1.5 Adc)
RDS(on)
Static Drain−to−Source On−Resistance (Note 3)
(VGS = 10 Vdc, ID = 3.0 Adc)
(VGS = 10 Vdc, ID = 1.5 Adc, TJ = 150°C)
VDS(on)
Forward Transconductance (Note 3)
(VDS = 8.0 Vdc, ID = 1.7 Adc)
Vdc
mV/°C
mW
Vdc
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
(VDS = 25 Vdc, VGS = 0 V,
f = 1.0 MHz)
Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
(VDD = 30 Vdc, ID = 3.0 Adc,
VGS = 10 Vdc,
RG = 9.1 W) (Note 3)
Fall Time
Gate Charge
(VDS = 48 Vdc, ID = 3.0 Adc,
VGS = 10 Vdc) (Note 3)
tf
−
13
30
QT
−
10.6
22
Q1
−
1.9
−
Q2
−
4.2
−
−
−
0.89
0.74
1.0
−
trr
−
30
−
ta
−
22
−
tb
−
8.6
−
QRR
−
0.04
−
ns
nC
SOURCE−DRAIN DIODE CHARACTERISTICS
Forward On−Voltage
(IS = 3.0 Adc, VGS = 0 Vdc)
(IS = 3.0 Adc, VGS = 0 Vdc,
TJ = 150°C) (Note 3)
Reverse Recovery Time
(IS = 3.0 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/ms) (Note 3)
Reverse Recovery Stored Charge
3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2.0%.
4. Switching characteristics are independent of operating junction temperatures.
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2
VSD
Vdc
ns
mC
NTF3055−100
6
6
5
VGS = 10 V
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
VDS ≥ 10 V
VGS = 5 V
4
3
VGS = 8 V
VGS = 4.5 V
2
VGS = 6 V
1
0
0
1
VGS = 4 V
3
2
5
4
3
TJ = 100°C
1
TJ = −55°C
0
4
TJ = 25°C
2
3
3.5
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
TJ = 25°C
0.08
TJ = −55°C
0.06
0.04
0.02
0
0
2
1
4
3
5
6
0.16
2.2
2
5.5
6
VGS = 15 V
0.14
TJ = 100°C
0.12
0.1
TJ = 25°C
0.08
0.06
TJ = −55°C
0.04
0.02
0
0
1
2
3
4
5
6
ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance versus
Gate−to−Source Voltage
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
1000
VGS = 0 V
ID = 1.5 A
VGS = 10 V
1.8
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
ID, DRAIN CURRENT (AMPS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
TJ = 100°C
0.12
0.1
5
Figure 2. Transfer Characteristics
VGS = 10 V
0.14
4.5
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
0.16
4
1.6
1.4
1.2
1
TJ = 150°C
100
TJ = 125°C
TJ = 100°C
10
0.8
0.6
−50
−25
0
25
50
75
100
125
150
1
175
0
10
20
30
40
50
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
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3
60
800
700
Ciss
600
500
Crss
400
Ciss
300
Coss
200
Crss
100
0
10
5 VGS 0 VDS 5
15
10
VGS
8
6
Q1
Q2
4
2
ID = 3 A
TJ = 25°C
0
0
2
4
6
8
10
12
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
3
VDS = 30 V
ID = 3 A
VGS = 10 V
tf
tr
10
100
25
QT
10
Qg, TOTAL GATE CHARGE (nC)
td(off)
1
20
IS, SOURCE CURRENT (AMPS)
t, TIME (ns)
10
12
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE
(VOLTS)
100
ID, DRAIN CURRENT (AMPS)
TJ = 25°C
td(on)
1
10
100
2
1
0
0.54
0.58 0.62
0.66
0.7
0.74 0.78 0.82 0.86
0.9
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Diode Forward Voltage versus Current
VGS = 20 V
SINGLE PULSE
TC = 25°C
1
1 ms
10 ms
0.1
0.01
0.1
VGS = 0 V
TJ = 25°C
RG, GATE RESISTANCE (W)
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1
100 ms
dc
10
100
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
C, CAPACITANCE (pF)
VGS = 0 V
VDS = 0 V
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
NTF3055−100
80
ID = 7 A
70
60
50
40
30
20
10
0
25
50
75
100
125
150
175
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
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4
NTF3055−100
r(t), EFFECTIVE TRANSIENT THERMAL RESPONSE
RESISTANCE (NORMALIZED)
10
1 x 1 inch 1 oz. Cu Pad (3 x 3 inch FR4)
1
0.1
0.01
0.001
0.00001
0.0001
0.001
0.01
0.1
t, TIME (s)
Figure 13. Thermal Response
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5
1
10
100
1000
NTF3055−100
PACKAGE DIMENSIONS
SOT−223 (TO−261)
CASE 318E−04
ISSUE L
D
b1
4
HE
1
2
3
E
b
e1
e
0.08 (0003)
C
q
A
A1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
DIM
A
A1
b
b1
c
D
E
e
e1
L1
HE
q
STYLE 3:
PIN 1.
2.
3.
4.
L1
MIN
1.50
0.02
0.60
2.90
0.24
6.30
3.30
2.20
0.85
1.50
6.70
0°
MILLIMETERS
NOM
MAX
1.63
1.75
0.06
0.10
0.75
0.89
3.06
3.20
0.29
0.35
6.50
6.70
3.50
3.70
2.30
2.40
0.94
1.05
1.75
2.00
7.00
7.30
10°
−
MIN
0.060
0.001
0.024
0.115
0.009
0.249
0.130
0.087
0.033
0.060
0.264
0°
INCHES
NOM
0.064
0.002
0.030
0.121
0.012
0.256
0.138
0.091
0.037
0.069
0.276
−
MAX
0.068
0.004
0.035
0.126
0.014
0.263
0.145
0.094
0.041
0.078
0.287
10°
GATE
DRAIN
SOURCE
DRAIN
SOLDERING FOOTPRINT*
3.8
0.15
2.0
0.079
2.3
0.091
2.3
0.091
6.3
0.248
2.0
0.079
1.5
0.059
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and
soldering details, please download the ON Semiconductor
Soldering and Mounting Techniques Reference Manual,
SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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6
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For additional information, please contact your
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NTF3055−100/D