Using the ISL97702 OLED Driver Demo Board ® Technical Brief Introduction The complete schematic of the ISL97702 OLED driver Demo Board is shown in Figure 1. In order to use the demo board properly, it is necessary to understand the purpose and function of the on board jumpers (JP1, JP2, JP3). In the demo board, jumper JP1 is used to enable ISL97702 through the NEN pin. The part is enabled when the NEN pin is connected to GND through JP1. JP2 is used for the selection of the output voltage feedback network. The pre-installed values of resistors R1, R5 and R6 in the demo board schematic set the selectable output voltages to 18.3V and 12.6V. Either of these two output voltages can be selected by shunting JP2 to either VDD or GND. June 12, 2006 TB455.0 To test the demo board, the following procedure must be followed: Shunt JP1 to GND. To enable ISL97702 boost converter. Connect the load. The load is connected through VOUT and GND_OUT terminals. Apply a DC power voltage source. The DC power voltage source is applied through both VDD_IN and GND_IN terminals. For ISL97702, the allowed input voltage range is from 2.3 to 5.5V. Due to the boost function, the input DC voltage must be lower than the output voltage in order to regulate the output voltage. JP3 is used to select either the internal ISL97702 switching frequency, or to synchronize to an external frequency. When JP3 is shunted to VDD, the ISL97702 boost converter switching frequency is internally set to around 1MHz. When JP3 is opened, the NSYNC pin of ISL97702 will connect through the J4 pin of the demo board. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. 2 J7 R1 390k VOUT C3 OPEN C8 100n C7 3.3µF/50V C6 3.3µF/50V R2 OPEN VDD J1 VDD_IN VDD C1 100n C2 10µ C9 4.7µ/10V 3 4 5 ISL97702 GND VDDOUT VDD LX VOUT NEN NSYNC SEL FBO FB1 R4 OPEN R5 26.1k R3 OPEN GND_OUT 10 9 C4 OPEN C5 OPEN VDD 1 2 J3 R6 39k 8 JPP2 J6 NEN 7 VDD 6 3 1 J4 L1 10µH U1 JPP2 JP3 3 NSYNC FIGURE 1. COMPLETED SCHEMATIC OF ISL97702 OLED DEMO BOARD J5 SEL Technical Brief 455 GND_IN 1 J2 TB455.0 June 12, 2006 Technical Brief 455 ISL97702 Bill of Materials DESIGNATOR PART TYPE FOOTPRINT C6 3.3µF/50V 1210 C7 3.3µF/50V 1210 C9 4.7µ/10V 805 C2 47µ/10V 1206 L1 10µH 6028 R5 26.1k 603 R6 39k 603 C8 100n 603 C1 100n 603 R1 390k 603 J2 GND_IN POWERPOST J3 GND_OUT POWERPOST JP1 JUMPER-3PIN JUMPER-3PIN JP2 JUMPER-3PIN JUMPER-3PIN JP3 JUMPER JUMPER-2PIN J6 NEN POWERPOST J4 NSYNC POWERPOST R2 OPEN 603 C3 OPEN 603 J5 SEL POWERPOST J1 VDD_IN POWERPOST J7 VOUT POWERPOST R4 OPEN 603 R3 OPEN 603 3 MANUFACTURER SUMIDA TB455.0 June 12, 2006 Technical Brief 455 Demo Board Layout FIGURE 2. TOP SILKSCREEN OF ISL97702 BOOST DEMO BOARD FIGURE 3. TOP LAYER OF ISL97702 BOOST DEMO BOARD 4 TB455.0 June 12, 2006 Technical Brief 455 Demo Board Layout (Continued) FIGURE 4. BOTTOM LAYER OF ISL97702 BOOST DEMO BOARD Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 5 TB455.0 June 12, 2006