ONSEMI MBRB3030CTLG

MBRB3030CTL
SWITCHMODEt
Power Rectifier
These state−of−the−art devices use the Schottky Barrier principle
with a proprietary barrier metal.
Features
•
•
•
•
•
•
•
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Dual Diode Construction, May be Paralleled for Higher Current Output
Guard−Ring for Stress Protection
Low Forward Voltage Drop
125°C Operating Junction Temperature
Maximum Die Size
Short Heat Sink Tab Manufactured − Not Sheared!
Pb−Free Package is Available
SCHOTTKY BARRIER
RECTIFIER
30 AMPERES, 30 VOLTS
1
4
Mechanical Characteristics
3
• Case: Epoxy, Molded, Epoxy Meets UL 94 V−0
• Weight: 1.7 Grams (Approximately)
• Finish: All External Surfaces Corrosion Resistant and Terminal
•
•
•
4
Leads are Readily Solderable
Lead and Mounting Surface Temperature for Soldering Purposes:
260°C Max. for 10 Seconds
Device Meets MSL1 Requirements
ESD Ratings: Machine Model, C (>400 V)
Human Body Model, 3B (>8000 V)
1
3
D2PAK
CASE 418B
PLASTIC
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VRRM
VRWM
VR
30
V
IO
15
30
A
Peak Repetitive Forward Current
(At Rated VR, Square Wave,
20 kHz, TC = 115°C)
IFRM
30
A
Non−Repetitive Peak Surge Current
(Surge Applied at Rated Load Conditions
Halfwave, Single Phase, 60 Hz)
IFSM
300
A
Peak Repetitive Reverse Surge Current
(1.0 ms, 1.0 kHz)
IRRM
2.0
A
Storage Temperature Range
Tstg
−55 to +150
°C
Operating Junction Temperature Range
TJ
−55 to +125
°C
dV/dt
10,000
V/ms
EAS
224.5
mJ
Peak Repetitive Reverse Voltage
Working Peak Reverse Voltage
DC Blocking Voltage
Average Rectified Forward Current
(At Rated VR, TC = 115°C) Per Device
Voltage Rate of Change
(Rated VR, TJ = 25°C)
Reverse Energy, Unclamped Inductive
Surge (TJ = 25°C, L = 3.0 mH)
August, 2005 − Rev. 6
AY WW
B3030CTLG
AKA
A
Y
WW
B3030CTL
G
AKA
1
= Assembly Location
= Year
= Work Week
= Device Code
= Pb−Free Package
= Diode Polarity
ORDERING INFORMATION
Device
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
© Semiconductor Components Industries, LLC, 2005
MARKING DIAGRAM
Package
Shipping
MBRB3030CTL
D2PAK
50 Units / Rail
MBRB3030CTLG
D2PAK
50 Units / Rail
(Pb−Free)
Publication Order Number:
MBRB3030CTL/D
MBRB3030CTL
THERMAL CHARACTERISTICS (All device data is “Per Leg” except where noted.)
Symbol
Value
Unit
Thermal Resistance, Junction−to−Ambient (Note 1)
Characteristic
RqJA
50
°C/W
Thermal Resistance, Junction−to−Case
RqJC
1.0
°C/W
ELECTRICAL CHARACTERISTICS
Maximum Instantaneous Forward Voltage (Note 2)
(IF = 15 A, TJ = 25°C)
(IF = 30 A, TJ = 25°C)
VF
Maximum Instantaneous Reverse Current (Note 2)
(Rated VR, TJ = 25°C)
(Rated VR, TJ = 125°C)
IR
V
0.44
0.51
mA
2.0
195
1. Mounted using minimum recommended pad size on FR−4 board.
2. Pulse Test: Pulse Width = 250 ms, Duty Cycle ≤ 2.0%.
1000
IF, INSTANTANEOUS FORWARD CURRENT (AMPS)
IF, INSTANTANEOUS FORWARD CURRENT (AMPS)
1000
100
TJ = 125°C
10
75°C
25°C
1.0
0.1
0.1
0.3
0.5
0.7
0.9
1.1
TJ = 125°C
10
75°C
25°C
1.0
0.1
0.1
0.3
0.5
0.7
0.9
VF, INSTANTANEOUS FORWARD VOLTAGE (VOLTS)
VF, MAXIMUM INSTANTANEOUS FORWARD VOLTAGE (VOLTS)
Figure 1. Typical Forward Voltage
Figure 2. Maximum Forward Voltage
1.1
1.0E+0
1.0E−1
IR , MAXIMUM REVERSE CURRENT (AMPS)
1.0E+0
IR , REVERSE CURRENT (AMPS)
100
TJ = 125°C
1.0E−1
TJ = 125°C
75°C
1.0E−2
1.0E−2
75°C
1.0E−3
1.0E−3
25°C
1.0E−4
25°C
1.0E−4
1.0E−5
1.0E−5
0
5.0
10
15
20
25
30
0
5.0
10
15
20
25
VR, REVERSE VOLTAGE (VOLTS)
VR, REVERSE VOLTAGE (VOLTS)
Figure 3. Typical Reverse Current
Figure 4. Maximum Reverse Current
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2
30
25
dc
20
SQUARE WAVE
15
Ipk/Io = p
Ipk/Io = 5.0
10
Ipk/Io = 10
Ipk/Io = 20
5.0
FREQ = 20 kHz
0
0
20
60
40
80
100
120
Ipk/Io = p
8.0
dc
SQUARE
WAVE
7.0
Ipk/Io = 5.0
6.0
5.0
Ipk/Io = 10
4.0
Ipk/Io = 20
3.0
TJ = 125°C
2.0
1.0
0
0
10
5.0
15
25
20
TC, CASE TEMPERATURE (°C)
IO, AVERAGE FORWARD CURRENT (AMPS)
Figure 5. Current Derating
Figure 6. Forward Power Dissipation
IPK , PEAK SURGE CURRENT (AMPS)
100
TJ = 25°C
C, CAPACITANCE (pF)
9.0
140
10,000
1000
100
TJ = 25°C
10
0.1
R T, TRANSIENT THERMAL RESISTANCE (NORMALIZED)
10
PFO , AVERAGE POWER DISSIPATION (WATTS)
IO , AVERAGE FORWARD CURRENT (AMPS)
MBRB3030CTL
1.0
10
100
0.00001
0.0001
0.001
0.01
VR, REVERSE VOLTAGE (VOLTS)
t, TIME (seconds)
Figure 7. Typical Capacitance
Figure 8. Typical Unclamped Inductive Surge
1.0E+00
1.0E−01
Rtjc(t) = Rtjc*r(t)
1.0E−02
0.00001
0.0001
0.001
0.01
t, TIME (seconds)
Figure 9. Typical Thermal Response
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3
0.1
1.0
10
MBRB3030CTL
Modeling Reverse Energy Characteristics
of Power Rectifiers
Prepared by: David Shumate & Larry Walker
ON Semiconductor Products Sector
ABSTRACT
applied to devices used in this switching power circuitry.
This technology lends itself to lower reverse breakdown
voltages. This combination of high voltage spikes and low
reverse breakdown voltage devices can lead to reverse
energy destruction of power rectifiers in their applications.
This phenomena, however, is not limited to just Schottky
technology.
In order to meet the challenges of these situations, power
semiconductor manufacturers attempt to characterize their
devices with respect to reverse energy robustness. The
typical reverse energy specification, if provided at all, is
usually given as energy−to−failure (mJ) with a particular
inductor specified for the UIS test circuit. Sometimes the
peak reverse test current is also specified. Practically all
reverse energy characterizations are performed using the
UIS test circuit shown in Figure 10. Typical UIS voltage and
current waveforms are shown in Figure 11.
In order to provide the designer with a more extensive
characterization than the above mentioned one−point
approach, a more comprehensive method for characterizing
these devices was developed. A designer can use the given
information to determine the appropriateness and safe
operating area (SOA) of the selected device.
Power semiconductor rectifiers are used in a variety of
applications where the reverse energy requirements often
vary dramatically based on the operating conditions of the
application circuit. A characterization method was devised
using the Unclamped Inductive Surge (UIS) test technique.
By testing at only a few different operating conditions
(i.e. different inductor sizes) a safe operating range can be
established for a device. A relationship between peak
avalanche current and inductor discharge time was
established. Using this relationship and circuit parameters,
the part applicability can be determined. This technique
offers a power supply designer the total operating conditions
for a device as opposed to the present single−data−point
approach.
INTRODUCTION
In today’s modern power supplies, converters and other
switching circuitry, large voltage spikes due to parasitic
inductance can propagate throughout the circuit, resulting in
catastrophic device failures. Concurrent with this, in an
effort to provide low−loss power rectifiers, i.e., devices with
lower forward voltage drops, Schottky technology is being
HIGH SPEED SWITCH
CHARGE INDUCTOR
DRAIN CURRENT
FREE−WHEELING
DIODE
+
V
−
INDUCTOR
CHARGE
SWITCH
DRAIN VOLTAGE
DUT
GATE
VOLTAGE
Figure 10. Simplified UIS Test Circuit
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4
MBRB3030CTL
Suggested Method of Characterization
INDUCTOR
CURRENT
Example Application
The device used for this example was an MBR3035CT,
which is a 30 A (15 A per side) forward current, 35 V reverse
breakdown voltage rectifier. All parts were tested to
destruction at 25°C. The inductors used for the
characterization were 10, 3.0, 1.0 and 0.3 mH. The data
recorded from the testing were peak reverse current (Ip),
peak reverse breakdown voltage (BVR), maximum
withstand energy, inductance and inductor discharge time
(see Table 1). A plot of the Peak Reverse Current versus
Time at device destruction, as shown in Figure 12, was
generated. The area under the curve is the region of lower
reverse energy or lower stress on the device. This area is
known as the safe operating area or SOA.
DUT
REVERSE
VOLTAGE
TIME (s)
120
Figure 11. Typical Voltage and Current UIS
Waveforms
100
80
Utilizing the UIS test circuit in Figure 10, devices are
tested to failure using inductors ranging in value from 0.01
to 159 mH. The reverse voltage and current waveforms are
acquired to determine the exact energy seen by the device
and the inductive current decay time. At least 4 distinct
inductors and 5 to 10 devices per inductor are used to
generate the characteristic current versus time relationship.
This relationship when coupled with the application circuit
conditions, defines the SOA of the device uniquely for this
application.
UIS CHARACTERIZATION CURVE
60
40
20
SAFE OPERATING AREA
0
0
0.0005 0.001 0.0015 0.002 0.0025 0.003 0.0035 0.004
TIME (s)
Figure 12. Peak Reverse Current versus
Time for DUT
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5
MBRB3030CTL
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Table 1. UIS Test Data
PART
NO.
As an example, the values were chosen as L = 200 mH,
OV = 12 V and BVR = 35 V.
Figure 13 illustrates the example. Note the UIS
characterization curve, the parasitic inductor current curve
and the safe operating region as indicated.
IP (A)
BVR (V)
ENERGY
(mJ)
L (mH)
TIME
(ms)
1
46.6
65.2
998.3
1
715
2
41.7
63.4
870.2
1
657
3
46.0
66.0
1038.9
1
697
4
42.7
64.8
904.2
1
659
5
44.9
64.8
997.3
1
693
6
44.1
64.1
865.0
1
687
7
26.5
63.1
1022.6
3
1261
8
26.4
62.8
1024.9
3
1262
9
24.4
62.2
872.0
3
1178
10
27.6
62.9
1091.0
3
1316
11
27.7
63.2
1102.4
3
1314
12
17.9
62.6
1428.6
10
2851
13
18.9
62.1
1547.4
10
3038
14
18.8
60.7
1521.1
10
3092
TIME (s)
15
19.0
62.6
1566.2
10
3037
16
74.2
69.1
768.4
0.3
322
Figure 13. DUT Peak Reverse and Circuit
Parasitic Inductance Current versus Time
17
77.3
69.6
815.4
0.3
333
18
75.2
68.9
791.7
0.3
328
19
77.3
69.6
842.6
0.3
333
20
73.8
69.1
752.4
0.3
321
21
75.6
69.2
823.2
0.3
328
22
74.7
68.6
747.5
0.3
327
23
78.4
70.3
834.0
0.3
335
24
70.5
66.6
678.4
0.3
317
25
78.3
69.4
817.3
0.3
339
The procedure to determine if a rectifier is appropriate,
from a reverse energy standpoint, to be used in the
application circuit is as follows:
a. Obtain “Peak Reverse Current versus Time” curve
from data book.
b. Determine steady state operating voltage (OV) of
circuit.
c. Determine parasitic inductance (L) of circuit section of
interest.
d. Obtain rated breakdown voltage (BVR) of rectifier
from data book.
e. From the following relationships,
V + L @ d i(t)
dt
I+
120
Ipeak TIME RELATIONSHIP
DUE TO CIRCUIT PARASITICS
100
80
60
UIS CHARACTERIZATION CURVE
40
20
SAFE OPERATING AREA
0
0
0.0005 0.001 0.0015 0.002 0.0025 0.003 0.0035 0.004
SUMMARY
Traditionally, power rectifier users have been supplied
with single−data−point reverse−energy characteristics by
the supplier’s device data sheet; however, as has been shown
here and in previous work, the reverse withstand energy can
vary significantly depending on the application. What was
done in this work was to create a characterization scheme by
which the designer can overlay or map their particular
requirements onto the part capability and determine quite
accurately if the chosen device is applicable. This
characterization technique is very robust due to its statistical
approach, and with proper guardbanding (6s) can be used to
give worst−case device performance for the entire product
line. A “typical” characteristic curve is probably the most
applicable for designers allowing them to design in their
own margins.
References
1. Borras, R., Aliosi, P., Shumate, D., 1993, “Avalanche
Capability of Today’s Power Semiconductors,
“Proceedings, European Power Electronic
Conference,” 1993, Brighton, England
(BVR * OV) @ t
L
2. Pshaenich, A., 1985, “Characterizing Overvoltage
Transient Suppressors,” Powerconversion
International, June/July
a “designer” l versus t curve is plotted alongside the
device characteristic plot.
f. The point where the two curves intersect is the current
level where the devices will start to fail. A peak
inductor current below this intersection should be
chosen for safe operating.
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6
MBRB3030CTL
PACKAGE DIMENSIONS
D2PAK
CASE 418B−04
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 418B−01 THRU 418B−03 OBSOLETE,
NEW STANDARD 418B−04.
C
E
V
W
−B−
4
DIM
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
S
V
A
1
2
S
3
−T−
K
SEATING
PLANE
W
J
G
D 3 PL
0.13 (0.005)
VARIABLE
CONFIGURATION
ZONE
H
M
T B
M
N
R
P
U
L
L
M
INCHES
MIN
MAX
0.340 0.380
0.380 0.405
0.160 0.190
0.020 0.035
0.045 0.055
0.310 0.350
0.100 BSC
0.080
0.110
0.018 0.025
0.090
0.110
0.052 0.072
0.280 0.320
0.197 REF
0.079 REF
0.039 REF
0.575 0.625
0.045 0.055
L
M
M
F
F
F
VIEW W−W
1
VIEW W−W
2
VIEW W−W
3
SOLDERING FOOTPRINT*
8.38
0.33
1.016
0.04
10.66
0.42
5.08
0.20
3.05
0.12
17.02
0.67
SCALE 3:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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7
MILLIMETERS
MIN
MAX
8.64
9.65
9.65 10.29
4.06
4.83
0.51
0.89
1.14
1.40
7.87
8.89
2.54 BSC
2.03
2.79
0.46
0.64
2.29
2.79
1.32
1.83
7.11
8.13
5.00 REF
2.00 REF
0.99 REF
14.60 15.88
1.14
1.40
MBRB3030CTL
SWITCHMODE is a trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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MBRB3030CTL/D