Infineon AUIRFU4104 Low on-resistance Datasheet

AUIRFR4104
AUIRFU4104
AUTOMOTIVE GRADE
Features
 Advanced Process Technology
 Low On-Resistance
 175°C Operating Temperature
 Fast Switching
 Repetitive Avalanche Allowed up to Tjmax
 Lead-Free, RoHS Compliant
 Automotive Qualified *
HEXFET® Power MOSFET
VDSS
40V
RDS(on)
max.
ID (Silicon Limited)
119A
ID (Package Limited)
42A
D
D
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to
achieve extremely low on-resistance per silicon area. Additional
features of this design are a 175°C junction operating temperature,
fast switching speed and improved repetitive avalanche rating .
These features combine to make this design an extremely efficient
and reliable device for use in Automotive applications and a wide
variety of other applications.
Base part number
Package Type
AUIRFU4104
I-Pak
AUIRFR4104
D-Pak
5.5m
G
S
G
D-Pak
AUIRFR4104
G
Gate
I-Pak
AUIRFU4104
D
Drain
Standard Pack
Form
Quantity
Tube
75
Tube
75
Tape and Reel Left
3000
S
D
S
Source
Orderable Part Number
AUIRFU4104
AUIRFR4104
AUIRFR4104TRL
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
Symbol
Parameter
Max.
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
119
ID @ TC = 100°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
84
ID @ TC = 25°C
IDM
PD @TC = 25°C
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current 
Maximum Power Dissipation
42
480
140
VGS
EAS
EAS (Tested)
IAR
EAR
TJ
TSTG
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally Limited) 
Single Pulse Avalanche Energy Tested Value 
Avalanche Current 
Repetitive Avalanche Energy 
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Thermal Resistance
Symbol
RJC
RJA
RJA
Parameter
Junction-to-Case 
Junction-to-Ambient ( PCB Mount) 
Junction-to-Ambient
Units
A
W
0.95
± 20
145
310
See Fig.15,16, 12a, 12b
W/°C
V
mJ
A
mJ
-55 to + 175
°C
300
Typ.
Max.
Units
–––
–––
–––
1.05
50
110
°C/W
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at www.infineon.com
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Static @ TJ = 25°C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Trans conductance
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
Conditions
40
––– –––
V VGS = 0V, ID = 250µA
––– 0.032 ––– V/°C Reference to 25°C, ID = 1mA
–––
4.3
5.5 m VGS = 10V, ID = 42A 
2.0
–––
4.0
V VDS = VGS, ID = 250µA
58
––– –––
S VDS = 10V, ID = 42A 
––– –––
20
VDS = 40V, VGS = 0V
µA
––– ––– 250
VDS = 40V,VGS = 0V,TJ =125°C
––– ––– 200
VGS = 20V
nA
––– ––– -200
VGS = -20V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
–––
–––
–––
–––
–––
–––
–––
59
19
24
17
69
37
36
89
–––
–––
–––
–––
–––
–––
LD
Internal Drain Inductance
–––
4.5
–––
LS
Internal Source Inductance
–––
7.5
–––
–––
–––
–––
–––
–––
–––
2950
660
370
2130
590
850
–––
–––
–––
–––
–––
–––
Min.
Typ. Max. Units
–––
–––
42
–––
–––
480
–––
–––
–––
–––
28
24
1.3
42
36
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Coss
Output Capacitance
Output Capacitance
Coss
Effective Output Capacitance
Coss eff.
Diode Characteristics
Parameter
Continuous Source Current
IS
(Body Diode)
Pulsed Source Current
ISM
(Body Diode)
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
ton
Forward Turn-On Time
ID = 42A
nC VDS = 32V
VGS = 10V
VDD = 20V
ID = 42A
ns
RG = 6.8
VGS = 10V
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
VGS = 0V
VDS = 25V
ƒ = 1.0MHz
pF
VGS = 0V, VDS = 1.0V ƒ = 1.0MHz
VGS = 0V, VDS = 32V ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 32V
Conditions
MOSFET symbol
showing the
A
integral reverse
p-n junction diode.
V TJ = 25°C,IS = 42A, VGS = 0V 
ns TJ = 25°C ,IF = 42A, VDD = 20V
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11)
 Limited by TJmax , starting TJ = 25°C, L = 0.16mH, RG = 25, IAS = 42A, VGS =10V. Part not recommended for use above this value.
 Pulse width 1.0ms; duty cycle  2%.
Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.
This value determined from sample failure population, starting TJ = 25°C, L = 0.16mH, RG = 25, IAS = 42A, VGS =10V.
 When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994
R is measured at TJ approximately 90°C.
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1000
1000
VGS
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
100
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
10
4.5V
60µs PULSE WIDTH
Tj = 25°C
1
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
100
4.5V
10
60µs PULSE WIDTH
Tj = 175°C
1
0.1
0
1
10
100
100
0.1
0
VDS , Drain-to-Source Voltage (V)
100
100
Fig. 2 Typical Output Characteristics
120
1000
Gfs, Forward Transconductance (S)
T J = 25°C
ID, Drain-to-Source Current )
10
VDS, Drain-to-Source Voltage (V)
Fig. 1 Typical Output Characteristics
T J = 175°C
100
10
VDS = 20V
60µs PULSE WIDTH
4
6
8
T J = 175°C
100
80
60
T J = 25°C
40
20
VDS = 10V
380µs PULSE WIDTH
0
1
10
VGS, Gate-to-Source Voltage (V)
Fig. 3 Typical Transfer Characteristics
3
1
0
20
40
60
80
100
ID, Drain-to-Source Current (A)
Fig. 4 Typical Forward Trans conductance
Vs. Drain Current
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AUIRFR/U4104
5000
ID= 42A
VGS, Gate-to-Source Voltage (V)
4000
C, Capacitance (pF)
20
VGS = 0V,
f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = C gd
Coss = Cds + Cgd
Ciss
3000
2000
Coss
1000
Crss
16
12
8
4
0
0
1
10
100
0
VDS, Drain-to-Source Voltage (V)
40
ID, Drain-to-Source Current (A)
10000
100.0
T J = 175°C
10.0
T J = 25°C
1.0
0.1
1.0
1.5
VSD , Source-toDrain Voltage (V)
Fig. 7 Typical Source-to-Drain Diode
Forward Voltage
100
1000
100
100µsec
10
1msec
1
2.0
10msec
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
0.5
80
OPERATION IN THIS AREA
LIMITED BY R DS (on)
VGS = 0V
0.0
60
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
1000.0
ISD, Reverse Drain Current (A)
20
QG Total Gate Charge (nC)
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
4
VDS = 32V
VDS= 20V
0
1
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
2015-12-1
AUIRFR/U4104
120
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
LIMITED BY PACKAGE
ID , Drain Current (A)
100
80
60
40
20
0
ID = 42A
VGS = 10V
1.5
1.0
0.5
25
50
75
100
125
150
175
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
T C , Case Temperature (°C)
T J , Junction Temperature (°C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10. Normalized On-Resistance
Vs. Temperature
Thermal Response ( Z thJC )
10
1
D = 0.50
0.1
0.20
0.10
J
0.05
0.01
0.02
0.01
R1
R1
J
1
R2
R2
C
1
2
Ri (°C/W)
i (sec)
0.5067
0.000414
0.5428
0.004081
C
2
Ci= iRi
Ci= iRi
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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15V
DRIVER
L
VDS
D.U.T
RG
+
V
- DD
IAS
20V
A
0.01
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
4.0
Id
Vgs
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
Fig 13a. Gate Charge Waveform
VGS(th) Gate threshold Voltage (V)
Vds
ID = 250µA
3.0
2.0
1.0
-75
-50 -25
0
25
50
75
100 125 150 175
T J , Temperature ( °C )
Fig 14. Threshold Voltage Vs. Temperature
Fig 13b. Gate Charge Test Circuit
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1000
Avalanche Current (A)
Duty Cycle = Single Pulse
100
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming  Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
0.05
10
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
tav (sec)
Fig 15. Typical Avalanche Current Vs. Pulse width
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.infineon.com)
EAR , Avalanche Energy (mJ)
160
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 42A
120
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
80
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
40
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
Fig 16. Maximum Avalanche Energy
Vs. Temperature
7
EAS (AR) = PD (ave)·tav
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Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
Fig 18a. Switching Time Test Circuit
8
Fig 18b. Switching Time Waveforms
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AUIRFR/U4104
D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches))
D-Pak (TO-252AA) Part Marking Information
Part Number
AUFR4104
YWWA
IR Logo
XX

Date Code
Y= Year
WW= Work Week
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRFR/U4104
I-Pak (TO-251AA) Package Outline (Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
Part Number
AUFU4104
YWWA
IR Logo
XX

Date Code
Y= Year
WW= Work Week
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRFR/U4104
D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches))
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRFR/U4104
Qualification Information
Qualification Level
Moisture Sensitivity Level
Machine Model
ESD
Human Body Model
Charged Device Model
RoHS Compliant
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. Infineon’s
Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
D-Pak
MSL1
I-Pak
Class M4 (+/- 425V)†
AEC-Q101-002
Class H1C (+/-1750V)†
AEC-Q101-001
Class C5 (+/-625V)†
AEC-Q101-005
Yes
† Highest passing voltage.
Revision History
Date
12/1/2015
Comments



Updated datasheet with corporate template
Corrected ordering table on page 1.
Corrected typo RthJA (PCB Mount) from “40C/W” to “50C/W” on page 1.
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
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(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
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Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
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