ONSEMI CAT4109V-GT2

CAT4109
3-Channel Constant-Current RGB LED Driver with
Individual PWM Dimming
FEATURES
DESCRIPTION
„ 3 independent current sinks up to 175mA
rated 25V
„ LED Current set by external low power
control resistors
„ Individual PWM control per channel
„ Low dropout current source (0.4V at 175mA)
„ Output Enable input for dimming
„ “Zero” current shutdown mode
„ 3V to 5.5V logic supply
„ Thermal shutdown protection
„ RoHS-compliant 16-lead SOIC package
The CAT4109 is a 3-channel constant-current LED driver,
requiring no inductor. LED channel currents up to 175mA
are programmed independently via separate external
resistors. Low output voltage operation of 0.4V at 175mA
allows for more power efficient designs across wider
supply voltage range. The three LED pins are compatible
with high voltage up to 25V supporting applications with
long strings of LEDs.
Three independent control inputs PWM1, PWM2, PWM3,
control respectivelly LED1, LED2, LED3 channels. The
device also includes an output enable (OE) control pin to
disable all three channels independently of the PWMx
input states.
APPLICATIONS
„ Multi-color LED, Architectural Lighting
„ LED signs and displays
„ LCD backlight
Thermal shutdown protection is incorporated in the device
to disable the LED outputs whenever the die temperature
exceeds 150ºC.
The device is available in a 16-lead SOIC package.
ORDERING INFORMATION
Part
Number
Package
Quantity
per Reel
Package
Marking
CAT4109V-GT2
SOIC-16*
2,000
CAT4109V
* Lead Finish NiPdAu
PIN CONFIGURATION
TYPICAL APPLICATION CIRCUIT
16-Lead SOIC (W)
Top View
VIN
5V to 25V
PGND
1
16
VDD
GND
2
15
OE
PWM3
3
14
NC
PWM2
4
13
NC
PWM1
5
12
NC
RSET3
6
11
LED1
RSET2
7
10
LED2
RSET1
8
9
LED3
VDD
3V to 5.5V
RED
VDD
LED1
GREEN
LED2
BLUE
LED3
OE
PWM1
PWM2
CONTROLLER
PWM3
CAT4109
RSET1
RSET2
RSET3 GND
R1
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
C1
1µF
1
R2
PGND
R3
Doc. No. MD-5042, Rev. A
CAT4109
ABSOLUTE MAXIMUM RATINGS
Parameter
VDD Voltage
Input Voltage Range (OE, PWM1, PWM2, PWM3)
LED1, LED2, LED3 Voltage
DC Output Current on LED1 to LED3
Storage Temperature Range
Junction Temperature Range
Lead Soldering Temperature (10sec.)
ESD Rating on All Pins:
Rating
Units
6
-0.3V to 6V
25
200
-55 to +160
-40 to +150
300
V
V
V
mA
°C
°C
°C
2000
200
V
• Human Body Model
• Machine Model
RECOMMENDED OPERATING CONDITIONS
Parameter
Range
Units
VDD
3.0 to 5.5
V
Voltage applied to LED1 to LED3, outputs off
up to 25
V
Voltage applied to LED1 to LED3, outputs on
up to 6*
V
Output Current on LED1 to LED3
2 to 175
mA
Ambient Temperature Range
-40 to +85
°C
* Keeping LEDx pin voltage below 6V in operation is recommended to minimize thermal dissipation in the package.
ELECTRICAL OPERATING CHARACTERISTICS
DC CHARACTERISTICS
Min and Max values are over recommended operating conditions unless specified otherwise.
Typical values are at VDD = 5.0V, TAMB = 25°C
Symbol Name
IDD1
IDD2
IDD3
IDD4
ISHDN
ILKG
ROE
Supply Current Outputs Off
Supply Current Outputs Off
Supply Current Outputs On
Supply Current Outputs On
Shutdown Current
LED Output Leakage
OE pull-down resistance
VOE_IH
VOE_IL
OE logic high input voltage
OE logic low input voltage
VPWM_IH
VPWM_IL
IIL
VRSETx
TSD
THYS
PWMx logic high input voltage
PWMx logic low input voltage
Logic Input Leakage Current
(PWMx)
RSETx Regulated Voltage
Thermal Shutdown
Thermal Hysteresis
ILED/IRSET RSET to LED Current Gain ratio
VUVLO
Conditions
VLED = 5V, RSET = 24.9kΩ
VLED = 5V, RSET = 5.23kΩ
VLED = 0.5V, RSET = 24.9kΩ
VLED = 0.5V, RSET = 5.23kΩ
VOE = 0V
VLED = 5V, Outputs Off
-1
140
Typ
Max
Units
2
4
2
4
5
10
5
10
1
1
250
mA
mA
mA
mA
µA
µA
kΩ
1.2
V
0.7x VDD
V
190
0.4
0.3x VDD
VPWMx = VDD or GND
100mA LED Current
Undervoltage Lockout (UVLO)
Threshold
Doc. No. MD-5042, Rev. A
Min
-5
0
5
µA
1.17
1.2
150
20
1.23
V
°C
°C
400
1.8
2
V
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT4109
RECOMMENDED TIMING
Min and Max values are over recommended operating conditions unless specified otherwise.
Typical values are at VDD = 5.0V, TAMB = 25°C
Symbol Name
TPS
TP1
Conditions
Turn-On time, OE rising to ILED from
Shutdown
Turn-On time, OE or PWMx rising to
I
Turn-Off
time, OE or PWMx falling to
Min
Typ
Max
Units
ILED = 100mA
1.4
μs
ILED = 100mA
600
ns
ILED = 100mA
ILED = 100mA
ILED = 100mA
300
300
300
ns
ns
ns
TP2
TR
TF
I
LED rise time
LED fall time
TLO
OE low time
1
μs
THI
OE high time
5
μs
TPWRDWN OE low time to shutdown delay
4
8
ms
TPWRDWN
THI
TLO
Output Enable
SHUTDOWN
SHUTDOWN 0mA
TP2
TF
TPS
TP1
TR
ILED = (1.2V/RSET) x 400
90%
LED Current
50%
50%
10%
SHUTDOWN 0mA
0mA
VIN Quiescent Current
SHUTDOWN 0mA
SHUTDOWN 0mA
Figure 1. CAT4109 OE Timing
OE OPERATION
The Output Enable (OE) pin has two primary
functions. When the OE input goes from high to low,
all three LED channels are turned off. If OE remains
low for longer than TPWRDWN, the device enters
shutdown mode drawing “zero current” from the
supply.
Accurate linear dimming on OE is compatible with
PWM frequencies from 100Hz to 5kHz for PWM duty
cycle down to 1%. PWM frequencies up to 50kHz can
be supported for duty cycles greater than 10%.
When performing a combination of low frequencies
and small duty cycles, the device may enter
shutdown mode. This has no effect on the dimming
accuracy, because the turn-on time TPS is very short,
in the range of 1µs.
The OE input can be used to adjust the contrast of
the RGB LED by applying an external PWM signal.
The device has a very fast turn-on time (from OE
rising to LED on) allowing “instant on” when dimming
LEDs.
To ensure that PWM pulses are recognized, pulse
width low time TLO should be longer than 1μs. The
driver enters a “zero current” shutdown mode after a
4ms delay (typical) when OE is held low.
When applying PWM signals to the three PWMx
inputs and using the OE pin for dimming, the OE
PWM frequency should be much lower to preserve
the color mixing.
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
3
Doc. No. MD-5042, Rev. A
CAT4109
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 5V, VDD = 5V, C1 = 1μF, TAMB = 25°C unless otherwise specified.
Quiescent Current vs. Input Voltage (ILED = 0mA)
Quiescent Current vs. RSET Current
8.0
QUIESCENT CURRENT [mA]
QUIESCENT CURRENT [mA]
1.2
No Load
1.0
0.8
0.6
4.0
2.0
0.0
0.4
3.0
3.5
4.0
4.5
5.0
INPUT VOLTAGE [V]
0
5.5
100
200
300
RSET CURRENT [μA]
400
LED Current vs. LED Pin Voltage
Quiescent Current vs. Input Voltage (ILED = 175mA)
200
6.0
Full Load
LED CURRENT [mA]
QUIESCENT CURRENT [mA]
6.0
5.5
5.0
4.5
160
120
80
40
0
4.0
3.0
3.5
4.0
4.5
5.0
INPUT VOLTAGE [V]
0.0
5.5
0.2
0.4
0.6
0.8
LED PIN VOLTAGE [V]
1.0
LED Current Change vs. Input Voltage
LED Current Change vs. Temperature
200
160
LED CURRENT [mA]
LED CURRENT [mA]
200
120
80
40
0
160
120
80
40
0
3.0
Doc. No. MD-5042, Rev. A
3.5
4.0
4.5
5.0
INPUT VOLTAGE [V]
5.5
-40
4
0
40
80
TEMPERATURE [ºC]
120
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT4109
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 5V, VDD = 5V, C1 = 1μF, TAMB = 25°C unless otherwise specified.
RSET Pin Voltage vs. Temperature
RSET Pin Voltage vs. Input Voltage
1.30
RSET VOLTAGE [V]
RSET VOLTAGE [V]
1.30
1.25
1.20
1.15
1.10
1.25
1.20
1.15
1.10
3.0
3.5
4.0
4.5
5.0
INPUT VOLTAGE [V]
5.5
-40
0
40
80
TEMPERATURE [ºC]
120
LED Current vs. RSET Resistor
LED CURRENT [mA]
200
160
120
80
40
0
0
15
30
RSET [kΩ]
45
60
OE Transient Response at 1kHz
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
PWMx Transient Response
5
Doc. No. MD-5042, Rev. A
CAT4109
PIN DESCRIPTIONS
Name
Pin Number
Function
PGND
1
Power Ground.
GND
2
Ground Reference.
PWM3
3
PWM control input for LED3
PWM2
4
PWM control input for LED2
PWM1
5
PWM control input for LED1
RSET3
6
LED current set pin for LED3
RSET2
7
LED current set pin for LED2
RSET1
8
LED current set pin for LED1
LED3
9
LED channel 3 cathode terminal
LED2
10
LED channel 2 cathode terminal
LED1
11
LED channel 1 cathode terminal
NC
12
Not connected inside package
NC
13
Not connected inside package
NC
14
Not connected inside package
OE
15
Output Enable input pin
VDD
16
Device Supply pin
PIN FUNCTION
PGND is the power ground reference pin for the
device. This pin must be connected to the GND pin
and to the ground plane on the PCB.
GND is the ground reference pin for the entire device.
This pin must be connected to the ground plane on
the PCB.
LED1 to LED3 are the LED current sink inputs. These
pins are connected to the bottom cathodes of the LED
strings. The current sinks bias the LEDs with a current
equal to 400 times the corresponding RSETx pin
current. For the LED sink to operate correctly the
voltage on the LED pin must be above 0.4V. Each
LED channel can withstand voltages up to 25V.
PWM1 to PWM3 are the control inputs respectively for
LED1, LED2 and LED3 channels. When PWMx are
low, the associated LED channels are turned off.
When PWMx are high, the corresponding channels
are turned on, assuming the OE input is also high.
PWMx pins can not be left open and must be set to
either to logic high or low.
OE is the output enable input. When high, all LED
channels are enabled according to the state of their
corresponding PWMx control inputs. When low, all
LED channels are turned off. This pin can be used to
turn all the LEDs off independently of the state of the
PWMx inputs. If the OE stays low for a duration longer
than TPWRDWN, the device enters shutdown mode.
RSET1 to RSET3 are the LED current set inputs. The
current pulled out of these pins will be mirrored in the
corresponding LED channel with a gain of 400.
VDD is the positive supply pin voltage for the entire
device. A small 1µF bypass ceramic capacitor is
recommended between VDD pin and ground near the
device.
Doc. No. MD-5042, Rev. A
6
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT4109
BLOCK DIAGRAM
LED1 LED2
+
VDD
LED3
Tight current regulation for all channels is possible
over a wide range of input and LED voltages due to
independent current sensing circuitry on each
channel. The LED channels have a low dropout of
0.4V or less for all current ranges and supply
voltages. This helps improve heat dissipation and
efficiency.
1.2V Ref
RSET3
Current Setting
RSET2
Current Setting
RSET1
Current Setting
CURRENT
SINKS
Upon power-up, an under-voltage lockout circuit sets
all outputs to off. Once the VDD supply voltage is
greater than the under-voltage lockout threshold, the
device channel can be turned on. The on/off state of
each channel LED1, LED2 and LED3 is
independently controlled repectivelly by PWM1,
PWM2, PWM3. When a PWMx is high, the
associated LEDx channel is turned on.
OE
PWM1
PWM2
PWM3
PGND
GND
Figure 2. CAT4109 Functional Block Diagram
BASIC OPERATION
The CAT4109 uses 3 independent current sinks to
accurately regulate the current in each LED channel
to 400 times the current sink from the corresponding
RSET pin. Each of the resistors tied to the RSET1,
RSET2, RSET3 pins set the current respectively in
the LED1, LED2, and LED3 channels. Table 1 shows
standard resistor values for RSET and the
corresponding LED current.
Table 1. RSET Resistor Settings
LED Current [mA]
RSET[kΩ]
20
24.9
60
8.45
100
5.23
175
3.01
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
7
Doc. No. MD-5042, Rev. A
CAT4109
APPLICATION INFORMATION
POWER DISSIPATION
RECOMMENDED LAYOUT
The power dissipation (PD) of the CAT4109 can be
calculated as follows:
Bypass capacitor C1 should be placed as close to the
IC as possible. RSET resistors should be directly
connected to the GND pin of the device. For better
thermal dissipation, multiple via can be used to
connect the GND pad to a large ground plane. It is
also recommended to use large pads and traces on
the PCB wherever possible to spread out the heat.
The LEDs for this layout are driven from a separate
supply (VLED+), but they can also be driven from the
same supply connected to VDD.
PD = (VDD × IDD ) + Σ(VLEDN × ILEDN )
where VLEDN is the voltage at the LED pin, and ILEDN is
the associated LED current. Combinations of high
VLED voltage or high ambient temperature can cause
the CAT4109 to enter thermal shutdown. In
applications where VLEDN is high, a resistor can be
inserted in series with the LED string to lower PD.
Thermal dissipation of the junction heat consists
primarily of two paths in series. The first path is the
junction to the case (θJC) thermal resistance which is
defined by the package style, and the second path is
the case to ambient (θCA) thermal resistance, which is
dependent on board layout. The overall junction to
ambient (θJA) thermal resistance is equal to:
θJA = θJC + θCA
For a given package style and board layout, the
operating junction temperature TJ is a function of the
power dissipation PD, and the ambient temperature,
resulting in the following equation:
TJ = TAMB + PD (θJC + θCA)
= TAMB + PD θJA
Figure 3. Recommended Layout
When mounted on a double-sided printed circuit
board with two square inches of copper allocated for
“heat spreading”, the resulting θJA is about 74°C/W.
For example, at 60°C ambient temperature, the
maximum power dissipation is calculated as follow:
PDmax =
(TJmax - TAMB ) (150 - 60)
=
= 1.2W
θJA
74
Doc. No. MD-5042, Rev. A
8
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT4109
PACKAGE OUTLINE DRAWING
SOIC 16-Lead 150mils (V)
(1)(2)
0F0F
E1
SYMBOL
MIN
A
1.35
1.75
A1
0.10
0.25
E
MAX
b
0.33
0.51
c
0.19
0.25
D
9.80
9.90
10.00
E
5.80
6.00
6.20
E1
3.80
3.90
4.00
e
PIN#1 IDENTIFICATION
NOM
1.27 BSC
h
0.25
0.50
L
0.40
1.27
θ
0º
8º
TOP VIEW
D
h
θ
A
e
b
A1
SIDE VIEW
c
L
END VIEW
For current Tape and Reel information, download the PDF file from:
http://www.catsemi.com/documents/tapeandreel.pdf.
Notes:
(1) All dimensions in millimeters. Angle in degrees.
(2) Compiles with JEDEC standard-012.
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
9
Doc. No. MD-5042, Rev. A
CAT4109
EXAMPLE OF ORDERING INFORMATION (1)
1F1F1F
Prefix
CAT
Device # Suffix
4109
V
–
G
Package
V: SOIC
Company ID
Product Number
T2
Tape & Reel
T: Tape & Reel
2: 2,000/Reel
4109
Lead Finish
G: NiPdAu
Blank: Matte-Tin
Notes:
(1) All packages are RoHS-compliant (Lead-free, Halogen-free).
(2) The standard plated finish is NiPdAu.
(3) The device used in the above example is a CAT4109V-GT2 (SOIC, NiPdAu, Tape & Reel, 2,000/Reel).
(4) For additional temperature options, please contact your nearest ON Semiconductor Sales office.
Doc. No. MD-5042, Rev. A
10
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT4109
REVISION HISTORY
Date
Revision
Description
7-Jan-09
A
Initial Issue
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to
any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer
purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and
distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated
with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada
Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada
Email: [email protected]
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
N. American Technical Support: 800-282-9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center:
Phone: 81-3-5773-3850
11
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
Doc. No. MD-5038, Rev. A