ONSEMI NSS40200LT1G

NSS40200LT1G
40 V, 4.0 A, Low VCE(sat)
PNP Transistor
ON Semiconductor’s e2 PowerEdge family of low VCE(sat)
transistors are miniature surface mount devices featuring ultra low
saturation voltage (VCE(sat)) and high current gain capability. These
are designed for use in low voltage, high speed switching applications
where affordable efficient energy control is important.
Typical applications are DC−DC converters and power management
in portable and battery powered products such as cellular and cordless
phones, PDAs, computers, printers, digital cameras and MP3 players.
Other applications are low voltage motor controls in mass storage
products such as disc drives and tape drives. In the automotive
industry they can be used in air bag deployment and in the instrument
cluster. The high current gain allows e2PowerEdge devices to be
driven directly from PMU’s control outputs, and the Linear Gain
(Beta) makes them ideal components in analog amplifiers.
• This is a Pb−Free Device
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−40 VOLTS
4.0 AMPS
PNP LOW VCE(sat) TRANSISTOR
EQUIVALENT RDS(on) 80 mW
COLLECTOR
3
1
BASE
MAXIMUM RATINGS (TA = 25°C)
Symbol
Max
Unit
Collector-Emitter Voltage
VCEO
−40
Vdc
Collector-Base Voltage
VCBO
−40
Vdc
Emitter-Base Voltage
VEBO
−7.0
Vdc
IC
−2.0
A
ICM
−4.0
A
Rating
Collector Current − Continuous
Collector Current − Peak
Electrostatic Discharge
ESD
2
EMITTER
3
1
2
SOT−23 (TO−236)
CASE 318
STYLE 6
HBM Class 3B
MM Class C
THERMAL CHARACTERISTICS
Symbol
Max
Unit
Total Device Dissipation
TA = 25°C
Derate above 25°C
Characteristic
PD (Note 1)
460
mW
3.7
mW/°C
Thermal Resistance,
Junction−to−Ambient
RqJA (Note 1)
270
°C/W
Total Device Dissipation
TA = 25°C
Derate above 25°C
PD (Note 2)
540
mW
4.3
mW/°C
Thermal Resistance,
Junction−to−Ambient
RqJA (Note 2)
230
°C/W
Total Device Dissipation
(Single Pulse < 10 sec)
PDsingle
(Note 3)
710
mW
Junction and Storage
Temperature Range
TJ, Tstg
−55 to
+150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR−4 @ 100 mm2, 1 oz. copper traces.
2. FR−4 @ 500 mm2, 1 oz. copper traces.
3. Thermal response.
© Semiconductor Components Industries, LLC, 2007
March, 2007 − Rev. 2
1
DEVICE MARKING
VA M G
G
1
VA = Specific Device Code
M = Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or overbar may
vary depending upon manufacturing location.
ORDERING INFORMATION
Device
Package
Shipping†
NSS40200LT1G
SOT−23
(Pb−Free)
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NSS40200L/D
NSS40200LT1G
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
−40
−
−
−40
−
−
−7.0
−
−
−
−
−0.1
−
−
−0.1
250
220
180
150
−
300
−
−
−
−
−
−
−
−
−
−
−0.010
−0.080
−0.135
−0.135
−0.017
−0.095
−0.170
−0.170
−
−
−0.900
−
−
−0.900
100
−
−
Unit
OFF CHARACTERISTICS
Collector −Emitter Breakdown Voltage
(IC = −10 mAdc, IB = 0)
V(BR)CEO
Collector −Base Breakdown Voltage
(IC = −0.1 mAdc, IE = 0)
V(BR)CBO
Emitter −Base Breakdown Voltage
(IE = −0.1 mAdc, IC = 0)
V(BR)EBO
Collector Cutoff Current
(VCB = −40 Vdc, IE = 0)
ICBO
Emitter Cutoff Current
(VEB = −7.0 Vdc)
IEBO
Vdc
Vdc
Vdc
mAdc
mAdc
ON CHARACTERISTICS
DC Current Gain (Note 4)
(IC = −10 mA, VCE = −2.0 V)
(IC = −500 mA, VCE = −2.0 V)
(IC = −1.0 A, VCE = −2.0 V)
(IC = −2.0 A, VCE = −2.0 V)
hFE
Collector −Emitter Saturation Voltage (Note 4)
(IC = −0.1 A, IB = −0.010 A) (Note 5)
(IC = −1.0 A, IB = −0.100 A)
(IC = −1.0 A, IB = −0.010 A)
(IC = −2.0 A, IB = −0.200 A)
VCE(sat)
Base −Emitter Saturation Voltage (Note 4)
(IC = −1.0 A, IB = −0.01 A)
VBE(sat)
Base −Emitter Turn−on Voltage (Note 4)
(IC = −1.0 A, VCE = −2.0 V)
VBE(on)
V
V
V
Cutoff Frequency
(IC = −100 mA, VCE = −5.0 V, f = 100 MHz)
fT
MHz
Input Capacitance (VEB = 0.5 V, f = 1.0 MHz)
Cibo
−
−
325
pF
Output Capacitance (VCB = 3.0 V, f = 1.0 MHz)
Cobo
−
−
62
pF
Delay (VCC = −30 V, IC = 750 mA, IB1 = 15 mA)
td
−
−
60
ns
Rise (VCC = −30 V, IC = 750 mA, IB1 = 15 mA)
tr
−
−
120
ns
Storage (VCC = −30 V, IC = 750 mA, IB1 = 15 mA)
ts
−
−
400
ns
Fall (VCC = −30 V, IC = 750 mA, IB1 = 15 mA)
tf
−
−
130
ns
SWITCHING CHARACTERISTICS
4. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%.
5. Guaranteed by design but not tested.
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2
NSS40200LT1G
0.35
VCE(sat) = 150°C
IC/IB = 10
VCE(sat), COLLECTOR EMITTER
SATURATION VOLTAGE (V)
VCE(sat), COLLECTOR EMITTER
SATURATION VOLTAGE (V)
0.25
0.2
25°C
0.15
−55°C
0.1
0.05
0
0.001
0.01
0.1
1.0
−55°C
0.2
0.15
0.1
0.05
10
0
0.001
0.01
0.9
10
1.1
VBE(sat), BASE EMITTER
SATURATION VOLTAGE (V)
150°C (5.0 V)
1.0
0.9
−55°C
0.8
25°C
0.7
0.6
0.5
150°C
0.4
0.3
10
IC/IB = 10
1.0
0.001
0.01
0.1
1.0
10
IC, COLLECTOR CURRENT (A)
IC, COLLECTOR CURRENT (A)
Figure 3. DC Current Gain vs. Collector
Current
Figure 4. Base Emitter Saturation Voltage vs.
Collector Current
1.0
VCE = −2.0 V
−55°C
0.8
0.7
25°C
0.6
0.5
150°C
0.4
0.3
0.2
0.1
1.0
Figure 2. Collector Emitter Saturation Voltage
vs. Collector Current
VCE, COLLECTOR−EMITTER
VOLTAGE (V)
hFE, DC CURRENT GAIN
VBE(on), BASE EMITTER TURN−ON
VOLTAGE (V)
1.0
0.1
IC, COLLECTOR CURRENT (A)
Figure 1. Collector Emitter Saturation Voltage
vs. Collector Current
0.1
25°C
0.25
IC, COLLECTOR CURRENT (A)
800
750
700
650 150°C (2.0 V)
600
550
500 25°C (5.0 V)
450
400 25°C (2.0 V)
350
300 −55°C (5.0 V)
250
200 −55°C (2.0 V)
150
100
0.001
0.01
VCE(sat) = 150°C
IC/IB = 100
0.3
0.001
0.01
0.1
1.0
10
10 mA
0.8
VCE (V) IC = 500 mA
100 mA
300 mA
0.6
0.4
0.2
0
0.01
IC, COLLECTOR CURRENT (A)
0.1
1.0
10
IB, BASE CURRENT (mA)
Figure 5. Base Emitter Turn−On Voltage vs.
Collector Current
Figure 6. Saturation Region
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3
100
NSS40200LT1G
Cobo, OUTPUT CAPACITANCE (pF)
100
300
Cibo (pF)
275
250
225
200
175
150
125
100
0
1.0
2.0
3.0
5.0
4.0
90
80
70
60
50
40
30
20
6.0
Cobo (pF)
0
10
5.0
15
20
25
30
VEB, EMITTER BASE VOLTAGE (V)
VCB, COLLECTOR BASE VOLTAGE (V)
Figure 7. Input Capacitance
Figure 8. Output Capacitance
10
100 ms
10 ms
1s
1 ms
1.0
IC (A)
Cibo, INPUT CAPACITANCE (pF)
325
0.1
Thermal Limit
0.01
0.01
0.1
1.0
10
VCE (Vdc)
Figure 9. Safe Operating Area
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4
100
35
NSS40200LT1G
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AN
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. 318−01 THRU −07 AND −09 OBSOLETE, NEW
STANDARD 318−08.
D
SEE VIEW C
3
HE
E
1
c
2
e
b
DIM
A
A1
b
c
D
E
e
L
L1
HE
0.25
q
A
L
A1
MIN
0.89
0.01
0.37
0.09
2.80
1.20
1.78
0.10
0.35
2.10
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.13
0.18
2.90
3.04
1.30
1.40
1.90
2.04
0.20
0.30
0.54
0.69
2.40
2.64
MIN
0.035
0.001
0.015
0.003
0.110
0.047
0.070
0.004
0.014
0.083
INCHES
NOM
0.040
0.002
0.018
0.005
0.114
0.051
0.075
0.008
0.021
0.094
MAX
0.044
0.004
0.020
0.007
0.120
0.055
0.081
0.012
0.029
0.104
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
L1
VIEW C
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.0
0.079
0.9
0.035
0.8
0.031
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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For additional information, please contact your local
Sales Representative
NSS40200L/D