Vishay IRF624PBF Power mosfet Datasheet

IRF624, SiHF624
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Dynamic dV/dt Rating
250
RDS(on) (Ω)
VGS = 10 V
• Repetitive Avalanche Rated
1.1
RoHS*
Qg (Max.) (nC)
14
• Fast Switching
Qgs (nC)
2.7
• Ease of Paralleling
Qgd (nC)
7.8
• Simple Drive Requirements
Configuration
Available
COMPLIANT
• Lead (Pb)-free Available
Single
D
DESCRIPTION
TO-220
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 W. The low thermal resistance
and low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
G
S
G
D
S
N-Channel MOSFET
ORDERING INFORMATION
Package
TO-220
IRF624PbF
SiHF624-E3
IRF624
SiHF624
Lead (Pb)-free
SnPb
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
250
Gate-Source Voltage
VGS
± 20
VGS at 10 V
Continuous Drain Current
TC = 25 °C
ID
TC = 100 °C
Pulsed Drain Currenta
IDM
Linear Derating Factor
UNIT
V
4.4
2.8
A
14
0.40
W/°C
Single Pulse Avalanche Energyb
EAS
100
mJ
Repetitive Avalanche Currenta
IAR
4.4
A
Repetitive Avalanche Energya
EAR
5.0
mJ
Maximum Power Dissipation
TC = 25 °C
PD
50
W
dV/dt
4.8
V/ns
TJ, Tstg
- 55 to + 150
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque
for 10 s
6-32 or M3 screw
300d
°C
10
lbf · in
1.1
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 50 V, starting TJ = 25 °C, L = 8.3 mH, RG = 25 Ω, IAS = 4.4 A (see fig. 12).
c. ISD ≤ 4.4 A, dI/dt ≤ 90 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91029
S-Pending-Rev. A, 19-Jun-08
WORK-IN-PROGRESS
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1
IRF624, SiHF624
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
62
Case-to-Sink, Flat, Greased Surface
RthCS
0.50
-
Maximum Junction-to-Case (Drain)
RthJC
-
2.5
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
VDS
VGS = 0 V, ID = 250 µA
250
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.36
-
V/°C
VGS(th)
VDS = VGS, ID = 250 µA
2.0
-
4.0
V
Gate-Source Leakage
IGSS
VGS = ± 20 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 250 V, VGS = 0 V
-
-
25
VDS = 200 V, VGS = 0 V, TJ = 125 °C
-
-
250
Gate-Source Threshold Voltage
Drain-Source On-State Resistance
Forward Transconductance
RDS(on)
gfs
ID = 2.6 Ab
VGS = 10 V
VDS = 50 V, ID = 2.6 Ab
µA
-
-
1.1
Ω
1.5
-
-
S
-
260
-
-
77
-
-
15
-
-
-
14
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
-
-
2.7
Gate-Drain Charge
Qgd
-
-
7.8
Turn-On Delay Time
td(on)
-
7.0
-
tr
-
13
-
-
20
-
-
12
-
-
4.5
-
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
td(off)
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
VGS = 10 V
ID = 4.4 A, VDS = 200 V,
see fig. 6 and 13b
VDD = 125 V, ID = 4.4 A,
RG = 18 Ω, RD = 28 Ω, see fig. 10b
tf
LD
LS
Between lead,
6 mm (0.25") from
package and center of
die contact
D
pF
nC
ns
nH
G
-
7.5
-
-
-
4.4
-
-
14
-
-
1.8
V
-
200
400
ns
-
0.93
1.9
µC
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
S
TJ = 25 °C, IS = 4.4 A, VGS = 0 Vb
TJ = 25 °C, IF = 4.4 A, dI/dt = 100 A/µsb
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
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Document Number: 91029
S-Pending-Rev. A, 19-Jun-08
IRF624, SiHF624
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
100
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
101
Top
4.5 V
10-1
ID, Drain Current (A)
ID, Drain Current (A)
101
150 °C
100
25 °C
10-1
20 µs Pulse Width
TC = 25 °C
100
10-1
101
4
VDS, Drain-to-Source Voltage (V)
91029_01
20 µs Pulse Width
VDS = 50 V
ID, Drain Current (A)
100
4.5 V
10-1
10-1
91029_02
20 µs Pulse Width
TC = 150 °C
100
101
VDS, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Document Number: 91029
S-Pending-Rev. A, 19-Jun-08
7
8
9
10
Fig. 3 - Typical Transfer Characteristics
RDS(on), Drain-to-Source On Resistance
(Normalized)
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
Top
6
VGS, Gate-to-Source Voltage (V)
91029_03
Fig. 1 - Typical Output Characteristics, TC = 25 °C
101
5
91029_04
3.0
2.5
ID = 4.4 A
VGS = 10 V
2.0
1.5
1.0
0.5
0.0
- 60 - 40 - 20 0
20 40 60 80 100 120 140 160
TJ, Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRF624, SiHF624
600
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
Coss = Cds + Cgd
Capacitance (pF)
500
400
Ciss
300
200
Coss
100
Crss
ISD, Reverse Drain Current (A)
Vishay Siliconix
0
100
102
16
VDS = 125 V
VDS = 50 V
8
4
For test circuit
see figure 13
0
91029_06
4
6
8
10
12
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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1.4
2
10 µs
100 µs
5
2
1 ms
1
10 ms
5
TC = 25 °C
TJ = 150 °C
Single Pulse
2
14
QG, Total Gate Charge (nC)
1.2
1.0
10
0.1
2
0.8
Operation in this area limited
by RDS(on)
5
VDS = 200 V
0
0.6
VSD, Source-to-Drain Voltage (V)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
ID, Drain Current (A)
VGS, Gate-to-Source Voltage (V)
VGS = 0 V
91029_07
ID = 4.4 A
12
25 °C
0.4
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
20
150 °C
100
101
VDS, Drain-to-Source Voltage (V)
91029_05
101
0.1
91029_08
2
5
1
2
5
10
2
5
102
2
5
103
VDS, Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
Document Number: 91029
S-Pending-Rev. A, 19-Jun-08
IRF624, SiHF624
Vishay Siliconix
RD
VDS
VGS
4.0
ID, Drain Current (A)
D.U.T.
RG
5.0
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
3.0
Fig. 10a - Switching Time Test Circuit
2.0
VDS
1.0
90 %
0.0
25
50
75
100
125
150
10 %
VGS
TC, Case Temperature (°C)
91029_09
td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
Thermal Response (ZthJC)
10
1
0 − 0.5
0.2
PDM
0.1
0.1
0.05
0.02
0.01
t1
Single Pulse
(Thermal Response)
t2
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
10-2
10-5
10-4
10-3
10-2
0.1
1
10
t1, Rectangular Pulse Duration (s)
91029_11
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L
Vary tp to obtain
required IAS
VDS
VDS
tp
VDD
D.U.T
RG
+
-
IAS
V DD
A
VDS
10 V
tp
0.01 Ω
Fig. 12a - Unclamped Inductive Test Circuit
Document Number: 91029
S-Pending-Rev. A, 19-Jun-08
IAS
Fig. 12b - Unclamped Inductive Waveforms
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IRF624, SiHF624
Vishay Siliconix
EAS, Single Pulse Energy (mJ)
240
ID
2.0 A
2.8 A
Bottom 4.4 A
Top
200
160
120
80
40
0
VDD = 50 V
25
91029_12c
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
Document Number: 91029
S-Pending-Rev. A, 19-Jun-08
IRF624, SiHF624
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
Circuit layout considerations
• Low stray inductance
• Ground plane
+
-
-
+
RG
+
• dV/dt controlled by RG
• ISD controlled by duty factor
Driver gate drive
P.W.
Period
D=
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
VDD
Body diode forward drop
Inductor current
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level and 3 V drive devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?91029.
Document Number: 91029
S-Pending-Rev. A, 19-Jun-08
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Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
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applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
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Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
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