ONSEMI 2N6405

2N6400 Series
Preferred Device
Silicon Controlled Rectifiers
Reverse Blocking Thyristors
Designed primarily for half-wave ac control applications, such as
motor controls, heating controls and power supplies; or wherever
half–wave silicon gate–controlled, solid–state devices are needed.
• Glass Passivated Junctions with Center Gate Geometry for Greater
Parameter Uniformity and Stability
• Small, Rugged, Thermowatt Construction for Low Thermal
Resistance, High Heat Dissipation and Durability
• Blocking Voltage to 800 Volts
• Device Marking: Logo, Device Type, e.g., 2N6400, Date Code
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SCRs
16 AMPERES RMS
50 thru 800 VOLTS
G
A
*MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
K
Rating
Symbol
Peak Repetitive Off–State Voltage (Note 1.)
(TJ = 40 to 125°C, Sine Wave
50 to 60 Hz; Gate Open)
2N6400
2N6401
2N6402
2N6403
2N6404
2N6405
VDRM,
VRRM
On-State RMS Current
(180° Conduction Angles; TC = 100°C)
IT(RMS)
Average On-State Current
(180° Conduction Angles; TC = 100°C)
IT(AV)
10
A
Peak Non-repetitive Surge Current
(1/2 Cycle, Sine Wave 60 Hz, TJ = 90°C)
ITSM
160
A
I2 t
145
A2s
1
Cathode
PGM
20
Watts
2
Anode
3
Gate
4
Anode
Circuit Fusing (t = 8.3 ms)
Forward Peak Gate Power
(Pulse Width ≤ 1.0 µs, TC = 100°C)
Forward Average Gate Power
(t = 8.3 ms, TC = 100°C)
Value
Unit
Volts
MARKING
DIAGRAM
50
100
200
400
600
800
4
TO–220AB
CASE 221A
STYLE 3
16
YY WW
640x
A
1
2
x
= 0, 1, 2, 3, 4 or 5
YY = Year
WW = Work Week
3
PIN ASSIGNMENT
PG(AV)
0.5
Watts
Forward Peak Gate Current
(Pulse Width ≤ 1.0 µs, TC = 100°C)
IGM
2.0
A
Operating Junction Temperature Range
TJ
–40 to
+125
°C
Storage Temperature Range
Tstg
–40 to
+150
°C
*Indicates JEDEC Registered Data.
1. VDRM and VRRM for all types can be applied on a continuous basis. Ratings
apply for zero or negative gate voltage; however, positive gate voltage shall
not be applied concurrent with negative potential on the anode. Blocking
voltages shall not be tested with a constant current source such that the
voltage ratings of the devices are exceeded.
ORDERING INFORMATION
Device
Package
Shipping
2N6400
TO220AB
500/Box
2N6401
TO220AB
500/Box
2N6402
TO220AB
500/Box
2N6403
TO220AB
500/Box
2N6404
TO220AB
500/Box
2N6405
TO220AB
500/Box
Preferred devices are recommended choices for future use
and best overall value.
 Semiconductor Components Industries, LLC, 2001
April, 2001 – Rev. 2
1
Publication Order Number:
2N6400/D
2N6400 Series
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction to Case
Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds
Symbol
Max
Unit
RθJC
1.5
°C/W
TL
260
°C
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
–
–
–
–
10
2.0
µA
mA
OFF CHARACTERISTICS
*Peak Repetitive Forward or Reverse Blocking Current
(VAK = Rated VDRM or VRRM, Gate Open)
TJ = 25°C
TJ = 125°C
IDRM, IRRM
ON CHARACTERISTICS
*Peak Forward On–State Voltage
(ITM = 32 A Peak, Pulse Width ≤ 1 ms, Duty Cycle ≤ 2%)
VTM
–
–
1.7
Volts
*Gate Trigger Current (Continuous dc)
(VD = 12 Vdc, RL = 100 Ohms)
IGT
–
–
9.0
–
30
60
mA
–
–
0.7
–
1.5
2.5
0.2
–
–
–
18
40
–
–
60
–
1.0
–
–
–
15
35
–
–
–
50
–
*Gate Trigger Voltage (Continuous dc)
(VD = 12 Vdc, RL = 100 Ohms)
Gate Non–Trigger Voltage
(VD = 12 Vdc, RL = 100 Ohms)
*Holding Current
(VD = 12 Vdc, Initiating Current = 200 mA,
Gate Open)
TC = 25°C
TC = –40°C
VGT
TC = 25°C
TC = –40°C
VGD
TC = +125°C
TC = 25°C
IH
*TC = –40°C
Turn-On Time
(ITM = 16 A, IGT = 40 mAdc, VD = Rated VDRM)
Turn-Off Time
(ITM = 16 A, IR = 16 A, VD = Rated VDRM)
Volts
tgt
Volts
µs
µs
tq
TC = 25°C
TJ = +125°C
mA
DYNAMIC CHARACTERISTICS
Critical Rate–of–Rise of Off-State Voltage
(VD = Rated VDRM, Exponential Waveform)
dv/dt
TJ = +125°C
*Indicates JEDEC Registered Data.
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2
V/µs
2N6400 Series
Voltage Current Characteristic of SCR
+ Current
Symbol
Parameter
VDRM
Peak Repetitive Off State Forward Voltage
IDRM
Peak Forward Blocking Current
VRRM
Peak Repetitive Off State Reverse Voltage
IRRM
Peak Reverse Blocking Current
VTM
Peak On State Voltage
IH
Holding Current
Anode +
VTM
on state
IH
IRRM at VRRM
Reverse Blocking Region
(off state)
Reverse Avalanche Region
+ Voltage
IDRM at VDRM
Forward Blocking Region
(off state)
Anode –
16
124
P(AV) , AVERAGE POWER (WATTS)
TC, MAXIMUM CASE TEMPERATURE (° C)
128
α
120
α = CONDUCTION ANGLE
116
112
dc
108
104
100
α = 30°
0
60°
90°
180°
120°
7.0
5.0 6.0
1.0 2.0
3.0 4.0
8.0 9.0
IT(AV), AVERAGE ONSTATE FORWARD CURRENT (AMPS)
180°
14
TJ ≈ 125°C
12
Figure 1. Average Current Derating
120°
dc
60°
10
α = 30°
8.0
6.0
4.0
α
α = CONDUCTION ANGLE
2.0
10
90°
0
5.0
6.0
1.0
2.0
3.0 4.0
7.0
8.0 9.0
IT(AV), AVERAGE ONSTATE FORWARD CURRENT (AMPS)
0
10
Figure 2. Maximum On–State Power Dissipation
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3
2N6400 Series
200
100
50
30
20
TJ = 25°C
10
125°C
7.0
5.0
160
3.0
2.0
150
140
1.0
0.7
130
0.5
0.4
0.8 1.2
1.6
2.0
2.4 2.8
4.0
3.2
3.6
vTM, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS)
110
4.4
SURGE IS PRECEDED AND
FOLLOWED BY RATED CURRENT
1.0
2.0
3.0
4.0
6.0
8.0
10
NUMBER OF CYCLES
Figure 3. On–State Characteristics
r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED)
TJ = 125°C
f = 60 Hz
120
0.3
0.2
1 CYCLE
I TSM , PEAK SURGE CURRENT (AMP)
iTM , INSTANTANEOUS ON-STATE FORWARD CURRENT (AMPS)
70
Figure 4. Maximum Non–Repetitive Surge Current
1.0
0.7
0.5
0.3
0.2
ZθJC(t) = RθJC • r(t)
0.1
0.07
0.05
0.03
0.02
0.01
0.1
0.2 0.3
0.5
1.0
2.0 3.0
5.0
10
20 30
50
t, TIME (ms)
100
Figure 5. Thermal Response
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4
200 300
500
1.0 k
2.0 k 3.0 k 5.0 k
10 k
2N6400 Series
TYPICAL CHARACTERISTICS
30
20
TJ = -40°C
10
7.0
5.0
25°C
3.0
2.0
125°C
1.0
0.2
0.5
1.0
2.0
5.0 10
20
PULSE WIDTH (ms)
50
100
100
I GT, GATE TRIGGER CURRENT (mA)
OFFSTATE VOLTAGE = 12 V
RL = 50 i GT, PEAK GATE CURRENT (mA)
100
70
50
10
1
-40 -25
200
5
20
35
50 65
80
TJ, JUNCTION TEMPERATURE (°C)
95
110 125
Figure 7. Typical Gate Trigger Current
versus Junction Temperature
Figure 6. Typical Gate Trigger Current
versus Pulse Width
1.0
100
0.9
IH , HOLDING CURRENT (mA)
VGT, GATE TRIGGER VOLTAGE (VOLTS)
-10
0.8
0.7
0.6
0.5
0.4
10
0.3
0.2
-40 -25 -10
5
20
35
50
65
80
95
110
1
-40 -25 -10
125
5
20
35
50
65
80
95
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 8. Typical Gate Trigger Voltage
versus Junction Temperature
Figure 9. Typical Holding Current
versus Junction Temperature
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5
110 125
2N6400 Series
PACKAGE DIMENSIONS
TO–220AB
CASE 221A–07
ISSUE AA
–T–
B
F
T
SEATING
PLANE
C
S
4
Q
A
1 2 3
U
H
K
Z
R
L
V
J
G
D
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.147
0.095
0.105
0.110
0.155
0.014
0.022
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.045
0.055
0.235
0.255
0.000
0.050
0.045
----0.080
STYLE 3:
PIN 1.
2.
3.
4.
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6
CATHODE
ANODE
GATE
ANODE
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.64
0.88
3.61
3.73
2.42
2.66
2.80
3.93
0.36
0.55
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
1.15
1.39
5.97
6.47
0.00
1.27
1.15
----2.04
2N6400 Series
Notes
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7
2N6400 Series
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
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2N6400/D