IRFHM8330PbF VDSS 30 V VGS max RDS(on) max (@ VGS = 10V) (@ VGS = 4.5V) ±20 V Qg (typical) ID (@TC (Bottom) = 25°C) 9.3 6.6 HEXFET® Power MOSFET m 9.9 S S G D nC 25 S D D A D D PQFN 3.3X3.3 mm Applications Charge and Discharge Switch for Notebook PC Battery Application System/Load Switch Control MOSFET for synchronous buck converter Features Low Thermal Resistance to PCB (<3.8°C/W) Low Profile (<1.2mm) Industry-Standard Pinout Compatible with Existing Surface Mount Techniques RoHS Compliant, Halogen-Free MSL1, Consumer Qualification Base part number Package Type IRFHM8330PbF PQFN 3.3 mm x 3.3 mm Benefits Enable better Thermal Dissipation Increased Power Density results in Multi-Vendor Compatibility Easier Manufacturing Environmentally Friendlier Increased Reliability Standard Pack Form Quantity Tape and Reel 4000 Orderable Part Number IRFHM8330TRPbF Absolute Maximum Ratings Parameter Max. Units VGS Gate-to-Source Voltage ± 20 V ID @ TA = 25°C Continuous Drain Current, VGS @ 10V 16 A ID @ TA = 70°C Continuous Drain Current, VGS @ 10V 13 ID @ TC(Bottom) = 25°C Continuous Drain Current, VGS @ 10V 55 ID @ TC(Bottom) = 100°C Continuous Drain Current, VGS @ 10V 35 ID @ TC = 25°C 25 IDM Continuous Drain Current, VGS @ 10V (Source Bonding Technology Limited) Pulsed Drain Current PD @TA = 25°C Power Dissipation 2.7 PD @TC(Bottom) = 25°C Power Dissipation 33 210 W Linear Derating Factor 0.021 W/°C TJ Operating Junction and -55 to + 150 °C TSTG Storage Temperature Range Notes through are on page 10 1 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback June 30, 2014 IRFHM8330PbF Static @ TJ = 25°C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage BVDSS Breakdown Voltage Temp. Coefficient BVDSS/TJ RDS(on) Static Drain-to-Source On-Resistance VGS(th) VGS(th) IDSS Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Output Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance gfs Qg Qg Qgs1 Qgs2 Qgd Qgodr Qsw Qoss RG td(on) tr td(off) tf Ciss Coss Crss Min. 30 ––– ––– ––– 1.35 ––– ––– ––– ––– ––– 61 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 23 5.3 7.7 1.8 -6.3 ––– ––– ––– ––– ––– 20 9.3 2.7 1.6 2.5 2.5 4.1 7.1 1.8 9.2 15 10 5.7 1450 250 110 Max. ––– ––– 6.6 9.9 2.35 ––– 1.0 150 100 -100 ––– ––– 14 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Units Conditions V VGS = 0V, ID = 250µA mV/°C Reference to 25°C, ID = 1.0mA m VGS = 10V, ID = 20A VGS = 4.5V, ID = 16A V V = VGS, ID = 25µA mV/°C DS µA VDS = 24V, VGS = 0V VDS = 24V, VGS = 0V, TJ = 125°C nA VGS = 20V VGS = -20V S VDS = 10V, ID = 20A nC VGS = 10V, VDS = 15V, ID = 20A nC nC VDS = 15V VGS = 4.5V ID = 20A VDS = 16V, VGS = 0V ns VDD = 15V, VGS = 4.5V ID = 20A RG=1.8 pF VGS = 0V VDS = 25V ƒ = 1.0MHz Avalanche Characteristics Parameter Single Pulse Avalanche Energy EAS Diode Characteristics Parameter Continuous Source Current IS (Body Diode) Pulsed Source Current ISM (Body Diode) VSD Diode Forward Voltage Reverse Recovery Time trr Qrr Reverse Recovery Charge Typ. ––– Max. 42 Units mJ Min. Typ. Max. Units ––– ––– ––– ––– ––– Conditions MOSFET symbol ––– 25 showing the A integral reverse ––– 210 p-n junction diode. ––– 1.0 V TJ = 25°C, IS = 20A, VGS = 0V 14 21 ns TJ = 25°C, IF = 20A, VDD = 15V 23 35 nC di/dt = 390A/µs D G S Thermal Resistance Parameter RJC (Bottom) Junction-to-Case Junction-to-Case RJC (Top) RJA RJA (<10s) 2 Junction-to-Ambient Junction-to-Ambient www.irf.com © 2014 International Rectifier Typ. ––– Max. 3.8 Units ––– 42 °C/W ––– ––– 47 32 Submit Datasheet Feedback June 30, 2014 IRFHM8330PbF 1000 1000 VGS 10V 7.0V 5.0V 4.5V 3.5V 3.0V 2.8V 2.5V 100 BOTTOM TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP 100 10 1 2.5V BOTTOM 10 2.5V 60µs PULSE WIDTH 60µs PULSE WIDTH Tj = 150°C Tj = 25°C 1 0.1 0.1 1 10 100 0.1 1000 100 1000 1.8 RDS(on) , Drain-to-Source On Resistance (Normalized) 1000 ID, Drain-to-Source Current (A) 10 Fig 2. Typical Output Characteristics Fig 1. Typical Output Characteristics T J = 150°C 100 10 T J = 25°C VDS = 15V 60µs PULSE WIDTH 0 1 2 3 4 5 6 7 VGS = 10V 1.6 1.4 1.2 1.0 0.8 8 -60 -40 -20 0 20 40 60 80 100 120 140 160 T J , Junction Temperature (°C) VGS, Gate-to-Source Voltage (V) Fig 4. Normalized On-Resistance vs. Temperature Fig 3. Typical Transfer Characteristics 10000 ID = 20A 0.6 1.0 14.0 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, C ds SHORTED Crss = Cgd VGS, Gate-to-Source Voltage (V) ID= 20A Coss = Cds + Cgd C, Capacitance (pF) 1 V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V) Ciss 1000 Coss Crss 12.0 VDS = 24V VDS = 15V 10.0 VDS = 6.0V 8.0 6.0 4.0 2.0 0.0 100 1 10 0 100 Fig 5. Typical Capacitance vs. Drain-to-Source Voltage www.irf.com © 2014 International Rectifier 5 10 15 20 25 30 QG, Total Gate Charge (nC) VDS , Drain-to-Source Voltage (V) 3 VGS 10V 7.0V 5.0V 4.5V 3.5V 3.0V 2.8V 2.5V Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage Submit Datasheet Feedback June 30, 2014 IRFHM8330PbF 1000 100 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 T J = 150°C T J = 25°C 10 VGS = 0V OPERATION IN THIS AREA LIMITED BY R DS(on) 100µsec 100 1msec 10 Limited by package 10msec 1 DC 0.1 Tc = 25°C Tj = 150°C Single Pulse 0.01 1.0 0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1 1.6 100 VDS, Drain-to-Source Voltage (V) VSD, Source-to-Drain Voltage (V) Fig 8. Maximum Safe Operating Area Fig 7. Typical Source-Drain Diode Forward Voltage 2.6 60 VGS(th) , Gate threshold Voltage (V) Limited By Source Bonding Technology 50 ID, Drain Current (A) 10 40 30 20 10 0 25 50 75 100 125 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 ID = 25µA ID = 250µA ID = 1.0mA ID = 1.0A 0.8 0.6 150 -75 -50 -25 T C , Case Temperature (°C) 0 25 50 75 100 125 150 T J , Temperature ( °C ) Fig 10. Drain-to–Source Breakdown Voltage Fig 9. Maximum Drain Current vs. Case Temperature Thermal Response ( Z thJC ) °C/W 10 D = 0.50 1 0.20 0.10 0.05 0.1 0.02 0.01 0.01 SINGLE PULSE ( THERMAL RESPONSE ) 0.001 1E-006 1E-005 0.0001 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 4 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback June 30, 2014 200 25 EAS , Single Pulse Avalanche Energy (mJ) RDS(on), Drain-to -Source On Resistance (m ) IRFHM8330PbF ID = 20A 20 15 T J = 125°C 10 5 T J = 25°C ID TOP 4.0A 8.5A BOTTOM 20A 150 100 50 0 0 25 0 5 10 15 20 50 75 100 125 150 Starting T J , Junction Temperature (°C) VGS, Gate -to -Source Voltage (V) Fig 13. Maximum Avalanche Energy vs. Drain Current Fig 12. On-Resistance vs. Gate Voltage Avalanche Current (A) 100 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 125°C and Tstart =25°C (Single Pulse) 10 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25°C and Tstart = 125°C. 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Single Avalanche Event: Pulse Current vs. Pulse Width 5 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback June 30, 2014 IRFHM8330PbF Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS tp 15V L VDS D.U.T RG IAS 20V tp DRIVER + V - DD A I AS 0.01 Fig 16a. Unclamped Inductive Test Circuit Fig 16b. Unclamped Inductive Waveforms Fig 17a. Switching Time Test Circuit Fig 17b. Switching Time Waveforms Id Vds Vgs VDD Vgs(th) Qgs1 Qgs2 Fig 18a. Gate Charge Test Circuit 6 www.irf.com © 2014 International Rectifier Qgd Qgodr Fig 18b. Gate Charge Waveform Submit Datasheet Feedback June 30, 2014 IRFHM8330PbF Placement and Layout Guidelines The typical application topology for this product is the synchronous buck converter. These converters operate at high frequencies (typically around 400 kHz). During turn-on and turn-off switching cycles, the high di/dt currents circulating in the parasitic elements of the circuit induce high voltage ringing which may exceed the device rating and lead to undesirable effects. One of the major contributors to the increase in parasitics is the PCB power circuit inductance. This section introduces a simple guideline that mitigates the effect of these parasitics on the performance of the circuit and provides reliable operation of the devices. To reduce high frequency switching noise and the effects of Electromagnetic Interference (EMI) when the control MOSFET (Q1) is turned on, the layout shown in Figure 19 is recommended. The input bypass capacitors, control MOSFET and output capacitors are placed in a tight loop to minimize parasitic inductance which in turn lowers the amplitude of the switch node ringing, and minimizes exposure of the MOSFETs to repetitive avalanche conditions. When the synchronous MOSFET (Q2) is turned on, high average DC current flows through the path indicated in Figure 19. Therefore, the Q2 turn-on path should be laid out with a tight loop and wide traces at both ends of the inductor to minimize loop resistance. Fig 19. Placement and Layout Guidelines 7 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback June 30, 2014 IRFHM8330PbF PQFN 3.3mm x 3.3mm Outline Package Details For more information on board mounting, including footprint and stencil recommendation, please refer to application note AN-1136: http://www.irf.com/technical-info/appnotes/an-1136.pdf For more information on package inspection techniques, please refer to application note AN-1154: http://www.irf.com/technical-info/appnotes/an-1154.pdf PQFN 3.3mm x 3.3mm Outline Part Marking Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 8 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback June 30, 2014 IRFHM8330PbF PQFN 3.3mm x 3.3mm Outline Tape and Reel REEL DIMENSIONS TAPE DIMENSIONS CODE Ao Bo Ko P1 W W1 QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE DIMENSION (MM) MIN MAX 3.50 3.70 3.50 1.10 7.90 11.80 3.70 1.30 8.10 12.20 12.30 12.50 Qty Reel Diameter CODE Ao Bo Ko W P1 DIMENSION (INCH) MIN MAX .138 .146 .138 .043 .311 .465 .146 .051 .319 .480 .484 .492 4000 13 Inches DESCRIPTION Dimension design to accommodate the component width Dimension design to accommodate the component lenght Dimension design to accommodate the component thickness Overall width of the carrier tape Pitch between successive cavity centers Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 9 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback June 30, 2014 IRFHM8330PbF Qualification Information† Consumer (per JEDEC JESD47F†† guidelines) Qualification Level MSL1 (per JEDEC J-STD-020D††) PQFN 3.3mm x 3.3mm Moisture Sensitivity Level Yes RoHS Compliant † †† Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability Applicable version of JEDEC standard at the time of product release. Notes: Starting TJ = 25°C, L = 0.21mH, RG = 50, IAS = 20A. Pulse width 400µs; duty cycle 2%. R is measured at TJ of approximately 90°C. When mounted on 1 inch square PCB (FR-4). Please refer to AN-994 for more details: http://www.irf.com/technical-info/appnotes/an-994.pdf Calculated continuous current based on maximum allowable junction temperature. Current is limited to 25A by source bonding technology. Pulse drain current is limited by source bonding technology. Revision History Date Comments 6/6/14 Updated schematic on page 1 Updated tape and reel on page 9 6/30/14 Remove “SAWN” package outline on page 8. IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA To contact International Rectifier, please visit http://www.irf.com/whoto-call/ 10 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback June 30, 2014