AOSMD AOB416 100v n-channel mosfet Datasheet

AOB416
100V N-Channel MOSFET
SDMOS TM
General Description
Product Summary
The AOB416 is fabricated with SDMOSTM trench
technology that combines excellent RDS(ON) with low gate
charge.The result is outstanding efficiency with controlled
switching behavior. This universal technology is well suited
for PWM, load switching and general purpose
applications.
VDS
100V
45A
ID (at VGS=10V)
RDS(ON) (at VGS=10V)
< 36mΩ
RDS(ON) (at VGS = 7V)
< 43mΩ
100% UIS Tested
100% Rg Tested
TO-263
D2PAK
Top View
D
Bottom View
D
G
G
S
S
S
G
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
TC=25°C
Continuous Drain
Current
Pulsed Drain Current
Avalanche Current
C
Avalanche energy L=0.1mH
C
TC=25°C
Power Dissipation B
TA=25°C
Power Dissipation
A
Junction and Storage Temperature Range
A
5.0
IAS, IAR
28
A
EAS, EAR
39
mJ
150
W
75
2.5
PDSM
TA=70°C
A
6.2
PD
TC=100°C
V
120
IDSM
TA=70°C
±25
32
IDM
TA=25°C
Continuous Drain
Current
Units
V
45
ID
TC=100°C
C
Maximum
100
W
1.6
TJ, TSTG
-55 to 175
°C
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient
Maximum Junction-to-Ambient
Maximum Junction-to-Case
Rev 0: April 2009
A
AD
Symbol
t ≤ 10s
RθJA
Steady-State
Typ
11
Max
14
Units
°C/W
40
50
°C/W
RθJC
0.7
1
°C/W
Steady-State
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Page 1 of 7
AOB416
Electrical Characteristics (T J=25°C unless otherwise noted)
Parameter
Symbol
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
IDSS
Zero Gate Voltage Drain Current
Conditions
Min
ID=250µA, VGS=0V
VDS=100V, VGS=0V
100
50
Gate-Body leakage current
VDS=0V, VGS= ±25V
VGS(th)
ID(ON)
Gate Threshold Voltage
On state drain current
VDS=VGS ID=250µA
2.8
VGS=10V, VDS=5V
130
VGS=10V, ID=20A
TJ=125°C
VGS=7V, ID=15A
gFS
Forward Transconductance
VSD
Diode Forward Voltage
IS=1A,VGS=0V
Maximum Body-Diode Continuous Current
IS
VDS=5V, ID=20A
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
SWITCHING PARAMETERS
Qg
Total Gate Charge
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
VGS=0V, VDS=50V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
VGS=10V, VDS=50V, ID=20A
Units
V
TJ=55°C
Static Drain-Source On-Resistance
Max
10
IGSS
RDS(ON)
Typ
µA
100
nA
3.4
4
V
30
36
54
65
34
43
mΩ
1
V
100
A
A
28
0.68
mΩ
S
950
1180
1450
pF
77
110
145
pF
21
36
50
pF
0.4
0.8
1.2
Ω
16
20
24
nC
5.5
7
8.5
nC
3.5
6.3
9
nC
10
VGS=10V, VDS=50V, RL=2.5Ω,
RGEN=3Ω
ns
7
ns
15
ns
tf
Turn-Off Fall Time
trr
Body Diode Reverse Recovery Time
IF=20A, dI/dt=500A/µs
13
19
25
Qrr
Body Diode Reverse Recovery Charge IF=20A, dI/dt=500A/µs
50
70
90
7
ns
ns
nC
2
A. The value of RθJΑ is measured with the device mounted on 1in FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on
the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep initial
TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300ms pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating.
G. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev 0: April 2009
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Page 2 of 7
AOB416
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
60
60
10V
VDS=5V
8V
50
40
7V
ID(A)
ID (A)
40
30
20
20
6V
125°C
10
25°C
VGS=5V
0
0
0
1
2
3
4
5
3
4
50
6
7
8
9
Normalized On-Resistance
2.2
45
RDS(ON) (mΩ)
5
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
40
VGS=7V
35
30
VGS=10V
25
2
VGS=10V
ID=20A
1.8
1.6
1.4
1.2
VGS=7V
ID=15A
1
0.8
20
0
5
10
0
15
20
25
30
35
40
ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)
25
50
75
100
125
150
175
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
70
1.0E+02
ID=20A
1.0E+01
60
40
50
125°C
IS (A)
RDS(ON) (mΩ)
1.0E+00
40
125°C
1.0E-01
1.0E-02
25°C
1.0E-03
30
1.0E-04
25°C
20
6
7
8
9
1.0E-05
10
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev 0: April 2009
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0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
Page 3 of 7
AOB416
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
1600
10
Ciss
1200
Capacitance (pF)
VGS (Volts)
1400
VDS=50V
ID=20A
8
6
4
1000
800
600
400
2
Crss
Coss
200
0
0
0
5
10
15
Qg (nC)
Figure 7: Gate-Charge Characteristics
0
20
10µs
RDS(ON)
limited
100µs
1ms
10ms
DC
1.0
0.1
0.0
0.01
TJ(Max)=175°C
TC=25°C
0.1
1
10
VDS (Volts)
100
1000
1000
100
0.00001
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
0.001
0.1
10
Pulse Width (s)
Figure 11: Single Pulse Power Rating Junction-toCase (Note F)
Figure 10: Maximum Forward Biased
Safe Operating Area (Note F)
ZθJC Normalized Transient
Thermal Resistance
100
TJ(Max)=175°C
TC=25°C
Power (W)
ID (Amps)
100.0
10
40
60
80
VDS (Volts)
Figure 8: Capacitance Characteristics
10000
1000.0
10.0
20
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJC=1°C/W
1
0.1
PD
Single Pulse
0.01
0.00001
0.0001
0.001
Ton
0.01
T
0.1
1
10
Pulse Width (s)
Figure 12: Normalized Maximum Transient Thermal Impedance (Note F)
Rev 0: April 2009
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Page 4 of 7
AOB416
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
100
Power Dissipation (W)
IAR (A) Peak Avalanche Current
180
TA=25°C
TA=25°C
A=100°C
TTA=100°C
TA=150°C
TA=125°C
TA=150°C
150
120
90
60
30
TA=125°C
10
0.000001
0
0
60
50
50
40
40
30
25
50
75
100
125
150
175
TCASE (°C)
Figure 13: Power De-rating (Note F)
Power (W)
Current rating ID(A)
0.00001
0.0001
Time in avalanche, tA (s)
Figure 9: Single Pulse Avalanche capability (Note
C)
30
20
20
10
TA=25°C
10
0
0.01
0
0
25
50
75
100
125
150
175
ZθJA Normalized Transient
Thermal Resistance
1
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
RθJA=45°C/W
1
10
100
1000
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction-toAmbient (Note H)
TCASE (°C)
Figure 14: Current De-rating (Note F)
10
0.1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0.1
0.01
0.001
0.00001
PD
Single Pulse
Ton
0.0001
0.001
0.01
0.1
1
T
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Rev 0: February 2009
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Page 5 of 7
AOB416
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
16
125ºC
Irm
30
20
15
Qrr
60
20
25ºC
0
8
5
4
5
10
15
20
25
0.5
25
25
20
20
25ºC
15
Qrr
60
125ºC
30
Irm
0
0
200
400
600
800
125ºC
30
Is=20A
2
trr
25ºC
10
1.5
5
5
0
1000
0
1
S
125º
0.5
25ºC
0
di/dt (A/µs)
Figure 15: Diode Reverse Recovery Charge and
Peak Current vs. di/dt
Rev 0: April 2009
0
25
15
10
25ºC
20
S
90
15
2.5
trr (ns)
125ºC
10
30
Irm (A)
Qrr (nC)
120
5
IS (A)
Figure 14: Diode Reverse Recovery Time and
Softness Factor vs. Conduction Current
30
Is=20A
125ºC
25ºC
IS (A)
Figure 13: Diode Reverse Recovery Charge and
Peak Current vs. Conduction Current
150
1
S
0
30
2
1.5
0
0
0
25ºC
trr
12
10
2.5
S
25ºC
90
25
3
125ºC
di/dt=800A/µs
trr (ns)
125ºC
di/dt=800A/µs
120
Qrr (nC)
24
30
Irm (A)
150
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200
400
600
800
0
1000
di/dt (A/µs)
Figure 16: Diode Reverse Recovery Time and
Softness Factor vs. di/dt
Page 6 of 7
AOB416
Gate Charge Test Circuit & W aveform
Vgs
Qg
10V
+
+ Vds
VDC
-
VDC
DUT
Qgs
Qgd
-
Vgs
Ig
Charge
Resistive Switching Test Circuit & W aveforms
RL
Vds
Vds
Vgs
90%
+ Vdd
DUT
VDC
Rg
-
10%
Vgs
Vgs
t d(on)
tr
t d(off)
ton
tf
toff
Unclamped Inductive Switching (UIS) Test Circuit & W aveforms
L
2
E AR = 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
VDC
Rg
-
I AR
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vds -
Isd
Vgs
Ig
Rev 0: April 2009
Vgs
Isd
L
+ Vdd
VDC
-
IF
t rr
dI/dt
I RM
Vdd
Vds
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Page 7 of 7
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