TI1 LM3409N/NOPB Pfet buck controller for high power led driver Datasheet

LM3409, LM3409HV, LM3409-Q1
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SNVS602J – MARCH 2009 – REVISED MAY 2013
PFET Buck Controller for High Power LED Drivers
Check for Samples: LM3409, LM3409HV, LM3409-Q1
FEATURES
DESCRIPTION
•
The LM3409/09N/09HV/09Q/09QHV are P-channel
MosFET (PFET) controllers for step-down (buck)
current regulators. They offer wide input voltage
range, high-side differential current sense with low
adjustable threshold voltage and fast output
enable/disable function and a thermally enhanced
VSSOP-10 package. These features combine to
make the LM3409 family of devices ideal for use as
constant current sources for driving LEDs where
forward currents up to 5A are easily achievable.
1
2
•
•
•
•
•
•
•
•
•
•
•
•
LM3409Q/LM3409QHV is an Automotive Grade
Product That is AEC-Q100 Grade 1 Qualified
2Ω, 1A Peak MosFET Gate Drive
VIN Range: 6V to 42V
(LM3409/LM3409Q/LM3409N)
VIN Range: 6V to 75V (LM3409HV/LM3409QHV)
Differential, High-side Current Sense
Cycle-by-Cycle Current Limit
No Control Loop Compensation Required
10,000:1 PWM Dimming Range
250:1 Analog Dimming Range
Supports All-Ceramic Output Capacitors and
Capacitor-less Outputs
Low Power Shutdown and Thermal Shutdown
Thermally Enhanced VSSOP-10 Package
Dual Inline Package (LM3409N)
APPLICATIONS
•
•
•
•
LED Driver
Constant Current Source
Automotive Lighting
General Illumination
The LM3409 devices use Constant Off-Time (COFT)
control to regulate an accurate constant current
without the need for external control loop
compensation. Analog and PWM dimming are easy to
implement and result in a highly linear dimming range
with
excellent
achievable
contrast
ratios.
Programmable UVLO, low-power shutdown, and
thermal shutdown complete the feature set.
The LM3409/09Q/09N have an operational input
voltage range up to 42V, while the LM3409HV/QHV
are high voltage options with an input voltage range
up to 75V. The LM3409/09HV/09Q/09QHV come in a
thermally enhanced 10-lead VSSOP package, while
the LM3409N comes in a 14-lead PDIP package. The
LM3409Q/LM3409QHV
are
automotive
grade
products that are AEC-Q100 grade 1 qualified.
Typical Application
RUV2
RUV1
1
VIN
UVLO
10
VIN
CF
2
3
ROFF
VCC
IADJ
EN
LM3409/HV
CSP
CIN
9
8
RSNS
4
COFF
COFF
CSN
7
DAP
5
GND
PGATE
6
Q1
L1
VO
D1
ILED
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2013, Texas Instruments Incorporated
LM3409, LM3409HV, LM3409-Q1
SNVS602J – MARCH 2009 – REVISED MAY 2013
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Connection Diagram
LM3409/09Q/09HV/09QHV
1
2
3
4
5
UVLO
VIN
IADJ
VCC
EN
DAP
COFF
GND
CSP
CSN
PGATE
LM3409N
10
1
9
2
8
3
7
4
6
5
6
7
Figure 1. 10-Lead VSSOP Package
UVLO
VIN
NC
NC
IADJ
VCC
EN
CSP
COFF
CSN
GND
NC
PGATE
NC
14
13
12
11
10
9
8
Figure 2. 14-Lead PDIP Package
PIN DESCRIPTIONS
Pins
Name
Description
1
UVLO
Input under-voltage lockout
Connect to a resistor divider from VIN and GND. Turn-on
threshold is 1.24V and hysteresis for turn-off is provided by a
22µA current source.
3
2
IADJ
Analog LED current adjust
Apply a voltage between 0 - 1.24V, connect a resistor to GND, or
leave open to set the current sense threshold voltage.
4
3
EN
Logic level enable /
PWM dimming
Apply a voltage >1.74V to enable device, a PWM signal to dim, or
a voltage <0.5V for low power shutdown.
5
4
COFF
Off-time programming
6
5
GND
Ground
9
6
PGATE
Gate drive
10
7
CSN
Negative current sense
Connect to negative side of sense resistor.
11
8
CSP
Positive current sense
Connect to positive side of sense resistor (also to VIN).
12
9
VCC
VIN- referenced
linear regulator output
Connect at least a 1µF ceramic capacitor to VIN. The regulator
provides power for the PFET drive.
PDIP
VSSOP
1
14
10
VIN
Input voltage
DAP
DAP
Thermal pad on bottom of IC
Application Information
Connect resistor from VO, capacitor to GND to set off-time.
Connect to system ground.
Connect to gate of external PFET.
Connect to the input voltage.
Connect to GND pin. Place 4-6 vias from DAP to GND plane.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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Absolute Maximum RatingsLM3409/09N/09Q/09HV/09QHV
(1) (2)
VIN, EN, UVLO to GND
-0.3V to 45V
(76V LM3409HV/09QHV)
VIN to VCC, PGATE
-0.3V to 7V
VIN to PGATE
-2.8V for 100ns
9.5V for 100ns
VIN to CSP, CSN
-0.3V to 0.3V
COFF to GND
-0.3V to 4V
COFF current
±1 mA continuous
IADJ Current
±5 mA continuous
Junction Temperature
150°C
Storage Temperature Range
ESD Rating
-65°C to 125°C
(3)
LM3409/09N/09HV
1 kV
LM3409Q/09QHV
Soldering Information
(1)
(2)
(3)
2 kV
Lead Temperature (Soldering, 10sec)
260°C
Infrared/Convection Reflow (15sec)
260°C
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Operating Ratings is not implied. The recommended Operating Ratings indicate
conditions at which the device is functional and the device should not be operated beyond such conditions.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin.
Operating Ratings (LM3409/09N/09Q/09HV/09QHV)
(1)
VIN
6V to 42V
(75V LM3409HV/09QHV)
−40°C to +125°C
Junction Temperature Range
(1)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Operating Ratings is not implied. The recommended Operating Ratings indicate
conditions at which the device is functional and the device should not be operated beyond such conditions.
Electrical Characteristics LM3409/09N/09Q/09HV/09QHV
VIN = 24V unless otherwise indicated. Typicals and limits appearing in plain type apply for TA = TJ = +25°C (1). Limits
appearing in boldface type apply over full Operating Temperature Range. Datasheet min/max specification limits are
specified by design, test, or statistical analysis.
Symbol
Parameter
Conditions
Min (2)
Typ (1)
Max (2)
Units
mV
PEAK CURRENT COMPARATOR
VCST
VCSP – VCSN average peak
current threshold (3)
VADJ = 1.0V
188
198
208
VADJ = VADJ-OC
231
246
261
AADJ
VADJ to VCSP – VCSN threshold
gain
0.1 < VADJ < 1.2V
VADJ = VADJ-OC
VADJ-OC
IADJ pin open circuit voltage
IADJ
IADJ pin current
tDEL
CSN pin falling delay
CSN fall - PGATE rise
IIN
Operating current
Not switching
ISD
Shutdown hysteresis current
EN = 0V
0.2
V/V
1.189
1.243
1.297
V
3.8
5
6.4
µA
38
ns
2
mA
110
µA
SYSTEM CURRENTS
PFET DRIVER
(1)
(2)
(3)
Typical values represent most likely parametric norms at the conditions specified and are not ensured.
Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation
using Statistical Quality Control (SQC) methods. Limits are used to calculate Texas Instrument's Average Outgoing Quality Level
(AOQL).
The current sense threshold limits are calculated by averaging the results from the two polarities of the high-side differential amplifier.
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Electrical Characteristics LM3409/09N/09Q/09HV/09QHV (continued)
VIN = 24V unless otherwise indicated. Typicals and limits appearing in plain type apply for TA = TJ = +25°C (1). Limits
appearing in boldface type apply over full Operating Temperature Range. Datasheet min/max specification limits are
specified by design, test, or statistical analysis.
Symbol
RPGATE
Parameter
Driver output resistance
Min (2)
Conditions
Typ (1)
Sourcing 50 mA
2
Sinking 50 mA
2
Max (2)
Units
Ω
VCC REGULATOR
VCC
VIN pin voltage - VCC pin
voltage
VIN > 9V
0 < ICC < 20 mA
VCC-UVLO
VCC under voltage lockout
threshold
VCC increasing
VCC-HYS
VCC UVLO hysteresis
VCC decreasing
ICC-LIM
VCC regulator current limit
5.5
6
6.5
V
3.73
V
283
mV
30
45
mA
1.122
1.243
OFF-TIMER AND ON-TIMER
VOFT
Off-time threshold
tD-OFF
COFF threshold to PGATE
falling delay
25
tON-MIN
Minimum on-time
115
tOFF-MAX
Maximum off-time
300
1.364
V
ns
211
ns
µs
UNDER VOLTAGE LOCKOUT
IUVLO
UVLO pin current
VUVLO-R
Rising UVLO threshold
VUVLO = 1V
IUVLO-HYS
UVLO hysteresis current
10
1.175
1.243
nA
1.311
V
22
µA
ENABLE
IEN
EN pin current
VEN-TH
EN pin threshold
10
VEN rising
nA
1.74
VEN falling
V
.5
VEN-HYS
EN pin hysteresis
420
mV
tEN-R
EN pin rising delay
EN rise - PGATE fall
42
ns
tEN-F
EN pin falling delay
EN fall - PGATE rise
21
ns
50
°C/W
THERMAL RESISTANCE
θJA
Junction to Ambient
VSSOP-10 Package
(4)
PDIP-14 Package
θJC
Junction to Case
VSSOP-10 Package
87
(4)
15
PDIP-14 Package
(4)
4
37
Measured with DAP soldered to a minimum of 2 square inches of 1oz. copper on the top or bottom PCB layer. Actual value will be
different depending upon the application environment.
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Typical Performance Characteristics
TA = +25°C, VIN = 24V, and characteristics are identical for LM3409 and LM3409HV unless otherwise specified.
VCC vs. Junction Temperature
6.125
248
6.100
VCC (V)
VCST (mV)
VCST vs. Junction Temperature
250
246
244
242
-50
6.075
6.050
-14
22
58
94
6.025
-50
130
94
TEMPERATURE (°C)
Figure 4.
1.255
-5.10
1.250
-5.15
1.245
-5.20
1.240
-5.25
1.235
-5.30
22
58
94
130
IADJ vs. Junction Temperature
-5.05
IADJ (#A)
VADJ (V)
58
Figure 3.
VADJ vs. Junction Temperature
-14
22
TEMPERATURE (°C)
1.260
1.230
-50
-14
-5.35
-50
130
-14
22
58
94
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 5.
Figure 6.
VOFT vs. Junction Temperature
130
tON-MIN vs. Junction Temperature
1.26
180
160
tON-MIN (ns)
VOFT (V)
1.25
1.24
140
120
100
1.23
80
1.22
-50
-14
22
58
94
130
60
-50
-14
22
58
94
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 7.
Figure 8.
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Typical Performance Characteristics (continued)
TA = +25°C, VIN = 24V, and characteristics are identical for LM3409 and LM3409HV unless otherwise specified.
LM3409 Efficiency vs. Input Voltage
VO = 10V (3 LEDs); ILED = 2A (1)
LM3409HV Efficiency vs. Input Voltage
VO = 10V (3 LEDs); ILED = 2A (2)
95
95
EFFICIENCY (%)
100
EFFICIENCY (%)
100
90
85
80
90
85
80
75
75
70
0
10
20
30
40
70
0
50
20
300856b3
INPUT VOLTAGE (V)
40
60
80
INPUT VOLTAGE (V)
Figure 9.
Figure 10.
LM3409 LED Current vs. Input Voltage
VO = 17V (5 LEDs) (3)
LM3409HV LED Current vs. Input Voltage
VO = 17V (5 LEDs) (4)
2.40
2.5
2.35
2.4
ILED (A)
ILED (A)
2.30
2.25
2.3
2.2
2.20
2.1
2.15
2.10
20
24
28
32
36
40
2.0
20
44
32
INPUT VOLTAGE (V)
68
80
Normalized Switching Frequency vs. Input Voltage
Amplitude Dimming Using IADJ Pin
VO = 17V (5 LEDs); VIN = 24V
1.7
2.3
1.4
1.8
1 LED
1.0
ILED (A)
NORMALIZED SWITCHING FREQUENCY
Figure 12.
0.7
1.4
0.9
3 LEDs
0.3
0.5
7 LEDs
0.0
0
5 LEDs
14
28
42
56
0.0
0.0
70
0.3
The measurements were
The measurements were
The measurements were
The measurements were
made
made
made
made
using the
using the
using the
using the
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0.5
0.8
1.0
1.3
VADJ (V)
Figure 13.
6
56
Figure 11.
INPUT VOLTAGE (V)
(1)
(2)
(3)
(4)
44
INPUT VOLTAGE (V)
Figure 14.
Bill of Materials
Bill of Materials
Bill of Materials
Bill of Materials
from
from
from
from
Design
Design
Design
Design
#3 except the LM3409 was substituted for the LM3409HV.
#3.
#3 except the LM3409 was substituted for the LM3409HV.
#3.
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Typical Performance Characteristics (continued)
TA = +25°C, VIN = 24V, and characteristics are identical for LM3409 and LM3409HV unless otherwise specified.
2.3
Internal EN Pin PWM Dimming
VO = 17V (5 LEDs); VIN = 24V
External Parallel FET PWM Dimming
VO = 17V (5 LEDs); VIN = 24V
2.3
1.8
1.8
20kHz
100 kHz
1.4
ILED (A)
0.9
0.9
1kHz
50 kHz
0.5
20
40
60
80
0.0
0
100
20
40
60
80
100
DUTY CYCLE (%)
Figure 16.
20kHz 50% EN pin PWM dimming
VO = 42V (12 LEDs); VIN = 48V (5)
100kHz 50% External FET PWM dimming
VO = 42V (12 LEDs); VIN = 48V (5)
14
12
10
8
6
4
2
0
-2
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
-2.0
ILED
VEN
ILED (A)
DUTY CYCLE (%)
Figure 15.
VPWM2 (V)
VEN (V)
0.0
0
0.5
14
12
10
8
6
4
2
0
-2
ILED
VPWM2
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
-2.0
ILED (A)
ILED (A)
1.4
20kHz 50% EN pin PWM dimming (rising edge)
VO = 42V (12 LEDs); VIN = 48V (6)
100kHz 50% External FET PWM dimming (rising edge)
VO = 42V (12 LEDs); VIN = 48V (6)
7
6
5
4
3
2
1
0
-1
VEN
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0.0
-0.4
ILED
7
6
5
4
3
2
1
0
-1
VPWM2
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0.0
-0.4
ILED
ILED (A)
Figure 18.
VPWM2 (V)
Figure 17.
ILED (A)
2 és/DIV
VEN (V)
10 és/DIV
3.5 és
200 ns/DIV
2 és/DIV
Figure 19.
(5)
(6)
Figure 20.
The waveforms were acquired using the standard evaluation board from AN-1953 (SNVA390).
The waveforms were acquired using the standard evaluation board from AN-1953 (SNVA390).
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BLOCK DIAGRAM
VCC
REGULATOR
VIN
VCC
VIN
OFF TIMER
COFF
Complete
COFF
VCC
UVLO
THERMAL
SHUTDOWN
PGATE
Start
VCC
EN
R
CSN
+
LOGIC
CSP
R
22
#A
1.24V
+
UVLO
5 #A
+
-
IADJ
1.24V
GND
5R
Theory of Operation
The LM3409/09HV are P-channel MosFET (PFET) controllers for step-down (buck) current regulators which are
ideal for driving LED loads. They have wide input voltage range allowing for regulation of a variety of LED loads.
The high-side differential current sense, with low adjustable threshold voltage, provides an excellent method for
regulating output current while maintaining high system efficiency. The LM3409/09HV uses a Controlled Off-Time
(COFT) architecture that allows the converter to be operated in both continuous conduction mode (CCM) and
discontinuous conduction mode (DCM) with no external control loop compensation, while providing an inherent
cycle-by-cycle current limit. The adjustable current sense threshold provides the capability to amplitude (analog)
dim the LED current over the full range and the fast output enable/disable function allows for high frequency
PWM dimming using no external components. When designing, the maximum attainable LED current is not
internally limited because the LM3409/09HV is a controller. Instead it is a function of the system operating point,
component choices, and switching frequency allowing the LM3409/09HV to easily provide constant currents up to
5A. This simple controller contains all the features necessary to implement a high efficiency versatile LED driver.
BUCK CURRENT REGULATORS
The buck regulator is unique among non-isolated topologies due to the direct connection of the inductor to the
load during the entire switching cycle. An inductor will control the rate of change of current that flows through it,
therefore a direct connection to the load is excellent for current regulation. A buck current regulator, using the
LM3409/09HV, is shown in the Typical Application section. During the time that the PFET (Q1) is turned on (tON),
the input voltage charges up the inductor (L1). When Q1 is turned off (tOFF), the re-circulating diode (D1)
becomes forward biased and L1 discharges. During both intervals, the current is supplied to the load keeping the
LEDs forward biased. Figure 21 shows the inductor current (iL(t)) waveform for a buck converter operating in
CCM.
8
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The average inductor current (IL) is equal to the average output LED current (ILED), therefore if IL is tightly
controlled, ILED will be well regulated. As the system changes input voltage or output voltage, duty cycle (D) is
varied to regulate IL and ultimately ILED. For any buck regulator, D is simply the conversion ratio divided by the
efficiency (η):
D=
VO
x VIN
(1)
iL (t)
IL-MAX
üiL-
IL
PP
IL-MIN
0
tON = DTS
tOFF = (1-D)TS
t
TS
Figure 21. Ideal CCM Buck Converter Inductor Current iL(t)
CONTROLLED OFF-TIME (COFT) ARCHITECTURE
The COFT architecture is used by the LM3409/09HV to control ILED. It is a combination of peak current detection
and a one-shot off-timer that varies with output voltage. D is indirectly controlled by changes in both tOFF and tON,
which vary depending on the operating point. This creates a variable switching frequency over the entire
operating range. This type of hysteretic control eliminates the need for control loop compensation necessary in
many switching regulators, simplifying the design process and providing fast transient response.
Adjustable Peak Current Control
At the beginning of a switching period, PFET Q1 is turned on and inductor current increases. Once peak current
is detected, Q1 is turned off, the diode D1 forward biases, and inductor current decreases. Figure 22 shows how
peak current detection is accomplished using the differential voltage signal created as current flows through the
current setting resistor (RSNS). The voltage across RSNS (VSNS) is compared to the adjustable current sense
threshold (VCST) and Q1 is turned off when VSNS exceeds VCST, providing that tON is greater than the minimum
possible tON (typically 115ns).
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V IN
LM3409/09HV
R
CSP
+
V CST
+
+
R SNS
-
t ON
ENDS
-
VSNS
CSN
R
IT
PGATE
5V
Q1
L1
IL
LED+
5
#A
IADJ
+
-
+
1.24 V
VADJ
-
R EXT
Optional
D1
LED-
GND
5R
Figure 22. Peak Current Control Circuit
There are three different methods to set the current sense threshold (VCST) using the multi-function IADJ pin:
1. IADJ pin left open: 5µA internal current source biases the Zener diode and clamps the IADJ pin voltage
(VADJ) at 1.24V causing the maximum threshold voltage:
V
V
VCST = ADJ x R = ADJ = 1.24V = 248 mV
5xR
5
5
(2)
2. External voltage (VADJ) of 0V to 1.24V: Apply to the IADJ pin to adjust VCST from 0V to 248mV. If the VADJ
voltage is adjustable, analog dimming can be achieved.
3. External resistor (REXT) placed from IADJ pin to ground: 5µA current source sets the VADJ voltage and
corresponding threshold voltage:
V
5#A x REXT
VCST = ADJ =
= 1#A x REXT
5
5
(3)
Controlled Off-Time
Once Q1 is turned off, it remains off for a constant time (tOFF) which is preset by an external resistor (ROFF), an
external capacitor (COFF), and the output voltage (VO) as shown in Figure 23. Since ILED is tightly regulated, VO
will remain nearly constant over widely varying input voltage and temperature yielding a nearly constant tOFF.
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VO
LM3409/09HV
ROFF
+
tOFF
Control
Logic
-
to
PGATE
Drive
COFF
1.24V
COFF
+
vCOFF
-
Figure 23. Off-Time Control Circuit
At the start of tOFF, the voltage across COFF (vCOFF(t)) is zero and the capacitor begins charging according to the
time constant provided by ROFF and COFF. When vCOFF(t) reaches the off-time threshold (VOFT = 1.24V), then the
off-time is terminated and vCOFF(t) is reset to zero. tOFF is calculated as follows:
·
§
t OFF = - R OFF x (COFF + 20 pF) x ln ¨¨1 - 1.24V¸¸
VO ¹
©
(4)
In reality, there is typically 20 pF parasitic capacitance at the off-timer pin in parallel with COFF, which is
accounted for in the calculation of tOFF. Also, it should be noted that the tOFF equation has a preceding negative
sign because the result of the logarithm should be negative for a properly designed circuit. The resulting tOFF is a
positive value as long as VO > 1.24V. If VO < 1.24V, the off-timer cannot reach VOFT and an internally limited
maximum off-time (typically 300µs) will occur.
vCOFF(t)
VO
dvCOFF
dt
1.24
t
0
tOFF
ROFF x COFF
Figure 24. Exponential Charging Function vCOFF(t)
Although the tOFF equation is non-linear, tOFF is actually very linear in most applications. Ignoring the 20pF
parasitic capacitance at the COFF pin, vCOFF(t) is plotted in Figure 24. The time derivative of vCOFF(t) can be
calculated to find a linear approximation to the tOFF equation:
§
t OFF
·
¸
-¨
VO
dvCOFF (t)
R
xC ¸
e © OFF OFF¹
=
dt
R OFF x COFF
(5)
When tOFF << ROFF x COFF (equivalent to when VO >> 1.24V), the slope of the function is essentially linear and
tOFF can be approximated as a current source charging COFF:
1. 24V x R OFF x COFF
t OFF |
VO
(6)
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Using the actual tOFF equation, the inductor current ripple (ΔiL-PP) of a buck current regulator operating in CCM is:
§ 1. 24V ·
¸
- VO x R OFF x (COFF + 20 pF) x ln ¨¨1 VO ¸¹
©
' iL - PP =
L1
(7)
Using the tOFF approximation, the equation is reduced to:
'iL - PP |
1. 24 x ROFF x COFF
L1
(8)
ΔiL-PP is independent of both VIN and VO when in CCM!
The ΔiL-PP approximation only depends on ROFF, COFF, and L1, therefore the ripple is essentially constant over
the operating range as long as VO >> 1.24V (when the tOFF approximation is valid). An exception to the tOFF
approximation occurs if the IADJ pin is used to analog dim. As the LED/inductor current decreases, the converter
will eventually enter DCM and the ripple will decrease with the peak current threshold. The approximation shows
how the LM3409/09HV achieves constant ripple over a wide operating range, however tOFF should be calculated
using the actual equation first presented.
AVERAGE LED CURRENT
For a buck converter, the average LED current is simply the average inductor current.
vSNS (t)
VCST
0
tON
tOFF
t
Figure 25. Sense Voltage vSNS(t)
Using the COFT architecture, the peak transistor current (IT-MAX) is sensed as shown in Figure 25, which is equal
to the peak inductor current (IL-MAX) given by the following equation:
V
VADJ
IL- MAX = IT - MAX = CST =
RSNS 5 x RSNS
(9)
Because IL-MAX is set using peak current control and ΔiL-PP is set using the controlled off-timer, IL and
correspondingly ILED can be calculated as follows:
ILED = IL = IL - MAX -
V xt
VADJ
'iL - PP
- O OFF
=
5 x RSNS
2 x L1
2
(10)
The threshold voltage VCST seen by the high-side sense comparator is affected by the comparator’s input offset
voltage, which causes an error in the calculation of IL-MAX and ultimately ILED. To mitigate this problem, the
polarity of the comparator inputs is swapped every cycle, which causes the actual IL-MAX to alternate between two
peak values (IL-MAXH and IL-MAXL), equidistant from the theoretical IL-MAX as shown in Figure 26. ILED remains
accurate through this averaging.
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iL(t)
IL-MAX-H
IL-MAX
IL-MAX-L
0
tOFF
0
t
tOFF
Figure 26. Inductor Current iL(t) Showing IL-MAX Offset
INDUCTOR CURRENT RIPPLE
Because the LM3409/09HV swaps the polarity of the differential current sense comparator every cycle, a
minimum inductor current ripple (ΔiL-PP) is necessary to maintain accurate ILED regulation. Referring to Figure 26,
the first tON is terminated at the higher of the two polarity-swapped thresholds (corresponding to IL-MAXH). During
the following tOFF, iL decreases until the second tON begins. If tOFF is too short, then as the second tON begins, iL
will still be above the lower peak current threshold (corresponding to IL-MAXL) and a minimum tON pulse will follow.
This will result in degraded ILED regulation. The minimum inductor current ripple (ΔiL-PP-MIN) should adhere to the
following equation in order to ensure accurate ILED regulation:
24 mV
'iL - PP - MIN >
RSNS
(11)
SWITCHING FREQUENCY
The switching frequency is dependent upon the actual operating point (VIN and VO). VO will remain relatively
constant for a given application, therefore the switching frequency will vary with VIN (frequency increases as VIN
increases). The target switching frequency (fSW) at the nominal operating point is selected based on the tradeoffs
between efficiency (better at low frequency) and solution size/cost (smaller at high frequency). The off-time of the
LM3409/09HV can be programmed for switching frequencies up to 5 MHz (theoretical limit imposed by minimum
tON). In practice, switching frequencies higher than 1MHz may be difficult to obtain due to gate drive limitations,
high input voltage, and thermal considerations.
At CCM operating points, fSW is defined as:
§ V ·
1 - ¨¨ O ¸¸
©K x VIN ¹
1- D
fSW =
=
t OFF
t OFF
(12)
At DCM operating points, fSW is defined as:
fSW =
1
1
=
t ON + tOFF §IL - MAX x L1·
¸¸ + t OFF
¨
© VIN - VO ¹
(13)
In the CCM equation, it is apparent that the efficiency (η) factors into the switching frequency calculation.
Efficiency is hard to estimate and, since switching frequency varies with input voltage, accuracy in setting the
nominal switching frequency is not critical. Therefore, a general rule of thumb for the LM3409/09HV is to assume
an efficiency between 85% and 100%. When approximating efficiency to target a nominal switching frequency,
the following condition must be met:
VO
>
VIN
(14)
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iLED (t)
ILED-MAX
ILED
IDIM-LED
DDIM x TDIM
t
0
tOFF
TDIM
Figure 27. LED Current iLED(t) During EN Pin PWM Dimming
PWM DIMMING USING THE EN PIN
The enable pin (EN) is a TTL compatible input for PWM dimming of the LED. A logic low (below 0.5V) at EN will
disable the internal driver and shut off the current flow to the LED array. While the EN pin is in a logic low state
the support circuitry (driver, bandgap, VCC regulator) remains active in order to minimize the time needed to turn
the LED array back on when the EN pin sees a logic high (above 1.74V).
Figure 27 shows the LED current (iLED(t)) during PWM dimming where duty cycle (DDIM) is the percentage of the
dimming period (TDIM) that the PFET is switching. For the remainder of TDIM, the PFET is disabled. The resulting
dimmed average LED current (IDIM-LED) is:
IDIM- LED = DDIM x ILED
(15)
The LED current rise and fall times (which are limited by the slew rate of the inductor as well as the delay from
activation of the EN pin to the response of the external PFET) limit the achievable TDIM and DDIM. In general,
dimming frequency should be at least one order of magnitude lower than the steady state switching frequency in
order to prevent aliasing. However, for good linear response across the entire dimming range, the dimming
frequency may need to be even lower.
HIGH VOLTAGE NEGATIVE BIAS REGULATOR
The LM3409/09HV contains an internal linear regulator where the steady state VCC pin voltage is typically 6.2V
below the voltage at the VIN pin. The VCC pin should be bypassed to the VIN pin with at least 1µF of ceramic
capacitance connected as close as possible to the IC.
INPUT UNDER-VOLTAGE LOCKOUT (UVLO)
Under-voltage lockout is set with a resistor divider from VIN to GND and is compared against a 1.24V threshold
as shown in Figure 28. Once the input voltage is above the preset UVLO rising threshold (and assuming the part
is enabled), the internal circuitry becomes active and a 22µA current source at the UVLO pin is turned on. This
extra current provides hysteresis to create a lower UVLO falling threshold. The resistor divider is chosen to set
both the UVLO rising and falling thresholds.
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LM3409/09HV
VIN
22 #A
RUV2
+
-
ON/OFF
UVLO
1.24V
RUV1
Figure 28. UVLO Circuit
The turn-on threshold (VTURN-ON) is defined as follows:
VTURN-ON =
1. 24V x (RUV1 + RUV2)
RUV1
(16)
The hysteresis (VHYS) is defined as follows:
VHYS = RUV2 x 22 PA
(17)
LOW POWER SHUTDOWN
The LM3409/09HV can be placed into a low power shutdown (typically 110µA) by grounding the EN terminal
(any voltage below 0.5V) until VCC drops below the VCC UVLO threshold (typically 3.73V). During normal
operation this terminal should be tied to a voltage above 1.74V and below absolute maximum input voltage
rating.
THERMAL SHUTDOWN
Internal thermal shutdown circuitry is provided to protect the IC in the event that the maximum junction
temperature is exceeded. The threshold for thermal shutdown is 160°C with 15°C of hysteresis (both values
typical). During thermal shutdown the PFET and driver are disabled.
Design Considerations
OPERATION NEAR DROPOUT
Because the power MosFET is a PFET, the LM3409/09HV can be operated into dropout which occurs when the
input voltage is approximately equal to output voltage. Once the input voltage drops below the nominal output
voltage, the switch remains constantly on (D=1) causing the output voltage to decrease with the input voltage. In
normal operation, the average LED current is regulated to the peak current threshold minus half of the ripple. As
the converter goes into dropout, the LED current is exactly at the peak current threshold because it is no longer
switching. This causes the LED current to increase by half of the set ripple current as it makes the transition into
dropout. Therefore, the inductor current ripple should be kept as small as possible (while remaining above the
previously established minimum) and output capacitance should be added to help maintain good line regulation
when approaching dropout.
LED RIPPLE CURRENT
Selection of the ripple current through the LED array is analogous to the selection of output ripple voltage in a
standard voltage regulator. Where the output voltage ripple in a voltage regulator is commonly ±1% to ±5% of the
DC output voltage, LED manufacturers generally recommend values for ΔiLED-PP ranging from ±5% to ±20% of
ILED. For a nominal system operating point, a larger ΔiLED-PP specification can reduce the necessary inductor size
and/or allow for smaller output capacitors (or no output capacitors at all) which helps to minimize the total
solution size and cost. On the other hand, a smaller ΔiLED-PP specification would require more output inductance,
a higher switching frequency, or additional output capacitance.
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BUCK CONVERTERS W/O OUTPUT CAPACITORS
Because current is being regulated, not voltage, a buck current regulator is free of load current transients,
therefore output capacitance is not needed to supply the load and maintain output voltage. This is very helpful
when high frequency PWM dimming the LED load. When no output capacitor is used, the same design equations
that govern ΔiL-PP also apply to ΔiLED-PP.
BUCK CONVERTERS WITH OUTPUT CAPACITORS
A capacitor placed in parallel with the LED load can be used to reduce ΔiLED-PP while keeping the same average
current through both the inductor and the LED array. With an output capacitor, the inductance can be lowered,
making the magnetics smaller and less expensive. Alternatively, the circuit can be run at lower frequency with the
same inductor value, improving the efficiency and increasing the maximum allowable average output voltage. A
parallel output capacitor is also useful in applications where the inductor or input voltage tolerance is poor.
Adding a capacitor that reduces ΔiLED-PP to well below the target provides headroom for changes in inductance or
VIN that might otherwise push the maximum ΔiLED-PP too high.
Figure 29. Calculating Dynamic Resistance rD
Output capacitance (CO) is determined knowing the desired ΔiLED-PP and the LED dynamic resistance (rD). rD can
be calculated as the slope of the LED’s exponential DC characteristic at the nominal operating point as shown in
Figure 29. Simply dividing the forward voltage by the forward current at the nominal operating point will give an
incorrect value that is 5x to 10x too high. Total dynamic resistance for a string of n LEDs connected in series can
be calculated as the rD of one device multiplied by n. The following equations can then be used to estimate ΔiLEDPP when using a parallel capacitor:
'i
'iLED- PP = L - PP
rD
1+
ZC
(18)
1
ZC =
2 x S x fSW x CO
(19)
In general, ZC should be at least half of rD to effectively reduce the ripple. Ceramic capacitors are the best choice
for the output capacitors due to their high ripple current rating, low ESR, low cost, and small size compared to
other types. When selecting a ceramic capacitor, special attention must be paid to the operating conditions of the
application. Ceramic capacitors can lose one-half or more of their capacitance at their rated DC voltage bias and
also lose capacitance with extremes in temperature. Make sure to check any recommended deratings and also
verify if there is any significant change in capacitance at the operating voltage and temperature.
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OUTPUT OVER-VOLTAGE PROTECTION
Because the LM3409/09HV controls a buck current regulator, there is no inherent need to provide output overvoltage protection. If the LED load is opened, the output voltage will only rise as high as the input voltage plus
any ringing due to the parasitic inductance and capacitance present at the output node. If a ceramic output
capacitor is used in the application, it should have a minimum rating equal to the input voltage. Ringing seen at
the output node should not damage most ceramic capacitors, due to their high ripple current rating.
INPUT CAPACITORS
Input capacitors are selected using requirements for minimum capacitance and RMS ripple current. The PFET
current during tON is approximately ILED, therefore the input capacitors discharge the difference between ILED and
the average input current (IIN) during tON. During tOFF, the input voltage source charges up the input capacitors
with IIN. The minimum input capacitance (CIN-MIN) is selected using the maximum input voltage ripple (ΔvIN-MAX)
which can be tolerated. ΔvIN-MAX is equal to the change in voltage across CIN during tON when it supplies the load
current. A good starting point for selection of CIN is to use ΔvIN-MAX of 2% to 10% of VIN. CIN-MIN can be selected
as follows:
CIN - MIN =
ILED x t ON
'vIN - MAX
·
§1
- t OFF¸¸
ILED x ¨¨
f
¹
© SW
=
'vIN - MAX
(20)
An input capacitance at least 75% greater than the calculated CIN-MIN value is recommended. To determine the
RMS input current rating (IIN-RMS) the following approximation can be used:
IIN - RMS = ILED x D x (1 - D) = ILED x fSW x t ON x t OFF
(21)
Since this approximation assumes there is no inductor ripple current, the value should be increased by 10-30%
depending on the amount of ripple that is expected. Ceramic capacitors are the best choice for input capacitors
for the same reasons mentioned in the BUCK CONVERTERS WITH OUTPUT CAPACITORS section. Careful
selection of the capacitor requires checking capacitance ratings at the nominal operating voltage and
temperature.
P-CHANNEL MosFET (PFET)
The LM3409/09HV requires an external PFET (Q1) as the main power MosFET for the switching regulator. Q1
should have a voltage rating at least 15% higher than the maximum input voltage to ensure safe operation during
the ringing of the switch node. In practice all switching converters have some ringing at the switch node due to
the diode parasitic capacitance and the lead inductance. The PFET should also have a current rating at least
10% higher than the average transistor current (IT):
IT = D x ILED
(22)
The power rating is verified by calculating the power loss (PT) using the RMS transistor current (IT-RMS) and the
PFET on-resistance (RDS-ON):
2·
§
1 §¨ 'i L-PP ·¸ ¸
¨
IT- RMS = ILED x D x ¨1+ x ¨
¨ 12 © ILED ¸¹ ¸¸
©
¹
(23)
2
PT = IT- RMS x R DSON
(24)
It is important to consider the gate charge of Q1. As the input voltage increases from a nominal voltage to its
maximum input voltage, the COFT architecture will naturally increase the switching frequency. The dominant
switching losses are determined by input voltage, switching frequency, and PFET total gate charge (Qg). The
LM3409/09HV has to provide and remove charge Qg from the input capacitance of Q1 in order to turn it on and
off. This occurs more often at higher switching frequencies which requires more current from the internal
regulator, thereby increasing internal power dissipation and eventually causing the LM3409/09HV to thermally
cycle. For a given range of operating points the only effective way to reduce these switching losses is to
minimize Qg.
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A good rule of thumb is to limit Qg < 30nC (if the switching frequency remains below 300kHz for the entire
operating range then a larger Qg can be considered). If a PFET with small RDS-ON and a high voltage rating is
required, there may be no choice but to use a PFET with Qg > 30nC.
When using a PFET with Qg > 30nC, the bypass capacitor (CF) should not be connected to the VIN pin. This will
ensure that peak current detection through RSNS is not affected by the charging of the PFET input capacitance
during switching, which can cause false triggering of the peak detection comparator. Instead, CF should be
connected from the VCC pin to the CSN pin which will cause a small DC offset in VCST and ultimately ILED,
however it avoids the problematic false triggering.
In general, the PFET should be chosen to meet the Qg specification whenever possible, while minimizing RDS-ON.
This will minimize power losses while ensuring the part functions correctly over the full operating range.
RE-CIRCULATING DIODE
A re-circulating diode (D1) is required to carry the inductor current during tOFF. The most efficient choice for D1 is
a Schottky diode due to low forward voltage drop and near-zero reverse recovery time. Similar to Q1, D1 must
have a voltage rating at least 15% higher than the maximum input voltage to ensure safe operation during the
ringing of the switch node and a current rating at least 10% higher than the average diode current (ID):
ID = (1- D) x ILED
(25)
The power rating is verified by calculating the power loss through the diode. This is accomplished by checking
the typical diode forward voltage (VD) from the I-V curve on the product datasheet and calculating as follows:
PD = ID x VD
(26)
In general, higher current diodes have a lower VD and come in better performing packages minimizing both
power losses and temperature rise.
iLED (t)
ILED-MAX
ILED
IDIM-LED
DDIM x TDIM
t
0
TDIM
tOFF
Figure 30. Ideal LED Current iLED(t) During Parallel FET Dimming
EXTERNAL PARALLEL FET PWM DIMMING
Any buck topology LED driver is a good candidate for parallel FET dimming because high slew rates are
achievable, due to the fact that no output capacitance is required. This allows for much higher dimming
frequencies than are achievable using the EN pin. When using external parallel FET dimming, a situation can
arise where maximum off-time occurs due to a shorted output. To mitigate this situation, capacitive coupling to
the enable pin can be employed.
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LM3409/09HV
VDD >
1.6V
REXT
EN
CEXT
ILED
VDD
Dim
FET
PWM
Gate
Driver
Figure 31. External Parallel FET Dimming Circuit
As shown in Figure 31, a small capacitor (CEXT) is connected from the gate drive signal of the parallel Dim FET
to the EN pin and a pull-up resistor (REXT) is placed from the EN pin to the external VDD supply for the Dim FET
gate driver. This forces the on-timer to restart corresponding to every rising edge of the LED voltage, ensuring
that the unwanted maximum off-time condition does not occur. With this type of dimming, the EN pin does not
control the dimming; it simply resets the controller. A good design choice is to size REXT and CEXT to give a time
constant smaller than tOFF:
t OFF > REXT x CEXT
(27)
The ideal LED current waveform iLED(t) during parallel FET PWM dimming is very similar to the EN pin PWM
dimming shown previously. The LED current does not rise and fall infinitely fast as shown in Figure 30 however
with this method, only the speed of the parallel Dim FET ultimately limits the dimming frequency and dimming
duty cycle. This allows for much faster PWM dimming than can be attained with the EN pin.
CIRCUIT LAYOUT
The performance of any switching converter depends as much upon the layout of the PCB as the component
selection. Following a few simple guidelines will maximimize noise rejection and minimize the generation of EMI
within the circuit.
Discontinuous currents are the most likely to generate EMI, therefore care should be taken when routing these
paths. The main path for discontinuous current in the LM3409/09HV buck converter contains the input capacitor
(CIN), the recirculating diode (D1), the P-channel MosFET (Q1), and the sense resistor (RSNS). This loop should
be kept as small as possible and the connections between all three components should be short and thick to
minimize parasitic inductance. In particular, the switch node (where L1, D1 and Q1 connect) should be just large
enough to connect the components without excessive heating from the current it carries.
The IADJ, COFF, CSN and CSP pins are all high-impedance control inputs which couple external noise easily,
therefore the loops containing these high impedance nodes should be minimized. The most sensitive loop
contains the sense resistor (RSNS) which should be placed as close as possible to the CSN and CSP pins to
maximize noise rejection. The off-time capacitor (COFF) should be placed close to the COFF and GND pins for
the same reason. Finally, if an external resistor (REXT) is used to bias the IADJ pin, it should be placed close to
the IADJ and GND pins, also.
In some applications the LED or LED array can be far away (several inches or more) from the LM3409/09HV, or
on a separate PCB connected by a wiring harness. When an output capacitor is used and the LED array is large
or separated from the rest of the converter, the output capacitor should be placed close to the LEDs to reduce
the effects of parasitic inductance on the AC impedance of the capacitor.
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Design Guide
TYPICAL APPLICATION
RUV2
RUV1
1
VIN
UVLO
10
VIN
CF
2
3
ROFF
VCC
IADJ
EN
LM3409/HV
CSP
CIN
9
8
RSNS
4
COFF
COFF
CSN
7
DAP
5
GND
PGATE
6
Q1
L1
VO
D1
ILED
SPECIFICATIONS
Nominal input voltage: VIN
Maximum input voltage: VIN-MAX
Nominal output voltage (# of LEDs x forward voltage): VO
LED string dynamic resistance: rD
Switching frequency (at nominal VIN, VO): fSW
Average LED current: ILED
Inductor current ripple: ΔiL-PP
LED current ripple: ΔiLED-PP
Input voltage ripple: ΔvIN-PP
UVLO characteristics: VTURN-ON and VHYS
Expected efficiency: η
1. NOMINAL SWITCHING FREQUENCY
Calculate switching frequency (fSW) at the nominal operating point (VIN and VO). Assume a COFF value (between
470pF and 1nF) and a system efficiency (η). Solve for ROFF:
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R OFF =
SNVS602J – MARCH 2009 – REVISED MAY 2013
§
VO ·
¸
- ¨¨1¸
© K x VIN ¹
·
§
(COFF + 20 pF) x fSW x ln ¨¨1 - 1.24V ¸¸
V
O ¹
©
(28)
2. INDUCTOR RIPPLE CURRENT
Set the inductor ripple current (ΔiL-PP) by solving for the appropriate inductor (L1):
V xt
L1 = O OFF
'iL- PP
(29)
3. AVERAGE LED CURRENT
Set the average LED current (ILED) by first solving for the peak inductor current (IL-MAX):
'i
IL- MAX = ILED + L- PP
2
(30)
Peak inductor current is detected across the sense resistor (RSNS). In most cases, assume the maximum value
(VADJ = 1.24V) at the IADJ pin and solve for RSNS:
VADJ
RSNS =
5 x IL - MAX
(31)
If the calculated RSNS is far from a standard value, the beginning of the process can be iterated to choose a new
ROFF, L1, and RSNS value that is a closer fit. The easiest way to approach the iterative process is to change the
nominal fSW target knowing that the switching frequency varies with operating conditions anyways.
Another method for finding a standard RSNS value is to change the VADJ value. However, this would require an
external voltage source or a resistor from the IADJ pin to GND as explained in the Theory of Operation section of
this datasheet.
4. OUTPUT CAPACITANCE
A minimum output capacitance (CO-MIN) may be necessary to reduce ΔiLED-PP below ΔiL-PP. With the specified
ΔiLED-PP and the known dynamic resistance (rD) of the LED string, solve for the required impedance (ZC) for COMIN:
r x 'iLED - PP
ZC = D
'iL - PP - 'iLED - PP
(32)
Solve for CO-MIN:
CO - MIN =
1
2 x S x fSW x Z C
(33)
5. INPUT CAPACITANCE
Set the input voltage ripple (ΔvIN-PP) by solving for the required minimum capacitance (CIN-MIN):
·
§ 1
- t OFF¸¸
ILED x ¨¨
f
I xt
¹
© SW
CIN- MIN = LED ON =
'vIN - PP
'vIN - PP
(34)
The necessary RMS input current rating (IIN-RMS) is:
IIN - RMS = ILED x fSW x t ON x t OFF
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(35)
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6. PFET
The PFET voltage rating should be at least 15% higher than the maximum input voltage (VIN-MAX) and current
rating should be at least 10% higher than the average PFET current (IT):
IT = D x ILED
(36)
Given a PFET with on-resistance (RDS-ON), solve for the RMS transistor current (IT-RMS) and power dissipation
(PT):
2·
§
1 §¨ 'i L-PP ·¸ ¸
¨
IT- RMS = ILED x D x ¨1+ x ¨
¨ 12 © ILED ¸¹ ¸¸
©
¹
(37)
2
PT = IT- RMS x R DSON
(38)
7. DIODE
The Schottky diode needs a voltage rating similar to the PFET. Higher current diodes with a lower forward
voltage are suggested. Given a diode with forward voltage (VD), solve for the average diode current (ID) and
power dissipation (PD):
ID = (1- D) x ILED
(39)
PD = ID x VD
(40)
8. INPUT UVLO
Input UVLO is set with the turn-on threshold voltage (VTURN-ON) and the desired hysteresis (VHYS). To set VHYS,
solve for RUV2:
V
RUV2 = HYS
22 PA
(41)
To set VTURN-ON, solve for RUV1:
RUV1 =
1.24V x RUV2
VTURN - ON - 1.24V
(42)
9. IADJ CONNECTION METHOD
The IADJ pin controls the high-side current sense threshold in three ways outlined in the Theory of Operation
section.
Method #1: Leave IADJ pin open and ILED is calculated as in the 3. AVERAGE LED CURRENT section of the
Design Guide.
Method #2: Apply an external voltage (VADJ) to the IADJ pin between 0 and 1.24V to analog dim or to reduce
ILED as follows:
'i
VADJ
ILED =
- L - PP
5 x RSNS
2
(43)
Keep in mind that analog dimming will eventually push the converter in to DCM and the inductor current ripple
will no longer be constant causing a divergence from linear dimming at low levels.
A 0.1µF capacitor connected from the IADJ pin to GND is recommended when using this method. It may also be
necessary to have a 1kΩ series resistor with the capacitor to create an RC filter. The filter will help remove high
frequency noise created by other connected circuitry.
Method #3: Connect an external resistor or potentiometer to GND (REXT) and the internal 5µA current source will
set the voltage. Again, a 0.1µF capacitor connected from the IADJ pin to GND is recommended. To set ILED,
solve for REXT:
22
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'i ·
§
¨ILED + L-PP¸ x RSNS
2 ¹
REXT = ©
1 PA
(44)
10. PWM DIMMING METHOD
There are two methods to PWM dim using the LM3409/09HV:
Method #1: Apply an external PWM signal to the EN terminal.
Method #2: Perform external parallel FET shunt dimming as detailed in the EXTERNAL PARALLEL FET PWM
DIMMING section.
Design Example #1
EN PIN PWM DIMMING APPLICATION FOR 10 LEDS
RUV2
RUV1
1
VIN
UVLO
10
VIN = 48V
CF
2
PWM
ROFF
3
VCC
IADJ
EN
LM3409HV
CSP
CIN1
CIN2
9
VO = 35V
8
RSNS
4
COFF
COFF
CSN
7
ILED = 2A
DAP
5
GND
PGATE
6
Q1
L1
D1
SPECIFICATIONS
fSW = 525kHz
VIN = 48V; VIN-MAX = 75V
VO = 35V
ILED = 2A
ΔiLED-PP = ΔiL-PP = 1A
ΔvIN-PP = 1.44V
VTURN-ON = 10V; VHYS = 1.1V
η = 0.95
1. NOMINAL SWITCHING FREQUENCY
Assume COFF = 470pF and η = 0.95. Solve for ROFF:
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ROFF =
www.ti.com
§
VO ·
¸
- ¨¨1¸
© K x VIN ¹
§ 1.24V·
¸
(COFF + 20 pF) x fSW x ln ¨¨1¸
© VO ¹
§
35V ·
- ¨1¸
© 0.95 x 48V¹
ROFF =
= 25.1 k:
§ 1.24V·
490 pF x 525 kHz x ln ¨1¸
© 35V ¹
(45)
The closest 1% tolerance resistor is 24.9 kΩ therefore the actual tOFF and target fSW are:
§ 1.24V·
¸
t OFF = - (COFF + 20 pF) x ROFF x ln ¨¨1VO ¸¹
©
§ 1.24V·
¸¸ = 440 ns
t OFF = - 490 pF x 24.9 k: x ln ¨¨1© 35V ¹
(46)
§ V ·
§
·
1 - ¨¨ O ¸¸ 1 - ¨ 35V ¸
©0.95 x 48V¹ 528 kHz
©K x VIN ¹
fSW = t
=
=
440 ns
OFF
(47)
The chosen components from step 1 are:
COFF = 470 pF
R OFF = 24.9 k:
(48)
2. INDUCTOR RIPPLE CURRENT
Solve for L1:
L1 =
VO x t OFF 35V x 440 ns
=
= 15.4 PH
'iL - PP
1A
(49)
The closest standard inductor value is 15 µH therefore the actual ΔiL-PP is:
V xt
35V x 440 ns
'iL- PP = O OFF =
= 1.027A
L1
15 PH
(50)
The chosen component from step 2 is:
L1 = 15 PH
(51)
3. AVERAGE LED CURRENT
Determine IL-MAX:
IL- MAX = ILED +
'iL - PP
1.027A
= 2A +
= 2.51A
2
2
(52)
Assume VADJ = 1.24V and solve for RSNS:
VADJ
1.24V
RSNS =
=
= 0.099:
5 x IL- MAX 5 x 2.51A
(53)
The closest 1% tolerance resistor is 0.1 Ω therefore the ILED is:
24
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ILED =
VADJ
'i
- L- PP
5 x RSNS
2
ILED =
1.027A
1.24V
= 1.97A
2
5 x 0.099:
(54)
The chosen component from step 3 is:
RSNS = 0.1:
(55)
4. OUTPUT CAPACITANCE
No output capacitance is necessary.
5. INPUT CAPACITANCE
Determine tON:
1
1
t ON =
- t OFF =
- 440 ns = 1.45 Ps
528 kHz
fSW
(56)
Solve for CIN-MIN:
I xt
1. 97A x 1.45 Ps
CIN - MIN = LED ON =
= 1.98 PF
'vIN - PP
1.44V
(57)
Choose CIN:
CIN = CIN - MIN x 2 = 3.96 PF
(58)
Determine IIN-RMS:
IIN - RMS = ILED x fSW x t ON x t OFF
IIN- RMS = 1.97A x 528 kHz x 1.45 Ps x 440 ns = 831 mA
(59)
The chosen components from step 5 are:
CIN1 = CIN2 = 2.2 PF
(60)
6. PFET
Determine minimum Q1 voltage rating and current rating:
VT- MAX = VIN - MAX = 75V
IT = D x ILED =
(61)
VO x ILED 35V x 1.97A
=
= 1.51A
48V x 0.95
VIN x K
(62)
A 100V, 3.8A PFET is chosen with RDS-ON = 190mΩ and Qg = 20nC. Determine IT-RMS and PT:
2·
§
1 § 'i ·
IT- RMS = ILED x D x ¨¨1+ x ¨¨ L-PP ¸¸ ¸¸
¨ 12 © ILED ¹ ¸
©
¹
2
§
1 §1.027A · ·¸
35V
¨
x 1+ x ¨
IT- RMS = 1.97A x
¸
48V x 0.95 ¨ 12 ¨© 1.97A ¸¹ ¸
¹
©
IT- RMS = 1.74A
2
(63)
2
PT = IT- RMS x R DSON = 1.74 A x 190 m: = 577 mW
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The chosen component from step 6 is:
Q1o 3.8 A ,100V, DPAK
(65)
7. DIODE
Determine minimum D1 voltage rating and current rating:
VD - MAX = VIN - MAX = 75V
(66)
§
VO ·
¸ x ILED
ID = (1- D) x ILED = ¨¨1¸
© VIN x K ¹
§
35V ·
ID = ¨¨1¸ x 1.97A = 457 mA
48
V
x 0.95¸¹
©
(67)
A 100V, 3A diode is chosen with VD = 750mV. Determine PD:
PD = ID x VD = 457 mA x 750 mV = 343 mW
(68)
The chosen component from step 7 is:
D1 o 3 A,100V, SMC
(69)
8. INPUT UVLO
Solve for RUV2:
RUV2 =
VHYS
1.1V 50 k:
=
=
22 PA 22 PA
(70)
The closest 1% tolerance resistor is 49.9 kΩ therefore VHYS is:
VHYS = RUV2 x 22 PA = 49.9 k: x 22 PA = 1.1V
(71)
Solve for RUV1:
RUV1 =
1. 24V x RUV2
1.24V x 49.9 k:
=
= 7.06 k:
10V - 1.24V
VTURN - ON - 1.24V
(72)
The closest 1% tolerance resistor is 6.98 kΩ therefore VTURN-ON is:
VTURN-ON =
VTURN-ON =
1. 24V x (RUV1 + RUV2)
RUV1
1. 24V x (6.98 k: + 49.9 k:)
6.98 k:
= 10.1V
(73)
The chosen components from step 8 are:
RUV1 = 6.98 k:
RUV2 = 49.9 k:
(74)
9. IADJ CONNECTION METHOD
The IADJ pin is left open forcing VADJ = 1.24V.
10. PWM DIMMING METHOD
PWM dimming signal pair is applied to the EN pin and GND at fDIM = 1 kHz.
26
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SNVS602J – MARCH 2009 – REVISED MAY 2013
Design #1 Bill of Materials
Qty
Part ID
Part Value
Manufacturer
Part Number
1
LM3409HV/LM3409QHV
Buck controller
TI
LM3409HVMY/LM3409QHVMY
2
CIN1, CIN2
2.2µF X7R 10% 100V
MURATA
GRM43ER72A225KA01L
1
CF
1.0µF X7R 10% 16V
TDK
C1608X7R1C105K
1
COFF
470pF X7R 10% 50V
TDK
C1608X7R1H471K
1
Q1
PMOS 100V 3.8A
ZETEX
ZXMP10A18KTC
1
D1
Schottky 100V 3A
VISHAY
SS3H10-E3/57T
1
L1
15 µH 20% 4.2A
TDK
SLF12565T-150M4R2
1
ROFF
24.9kΩ 1%
VISHAY
CRCW060324K9FKEA
1
RUV1
6.98kΩ 1%
VISHAY
CRCW06036K98FKEA
1
RUV2
49.9kΩ 1%
VISHAY
CRCW060349K9FKEA
1
RSNS
0.1Ω 1% 1W
VISHAY
WSL2512R1000FEA
Design Example #2
ANALOG DIMMING APPLICATION FOR 4 LEDS
RUV2
RUV1
RF2
VADJ
1
VIN
UVLO
10
VIN = 24V
CF
2
VCC
IADJ
CIN1
9
CF2
3
ROFF
EN
LM3409
CSP
8
RSNS
4
COFF
CSN
COFF
VO = 14V
7
DAP
5
GND
PGATE
6
Q1
ILED = 1A
L1
D1
CO
SPECIFICATIONS
fSW = 500kHz
VIN = 24V; VIN-MAX = 42V
VO = 14V
ILED = 1A
ΔiL-PP = 450mA; ΔiLED-PP = 50mA
ΔvIN-PP = 1V
VTURN-ON = 10V; VHYS = 1.1V
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η = 0.90
1. NOMINAL SWITCHING FREQUENCY
Assume COFF = 470pF and η = 0.90. Solve for ROFF:
§
VO ·
- ¨¨1 ¸
K
x
VIN ¸¹
©
ROFF =
§ 1.24V·
¸
COFF + 20 pF x fSW x ln ¨¨1 VO ¸¹
©
§
14V ·
- ¨1 ¸
0
.
90
x 24V¹
©
ROFF =
= 15.5 k:
§ 1. 24V·
490 pF x 500 kHz x ln ¨1¸
© 14V ¹
(75)
The closest 1% tolerance resistor is 15.4 kΩ therefore the actual tOFF and target fSW are:
§ 1.24V·
¸
t OFF = - (COFF + 20 pF) x R OFF x ln ¨¨1VO ¸¹
©
§ 1.24V ·
t OFF = - 490 pF x 15.4 k: x ln ¨¨1¸¸ = 700 ns
© 14V ¹
fSW =
§ VO ·
¸
1- ¨¨
¸
©K x VIN ¹
t OFF
(76)
§ 14V ·
1- ¨
¸
©0. 90 x 24V¹
= 503 kHz
=
700 ns
(77)
The chosen components from step 1 are:
COFF = 470 pF
R OFF = 15.4 k:
(78)
2. INDUCTOR RIPPLE CURRENT
Solve for L1:
L1 =
VO x t OFF 14V x 700 ns
=
= 21.8 PH
'iL - PP
450 mA
(79)
The closest standard inductor value is 22 µH therefore the actual ΔiL-PP is:
'iL - PP =
VO x t OFF
L1
=
14V x 700 ns
= 445 mA
22 PH
(80)
The chosen component from step 2 is:
L1 = 22 PH
(81)
3. AVERAGE LED CURRENT
Determine IL-MAX:
IL - MAX = ILED +
'iL - PP
445 mA
= 1A +
= 1. 22 A
2
2
(82)
Assume VADJ = 1.24V and solve for RSNS:
28
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RSNS =
VADJ
1.24V
=
= 0.203:
5 x IL - MAX 5 x 1.22A
(83)
The closest 1% tolerance resistor is 0.2 Ω therefore ILED is:
'i
VADJ
1.24V
445 mA
ILED =
- L - PP =
= 1.02 A
2
5 x RSNS
2
5 x 0.2:
(84)
The chosen component from step 3 is:
RSNS = 0.2:
(85)
4. OUTPUT CAPACITANCE
Assume rD = 2 Ω and determine ZC:
r x 'iLED- PP
2: x 50 mA
ZC = D
=
= 250 m:
'iL- PP - 'iLED- PP 450 mA - 50 mA
(86)
Solve for CO-MIN and :
1
2 x S x fSW x Z C
CO - MIN =
CO - MIN =
1
2 x S x 503 kHz x 250 m:
= 1.27 PF
(87)
Choose CO:
CO = CO- MIN x 1.75 = 2.2 PF
(88)
The chosen component from step 5 is:
CO = 2.2 PF
(89)
5. INPUT CAPACITANCE
Determine tON:
t ON =
1
1
-t
- 700 ns = 1.29 Ps
=
fSW OFF 503 kHz
(90)
Solve for CIN-MIN:
I xt
1.02A x 1.29 Ps
CIN - MIN = LED ON =
= 1.82 PF
'vIN- PP
720 mV
(91)
Choose CIN:
CIN = CIN - MIN x 2 = 3.64 PF
(92)
Determine IIN-RMS:
IIN- RMS = ILED x fSW x t ON x t OFF
IIN- RMS = 1.02A x 503 kHz x 1. 29 Ps x 700 ns = 486 mA
(93)
The chosen component from step 5 is:
CIN = 4.7 PF
(94)
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6. PFET
Determine minimum Q1 voltage rating and current rating:
VT- MAX = VIN - MAX = 42V
IT = D x ILED =
(95)
VO x ILED 14V x 1.02A
=
= 660 mA
VIN x K
24V x 0.90
(96)
A 70V, 5.7A PFET is chosen with RDS-ON = 190mΩ and Qg = 20nC. Determine IT-RMS and PT:
2·
§
1 §¨ 'i L-PP ·¸ ¸
¨
IT- RMS = ILED x D x ¨1+ x ¨
¨ 12 © ILED ¸¹ ¸¸
©
¹
§ 1 §445 mA·2·
14V
x ¨1+ x ¨
¸¸
IT- RMS = 1.02A x
24V x 0.90 ¨ 12 ¨© 1.02A ¸¹ ¸
¹
©
IT- RMS = 830 mA
2
PT = IT- RMS
(97)
2
x RDSON = 830 mA x190 m: = 129 mW
(98)
The chosen component from step 6 is:
Q1o 5.7A, 70V, DPAK
(99)
7. DIODE
Determine minimum D1 voltage rating and current rating:
VD- MAX = VIN - MAX = 42V
(100)
VO ·
§
¸ x ILED
ID = (1- D) x ILED = ¨¨1¸
© VIN xK ¹
14V ·
§
¸ x 1.02A = 358 mA
ID = ¨124
V
x 0.90¹
©
(101)
A 60V, 5A diode is chosen with VD = 750mV. Determine PD:
PD = ID x VD = 358 mA x 750 mV = 268 mW
(102)
The chosen component from step 7 is:
D1 o 5A, 60V, SMC
(103)
8. INPUT UVLO
Solve for RUV2:
RUV2 =
VHYS
1.1V 50 k:
=
=
22 PA 22 PA
(104)
The closest 1% tolerance resistor is 49.9 kΩ therefore VHYS is:
VHYS = RUV2 x 22 PA = 49.9 k: x 22 PA = 1.1V
(105)
Solve for RUV1:
RUV1 =
30
1. 24V x RUV2
1.24V x 49.9 k:
=
= 7.06 k:
10V - 1.24V
VTURN - ON - 1.24V
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SNVS602J – MARCH 2009 – REVISED MAY 2013
The closest 1% tolerance resistor is 6.98 kΩ therefore VTURN-ON is:
VTURN-ON =
VTURN-ON =
1. 24V x (RUV1 + RUV2)
RUV1
1. 24V x (6.98 k: + 49.9 k:)
6.98 k:
= 10.1V
(107)
The chosen components from step 8 are:
RUV1 = 6.98 k:
RUV2 = 49.9 k:
(108)
9. IADJ CONNECTION METHOD
The IADJ pin is connected to an external voltage source and varied from 0 – 1.24V to dim. An RC filter (RF2 = 1
kΩ and CF2 = 0.1µF) is used as recommended.
10. PWM DIMMING METHOD
No PWM dimming is necessary.
Design #2 Bill of Materials
Qty
Part ID
Part Value
Manufacturer
Part Number
1
LM3409/LM3409Q
Buck controller
TI
LM3409MY/LM3409QMY
2
CIN1
4.7µF X7R 10% 50V
MURATA
GRM55ER71H475MA01L
1
CF
1.0µF X7R 10% 16V
TDK
C1608X7R1C105K
C1608X7R1C104K
1
CF2
0.1µF X7R 10% 16V
TDK
1
COFF
470pF X7R 10% 50V
TDK
C1608X7R1H471K
1
CO
2.2µF X7R 10% 50V
MURATA
GRM43ER71H225MA01L
1
Q1
PMOS 70V 5.7A
ZETEX
ZXMP7A17KTC
1
D1
Schottky 60V 5A
COMCHIP
CDBC560-G
1
L1
22 µH 20% 4.2A
TDK
SLF12575T-220M4R0
1
RF2
1.0kΩ 1%
VISHAY
CRCW06031K00FKEA
1
ROFF
15.4kΩ 1%
VISHAY
CRCW060315K4FKEA
1
RUV1
6.98kΩ 1%
VISHAY
CRCW06036K98FKEA
1
RUV2
49.9kΩ 1%
VISHAY
CRCW060349K9FKEA
1
RSNS
0.2Ω 1% 1W
VISHAY
WSL2512R2000FEA
Copyright © 2009–2013, Texas Instruments Incorporated
Product Folder Links: LM3409 LM3409HV LM3409-Q1
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LM3409, LM3409HV, LM3409-Q1
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APPLICATIONS INFORMATION
DESIGN #3: EXTERNAL PARALLEL FET PWM DIMMING APPLICATION FOR 10 LEDS
RUV2
RUV1
1
UVLO
VIN
IADJ
VCC
10
VIN = 48V
CF
2
REXT
3
5V
EN
LM3409HV
CSP
CIN1
CIN2
9
VO = 35V
8
RSNS
CEXT
4
COFF
CSN
COFF
7
DAP
5
GND
PGATE
6
Q1
L1
Q3
R3
ILED = 2A
max
D1
ROFF
R2
Q2
PWM
R1
30085623
Design #3 Bill of Materials
32
Qty
Part ID
Part Value
Manufacturer
Part Number
1
LM3409HV/LM3409QHV
Buck controller
TI
LM3409HVMY/LM3409QHVM
Y
2
CIN1, CIN2
2.2µF X7R 10% 100V
MURATA
GRM43ER72A225KA01L
C1608X7R1C105K
1
CF
1.0µF X7R 10% 16V
TDK
1
COFF
470pF X7R 10% 50V
TDK
C1608X7R1H471K
1
C1
2200pF X7R 10% 50V
MURATA
GRM188R71H222KA01D
1
Q1
PMOS 100V 3.8A
ZETEX
ZXMP10A18KTC
1
Q2
CMOS 30V 2A
FAIRCHILD
FDC6333C
1
Q3
NMOS 100V 7.5A
FAIRCHILD
FDS3672
1
D1
Schottky 100V 3A
VISHAY
SS3H10-E3/57T
1
L1
15 µH 20% 4.2A
TDK
SLF12565T-150M4R2
2
R1, R2
1Ω 1%
VISHAY
CRCW06031R00FNEA
1
R3
10kΩ 1%
VISHAY
CRCW060310K0FKEA
1
REXT
100Ω 1%
VISHAY
CRCW0603100RFKEA
1
ROFF
24.9kΩ 1%
VISHAY
CRCW060324K9FKEA
1
RUV1
6.98kΩ 1%
VISHAY
CRCW06036K98FKEA
1
RUV2
49.9kΩ 1%
VISHAY
CRCW060349K9FKEA
1
RSNS
0.1Ω 1% 1W
VISHAY
WSL2512R1000FEA
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Copyright © 2009–2013, Texas Instruments Incorporated
Product Folder Links: LM3409 LM3409HV LM3409-Q1
LM3409, LM3409HV, LM3409-Q1
www.ti.com
SNVS602J – MARCH 2009 – REVISED MAY 2013
DESIGN #4: SINGLE POTENTIOMETER ANALOG DIMMING APPLICATION FOR 6 LEDS
RUV2
RUV1
RADJ
1
VIN
UVLO
10
VIN = 36V
CF
2
VCC
IADJ
CIN1
CIN2
9
CF2
3
ROFF
EN
LM3409
CSP
VO = 24V
8
RSNS
4
COFF
COFF
CSN
7
DAP
5
GND
PGATE
6
ILED = 700 mA
maximum
Q1
L1
D1
CO
Design #4 Bill of Materials
Qty
Part ID
Part Value
Manufacturer
1
LM3409/LM3409Q
Buck controller
TI
LM3409MY/LM3409QMY
2
CIN1, CIN2
2.2µF X7R 10% 50V
MURATA
GRM43ER71H225MA01L
1
CF
1.0µF X7R 10% 16V
TDK
C1608X7R1C105K
1
CF2
0.1µF X7R 10% 16V
TDK
C1608X7R1C104K
1
COFF
470pF X7R 10% 50V
TDK
C1608X7R1H471K
1
CO
1.0µF X7R 10% 50V
MURATA
GRM32RR71H105KA01L
1
Q1
PMOS 60V 3A
ZETEX
ZXMP6A17GTA
1
D1
Schottky 60V 2A
ST-MICRO
STPS2L60A
1
L1
68 µH 20% 2A
TDK
SLF12565T-680M2R0
1
ROFF
25.5kΩ 1%
VISHAY
CRCW060325K5FKEA
1
RUV1
6.98kΩ 1%
VISHAY
CRCW06036K98FKEA
1
RUV2
49.9kΩ 1%
VISHAY
CRCW060349K9FKEA
1
RSNS
0.3Ω 1% 1W
VISHAY
WSL2512R3000FEA
1
RADJ
250kΩ potentiometer
BOURNS
3352P-1-254
Copyright © 2009–2013, Texas Instruments Incorporated
Product Folder Links: LM3409 LM3409HV LM3409-Q1
Part Number
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LM3409, LM3409HV, LM3409-Q1
SNVS602J – MARCH 2009 – REVISED MAY 2013
www.ti.com
DESIGN #5: 75°C THERMAL FOLDBACK APPLICATION FOR 16 LEDS
RUV2
RUV1
1
VIN
UVLO
10
VIN = 65V
CF
2
U1
VCC
IADJ
CIN1
CIN2
9
CF2
3
ROFF
LM3409HV
EN
CSP
VO = 56V
8
RSNS
4
COFF
COFF
CSN
7
DAP
5
GND
PGATE
6
ILED = 3A
maximum
Q1
L1
D1
Design #5 Bill of Materials
*U2 could be replaced with a 500kΩ NTC thermistor connected from IADJ to GND.
Qty
Part ID
Part Value
Manufacturer
Part Number
1
LM3409HV/LM3409QHV
Buck controller
TI
LM3409HVMY/LM3409QHVMY
1
U1
Analog Temperature Sensor
TI
LM94022
2
CIN1, CIN2
2.2µF X7R 10% 100V
MURATA
GRM43ER72A225KA01L
1
CF
1.0µF X7R 10% 16V
TDK
C1608X7R1C105K
1
CF2
0.1µF X7R 10% 16V
TDK
C1608X7R1C104K
1
COFF
470pF X7R 10% 50V
TDK
C1608X7R1H471K
1
Q1
PMOS 100V 3.8A
ZETEX
ZXMP10A18KTC
1
D1
Schottky 100V 3A
COMCHIP
SS3H10-E3/57T
1
L1
15 µH 20% 4.7A
TDK
SLF12575T-150M4R7
1
ROFF
24.9kΩ 1%
VISHAY
CRCW060324K9FKEA
1
RUV1
6.98kΩ 1%
VISHAY
CRCW06036K98FKEA
1
RUV2
49.9kΩ 1%
VISHAY
CRCW060349K9FKEA
1
RSNS
0.07Ω 1% 1W
VISHAY
WSL2512R0700FEA
34
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Copyright © 2009–2013, Texas Instruments Incorporated
Product Folder Links: LM3409 LM3409HV LM3409-Q1
LM3409, LM3409HV, LM3409-Q1
www.ti.com
SNVS602J – MARCH 2009 – REVISED MAY 2013
DESIGN #6: HIGH CURRENT APPLICATION FOR 4 LEDS
RUV2
RUV1
RF2
VADJ
1
VIN
UVLO
10
VIN = 24V
CF
2
VCC
IADJ
CIN1
9
CF2
3
ROFF
LM3409
EN
CSP
8
RSNS
4
COFF
CSN
COFF
VO = 14V
7
DAP
5
GND
PGATE
6
Q1
ILED = 4.5A
L1
D1
CO
Design #6 Bill of Materials
*U2 could be replaced with a 500kΩ NTC thermistor connected from IADJ to GND.
Qty
Part ID
Part Value
Manufacturer
Part Number
1
LM3409/LM3409Q
Buck controller
TI
LM3409MY/LM3409QMY
2
CIN1
10µF X7R 10% 50V
TDK
C5750X7R1H106K
1
CF
1.0µF X7R 10% 16V
TDK
C1608X7R1C105K
C1608X7R1C104K
1
CF2
0.1µF X7R 10% 16V
TDK
1
COFF
470pF X7R 10% 50V
TDK
C1608X7R1H471K
1
CO
1.0µF X7R 10% 50V
MURATA
GRM32RR71H105KA01L
1
Q1
PMOS 30V 24A
ST-MICRO
STD30PF03LT4
1
D1
Schottky 30V 5A
VISHAY
SSC53L-E3/57T
1
L1
15 µH 20% 7.5A
COILCRAFT
DO5022P-153ML
1
RF2
1.0kΩ 1%
VISHAY
CRCW06031K00FKEA
1
ROFF
23.2kΩ 1%
VISHAY
CRCW060323K2FKEA
1
RUV1
6.98kΩ 1%
VISHAY
CRCW06036K98FKEA
1
RUV2
49.9kΩ 1%
VISHAY
CRCW060349K9FKEA
1
RSNS
0.05Ω 1% 1W
VISHAY
WSL2512R0500FEA
Copyright © 2009–2013, Texas Instruments Incorporated
Product Folder Links: LM3409 LM3409HV LM3409-Q1
Submit Documentation Feedback
35
LM3409, LM3409HV, LM3409-Q1
SNVS602J – MARCH 2009 – REVISED MAY 2013
www.ti.com
REVISION HISTORY
Changes from Revision I (May 2013) to Revision J
•
36
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 35
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Copyright © 2009–2013, Texas Instruments Incorporated
Product Folder Links: LM3409 LM3409HV LM3409-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
2-May-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LM3409HVMY/NOPB
ACTIVE
MSOPPowerPAD
DGQ
10
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
SYHB
LM3409HVMYX/NOPB
ACTIVE
MSOPPowerPAD
DGQ
10
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
SYHB
LM3409MY/NOPB
ACTIVE
MSOPPowerPAD
DGQ
10
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
SXFB
LM3409MYX/NOPB
ACTIVE
MSOPPowerPAD
DGQ
10
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
SXFB
LM3409N/NOPB
ACTIVE
PDIP
NFF
14
25
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
LM3409QHVMY/NOPB
ACTIVE
MSOPPowerPAD
DGQ
10
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
SZEB
LM3409QHVMYX/NOPB
ACTIVE
MSOPPowerPAD
DGQ
10
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
SZEB
LM3409QMY/NOPB
ACTIVE
MSOPPowerPAD
DGQ
10
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
SZDB
LM3409QMYX/NOPB
ACTIVE
MSOPPowerPAD
DGQ
10
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
SZDB
LM3409N
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
(3)
2-May-2013
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM3409, LM3409-Q1 :
• Catalog: LM3409
• Automotive: LM3409-Q1
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
8-May-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM3409HVMY/NOPB
MSOPPower
PAD
DGQ
10
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM3409HVMYX/NOPB
MSOPPower
PAD
DGQ
10
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM3409MY/NOPB
MSOPPower
PAD
DGQ
10
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM3409MYX/NOPB
MSOPPower
PAD
DGQ
10
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM3409QHVMY/NOPB
MSOPPower
PAD
DGQ
10
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM3409QHVMYX/NOPB
MSOPPower
PAD
DGQ
10
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM3409QMY/NOPB
MSOPPower
PAD
DGQ
10
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM3409QMYX/NOPB
MSOP-
DGQ
10
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-May-2013
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
Power
PAD
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM3409HVMY/NOPB
MSOP-PowerPAD
DGQ
10
1000
213.0
191.0
55.0
LM3409HVMYX/NOPB
MSOP-PowerPAD
DGQ
10
3500
367.0
367.0
35.0
LM3409MY/NOPB
MSOP-PowerPAD
DGQ
10
1000
213.0
191.0
55.0
LM3409MYX/NOPB
MSOP-PowerPAD
DGQ
10
3500
367.0
367.0
35.0
LM3409QHVMY/NOPB
MSOP-PowerPAD
DGQ
10
1000
213.0
191.0
55.0
LM3409QHVMYX/NOPB
MSOP-PowerPAD
DGQ
10
3500
367.0
367.0
35.0
LM3409QMY/NOPB
MSOP-PowerPAD
DGQ
10
1000
213.0
191.0
55.0
LM3409QMYX/NOPB
MSOP-PowerPAD
DGQ
10
3500
367.0
367.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
NFF0014A
N0014A
N14A (Rev G)
www.ti.com
MECHANICAL DATA
DGQ0010A
MUC10A (Rev A)
BOTTOM VIEW
www.ti.com
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