Data Delay DDU7F-25M 10-tap, ttl-interfaced fixed delay line (series ddu7f) Datasheet

DDU7F
data 3 
delay
devices, inc.
10-TAP, TTL-INTERFACED
FIXED DELAY LINE
(SERIES DDU7F)
FEATURES
•
•
•
•
•
•
PACKAGES
Ten equally spaced outputs
Fits standard 14-pin DIP socket
Low profile
Auto-insertable
Input & outputs fully TTL interfaced & buffered
10 T2L fan-out capability
IN
1
14
VCC
N/C
2
13
T1
T2
3
12
T3
T4
4
11
T5
T6
5
10
T7
T8
6
9
T9
GND
7
8
T10
DDU7F-xx
DDU7F-xxA2
DDU7F-xxB2
DDU7F-xxM
DIP
Gull-Wing
J-Lead
Military DIP
FUNCTIONAL DESCRIPTION
IN
T2
T4
T6
T8
T10
N/C
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC
T1
T3
T5
T7
T9
N/C
N/C
Military SMD
DDU7F-xxMC3
PIN DESCRIPTIONS
The DDU7F-series device is a 10-tap digitally buffered delay line. The
IN
Signal Input
signal input (IN) is reproduced at the outputs (T1-T10), shifted in time by an
T1-T10 Tap Outputs
amount determined by the device dash number. The nominal tap-to-tap
VCC +5 Volts
delay increment is given by 1/10 of the dash number. For dash numbers
GND Ground
less than 50, the total delay of the line is measured from T1 to T10, with the
nominal value given by 9 times the increment. The inherent delay from IN to T1 is nominally 3.5ns. For
dash numbers greater than or equal to 50, the total delay of the line is measured from IN to T10, with the
nominal value given by the dash number.
DASH NUMBER SPEC.’S
SERIES SPECIFICATIONS
•
•
•
•
•
•
Minimum input pulse width: 20% of total delay
Output rise time: 2ns typical
Supply voltage: 5VDC ± 5%
Supply current: ICCL = 50ma typical
ICCH = 15ma typical
Operating temperature: 0° to 70° C
Temp. coefficient of total delay: 100 PPM/°C
3.5ns
VCC IN
10%
T1
10%
T2
10%
T3
10%
T4
10%
T5
10%
T6
10%
T7
10%
T8
10%
T9
T10 GND
Functional diagram for dash numbers < 50
10%
VCC IN
10%
T1
10%
T2
10%
T3
10%
T4
10%
T5
10%
T6
10%
T7
10%
T8
Part
Number
DDU7F-10
DDU7F-20
DDU7F-25
DDU7F-50
DDU7F-100
DDU7F-150
DDU7F-200
DDU7F-250
DDU7F-300
DDU7F-400
DDU7F-500
Total
Delay (ns)
9 ± 2.0 *
18 ± 2.0 *
22.5 ± 2.0 *
50 ± 2.5
100 ± 5.0
150 ± 7.5
200 ± 10.0
250 ± 12.5
300 ± 15.0
400 ± 20.0
500 ± 25.0
Delay Per
Tap (ns)
1.0 ± 0.5
2.0 ± 1.0
2.5 ± 1.0
5.0 ± 2.0
10.0 ± 3.0
15.0 ± 3.0
20.0 ± 3.0
25.0 ± 3.0
30.0 ± 3.0
40.0 ± 4.0
50.0 ± 5.0
* Total delay is referenced to first tap
Input to first tap = 3.5ns ± 1ns
NOTE: Any dash number between 10 and
500 not shown is also available.
10%
T9
T10 GND
Functional diagram for dash numbers >= 50
1997 Data Delay Devices
Doc #97016
1/29/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
DDU7F
APPLICATION NOTES
Delay Devices if your application requires device
testing at a specific input condition.
HIGH FREQUENCY RESPONSE
The DDU7F tolerances are guaranteed for input
pulse widths and periods greater than those
specified in the test conditions. Although the
device will function properly for pulse widths as
small as 20% of the total delay and periods as
small as 40% of the total delay (for a symmetric
input), the delays may deviate from their values
at low frequency. However, for a given input
condition, the deviation will be repeatable from
pulse to pulse. Contact technical support at Data
POWER SUPPLY BYPASSING
The DDU7F relies on a stable power supply to
produce repeatable delays within the stated
tolerances. A 0.1uf capacitor from VCC to GND,
located as close as possible to the VCC pin, is
recommended. A wide VCC trace and a clean
ground plane should be used.
DEVICE SPECIFICATIONS
TABLE 1: ABSOLUTE MAXIMUM RATINGS
PARAMETER
DC Supply Voltage
Input Pin Voltage
Storage Temperature
Lead Temperature
SYMBOL
VCC
VIN
TSTRG
TLEAD
MIN
-0.3
-0.3
-55
MAX
7.0
VCC+0.3
150
300
UNITS
V
V
C
C
NOTES
10 sec
TABLE 2: DC ELECTRICAL CHARACTERISTICS
(0C to 70C, 4.75V to 5.25V)
PARAMETER
High Level Output Voltage
SYMBOL
VOH
Low Level Output Voltage
VOL
High Level Output Current
Low Level Output Current
High Level Input Voltage
Low Level Input Voltage
Input Clamp Voltage
Input Current at Maximum
Input Voltage
High Level Input Current
Low Level Input Current
Short-circuit Output Current
Output High Fan-out
Output Low Fan-out
IOH
IOL
VIH
VIL
VIK
IIHH
Doc #97016
1/29/97
IIH
IIL
IOS
MIN
2.5
TYP
3.4
MAX
UNITS
V
0.35
0.5
V
-1.0
20.0
0.8
-1.2
0.1
mA
mA
V
V
V
mA
20
-0.6
-150
25
12.5
µA
mA
mA
Unit
Load
2.0
-60
NOTES
VCC = MIN, IOH = MAX
VIH = MIN, VIL = MAX
VCC = MIN, IOL = MAX
VIH = MIN, VIL = MAX
VCC = MIN, II = IIK
VCC = MAX, VI = 7.0V
VCC = MAX, VI = 2.7V
VCC = MAX, VI = 0.5V
VCC = MAX
DATA DELAY DEVICES, INC.
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com
2
DDU7F
PACKAGE DIMENSIONS
14 13 12 11 10
9
8
Lead Material:
Nickel-Iron alloy 42
TIN PLATE
14 13 12 11 10
1
2
3
4
5
6
9
8
.440
MAX.
7
.280
MAX.
.780 MAX.
1
2
3
4
5
6
7
.830 MAX.
.290
MAX.
.030 .290
±.005 MAX.
.015 TYP.
.010±.002
.018
TYP.
.070 MAX.
.195
±.010
.350
MAX.
.600±.010
6 Equal spaces
each .100±.010
Non-Accumulative
.600
TYP.
.040
TYP.
14 13 12 11 10
9
.010 TYP.
2
.090
3
4
5
6
.040
TYP.
.020 TYP.
8
14 13 12 11 10 9
.270
TYP.
1
1
2
.110
.050
TYP.
DDU7F-xxA2 (Commercial Gull-Wing)
3
4
5
2
3
4
.040
TYP.
5
.090
6
7
.100
.700
.880±.020
7
.100
.600
.790 MAX.
.350
MAX.
.110
TYP.
.010±.002
9
.882
±.005
.710 .590
±.005 MAX.
1
6
DDU7F-xxB2 (Commercial J-Lead)
.020 TYP.
16 15 14 13 12 11 10
.320
TYP.
.270
TYP.
7
.300
MAX.
.050 TYP.
8
.430
TYP.
.100
.600
.790 MAX.
.300
TYP.
DDU7F-xxM (Military DIP)
DDU7F-xx (Commercial DIP)
.020 TYP.
.010 TYP.
.020
TYP.
.007
±.005
8
.280
MAX.
.050
±.010
DDU7F-xxMC3 (Military Gull-Wing)
Doc #97016
1/29/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
3
DDU7F
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
Ambient Temperature: 25oC ± 3oC
Supply Voltage (Vcc): 5.0V ± 0.1V
Input Pulse:
High = 3.0V ± 0.1V
Low = 0.0V ± 0.1V
Source Impedance:
50Ω Max.
Rise/Fall Time:
3.0 ns Max. (measured
between 0.6V and 2.4V )
Pulse Width:
PWIN = 1.5 x Total Delay
Period:
PERIN = 10 x Total Delay
OUTPUT:
Load:
Cload:
Threshold:
1 FAST-TTL Gate
5pf ± 10%
1.5V (Rising & Falling)
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
PRINTER
COMPUTER
SYSTEM
PULSE
GENERATOR
OUT
IN
TRIG
DEVICE UNDER
TEST (DUT)
T1
REF
T2
IN
T3
TRIG
TIME INTERVAL
COUNTER
T4
T5
T6
T7
T8
T9
T10
Test Setup
PERIN
PWIN
TRISE
INPUT
SIGNAL
TFALL
VIH
2.4V
1.5V
0.6V
2.4V
1.5V
0.6V
TRISE
OUTPUT
SIGNAL
VIL
TFALL
VOH
1.5V
1.5V
VOL
Timing Diagram For Testing
Doc #97016
1/29/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com
4
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