AKM AK9720 Ir sensor module with i2c i/f Datasheet

[AK9720]
AK9720 (Preliminary)
IR Sensor Module with I2C I/F
This specification is a design target, not guaranteed specifications for the final
product. Specifications are the subject to change without notice.
Description
The AK9720 is a slim and compact infrared-sensor module composed of a quantum IR
sensor and an integrated circuit for characteristic compensation. The IC generates an
analog signal that adjusts the infrared sensor’s offset and/or gain fluctuations and
temperature characteristics. An integrated analog-to-digital converter provides a 16-bit data
output. Additional integrated features include a field of view limiter structure and an optical
filter. The AK9720 enables new applications, including as remote temperature sensing,
stationary human detection, and proximity detection.
Features
 Quantum-type IR sensor: IR1011 Core
 Low voltage operation
VDD
+1.71 to +3.63V
Digital I/F
+1.65V to VDD
 Low current consumption: 100uA typ. (@ 330ms sampling period )
 16bit-ADC output to I2C bus
⇒Digital output simplifies system integration
 Fast response: TBD ms (@ sampling period)
 Selectable output: temperature compensated signal or bypass signal
 Integrated temperature sensor output
 When the compensated signal is selected, the output has been adjusted for offset/gain
variation and temperature sensitivity of IR sensors:
=> Simplifies heat design
=> No host processing needed for temperature compensated output
 Stationary human body detection algorithm available as reference software
 Slim, compact package with field of view limiter structure and optical filter
⇒Simplifies optical design
 Linear output correlated to target temperature
 Settings (including ON/OFF control and sampling rate) programmed through I2C bus
 Input level variations can be adjusted through a programmable gain stage
 INT pin goes high when the ADC output is ready to read
⇒Can be used as read-trigger for single shot mode, or interrupt of signal level
monitoring.
 Integrated power-on reset, and oscillator
 10pin SON Package
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Applications

Temperature Sensor

Human Presence Detection

Proximity Detection

Motion Sensor

etc…
Recommended Connection
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[AK9720]
Block Diagram
1. Block Diagram
VSS
VDD
DVDD
SOUT
INT
PD
TIA
PREAMP
TEMPERATURE
COMPENSATION
SCL
I2C
INTERFACE
MUX/ADC
SDA
CAD0
POR
TEMPERATURE
SENSOR
EEPROM
CAD1
OSC
TOUT
2. Block Functions
Block
PD
I/V
PREAMP
TEMPERATURE
COMPENSATION
TEMPERATURE
SENSOR
MUX/ADC
I2C Interface
EEPROM
OSC
POR
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Functions
IR1011 IR sensor core
Photocurrent of IR sensor is converted to voltage
Programmable gain amplifier to adjust the output level. Gain can
also be adjusted by register settings.
Preamp output is compensated for the ambient temperature and
linearized.
Built-in Temperature Sensor
Preamp output, linearized output, and built-in temperature sensor
output are multiplexed prior to the ADC.
Interface to external host controller
A flag is set when the measurement data is ready to be read.
SCL and SDA pins are provided for I2C interface. The interface
operates up to 400kHz rate and down to 1.65V low voltage condition.
EEPROM. Compensation data is stored in this non-volatile memory.
Internal oscillator
Power on reset
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Pin/Locations
TOUT
VDD
CAD0
CAD1
INT
1
2
3
4
5
10
9
8
7
6
VSS
SOUT
DVDD
SCL
SDA
Pin/Functions
Pin
Name
I/O
Function
No.
Integrated Temperature Sensor Analog Output
1
TOUT
O
LPF can be formed by the output resistance and an external
capacitor.
2
VDD
-
Analog Power Supply Pin
Slave address 0
3
CAD0
I
CAD should be connected to DVDD or Vss.
Set up an address so that two or more same addresses of
devices do not exist on the same bus.
Slave address 1
4
CAD1
I
CAD should be connected to DVDD or Vss.
Set up an address so that two or more same addresses of
devices do not exist on the same bus.
Interrupt output ( “H” active)
Function is selected by the interrupt pin select register
5
INT
O
(INTEN).
INT is High level, when read-out is ready or a target
temperature is over upper limit or lower limit.
I2C Data Output Pin
SDA is a bidirectional pin which is used to transmit data into
and out of the device. It is composed of a signal input and a
6
SDA
I/O
open drain output (N-type transistor).
SDA is connected to the DVDD voltage through a pull-up
resistance, and to open drain outputs or open collector outputs
of the other devices as “wire-ORed”.
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I2C Clock Input Pin
7
SCL
I
Signal processing is executed at rising edge and falling edge
of SCL clock. Therefore, observe rising time tR and falling
time tF.
8
DVDD
-
Digital I/F Power Supply Pin
Analog Signal Output
SOUT is PREAMP output or temperature compensated IR
9
SOUT
O
sensor output. SOUT should be connected to “Hi-Z” input.
LPF can be formed by the output resistance and an external
capacitor.
10
Rev.02
VSS
-
Ground pin
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Digital/Analog Output Select Function
Digital/Analog output select is controlled by CAD1 pin and CAD0 pin.
When CAD1 and CAD0 are set up to CAD1=CAD0=1, the output of SOUT and TOUT are
compulsorily set to “ON”, regardless of a setup of a register. SOUT outputs the temperature
compensated Analog signal.
When CAD1 and CAD0 are set up so that they are not set up to CAD1=CAD0=1, digital
signal can be used through I2C interface. When CAD1 and CAD0 are set up to
CAD1=CAD0=1, although I2C interface can be accessed at a slave address 67H, the
control by a register does not perform.
When CAD1 is set up to CAD1=1, Analog Signal Mode is selected, and ON/OFF of output
is selected by CAD0. SCL pin and SDA pin should be fixed to High level. (Don’t access to
I2C interface in Analog Output Mode.)
If CAD1 and CAD0 are set up to CAD1=CAD0=1 at the time of power supply starting
without using an I2C interface, and ON/OFF of Analog Output is changed by CAD0 after
power supply starting, then Analog Output OFF is selected, AK9720 becomes Power Down
Mode, because “MODE[2:0] =000” is an initial value.
CAD1
CAD0
Digital Output
Slave Address
Analog Output
0
0
Enable
64H
(OFF)
0
1
Enable
65H
(OFF)
1
0
Enable
66H
OFF
1
1
Disabled
(67H)
ON
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Absolute Maximum Rating
Parameter
Symbol
Min.
Power Supply
VSUP
Input Current
Input Voltage
Typ.
Max.
Unit
-0.6
4.6
V
IIN
-10
mA
VIN
-0.6
10
VDD+0.6
and
4.6
Note
V
Storage
TSTO
-40
85
C
Temperature
Note) Operation exceeding these ratings may cause permanent damage to device
Operational Conditions
Parameter
Symbol
Min.
Typ.
Max.
Unit
Power Supply
Digital Power
Supply
Operating
Temperature
VDD
1.71
3.0
3.6
V
DVDD
1.65
Vdd
V
TA
-30
85
C
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Power Supply Conditions
AC Characteristics (1)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Pin
VDD
Power Supply
Rise Time
PSUP1
50
ms
Power-on
Reset Time
PORT1
300
µs
Shutdown
Voltage
SDV1
0.2
V
VDD
Power Supply
Interval Time
PSINT1
µs
VDD
300
Note
Time until VDD pin is
set to VDD from 0.2V
*1 *2
Time until AK9720
becomes Power down
Mode after PSUP
*1, *2
Shutdown Voltage for
POR re-starting
*2
Voltage retention time
below SDV1 for POR
re-starting
*1 *2
*1 Reference data only, not tested
*2 Power-on Reset circuit detects the rising edge of VDD, resets the internal circuit, and
initializes the register. After Power-on reset, Power down Mode is selected.
PORT1: 300µs
Power down Mode
Power down Mode
VDD
SDV1: 0.2V
0V
PSUP1: 50ms
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PSINT1:300µs
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AC Characteristics (2)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Pin
Power Supply
Rise Time
PSUP2
50
ms
DVDD
Shutdown
Voltage
SDV2
0.2
V
DVDD
Power Supply
Interval Time
PSINT2
µs
DVDD
300
Note
Time until DVDD pin
is set to DVDD from
0.2V
*1
Shutdown Voltage for
Power Supply
Monitoring Circuit
re-starting
Voltage retention time
below SDV1 for
Power Supply
Monitoring Circuit
re-starting
*1
*1 Reference data only, not tested
DVDD
SDV2: 0.2V
0V
PSUP2: 50ms
Rev.02
PSINT2: 300µs
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Analog Characteristics
Unless otherwise specified, VDD = 1.71 to 3.63V, DVDD = 1.65V to VDD;
Ta = -30 to +85℃
Normal mode selects linearized output for the ADC.
Bypass mode selects Preamp output.
Parameter
Target
Temperature1
Target
Temperature2
Preamp Gain
adjustment
range
Preamp Gain
adjustment
accuracy
IR output
resolution
SOUT output
code
(SOUT AD
code)
Symbol
Min.
TOBJ1
TOBJ2
Max.
Unit
0
100
C
0
40
C
Temperature
sensor
accuracy
Temperature
sensor
sensitivity
SOUT Output
Resistance
SOUT Output
Resistance
Measurement
time
Field of View
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Note
TA = -30C to 85C
Normal mode
TA = 0C to 60C
Bypass mode
TBD
0.25
%
16
bits
-10
30
110
C
TBD
TBD
TBD
Code
Temperature
output
resolution
Temperature
sensor range
Typ.
16
For adjustment target
Normal mode,
Linear to target temperature
(excludes noise)
bits
-40
95
C
TBD
TBD
code
TBD
C
TBD
LSB/
C
10
kΩ
10
kΩ
TBD
ms
±30
°
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TA=30C
Single shot mode
50% output
(FWHM)
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[AK9720]
Digital Characteristics
1) EEPROM
Unless otherwise specified, VDD = 1.71 to 3.63V, DVDD = 1.65V to VDD;
Ta = -30 to +85C
Item
Code
Min.
EEPROM retention time
@Ta=85C
Ehold
10
Typ.
Max.
Unit
years
2) DC Characteristics
Unless otherwise specified VDD = 1.71 to 3.63V, DVDD = 1.65 to VDD;
Ta = -30 to +85C
Parameter
High Level Input
Voltage1
Low Level Input
Voltage1
High Level Input
Voltage2
Low Level Input
Voltage2
Hysteresis voltage
(Note)
Low level output
voltage 1
High level output
voltage
Low level output
voltage 2
Symbol
Conditions
VIH1
Min.
20%DVD
D
DVDD+0.
5
30%DVD
D
VIL1
VIH2
70%DVDD
VIL2
-0.5
DVDD>=2V
DVDD<2V
IOL = 3mA,
DVDD >=2V
5%DVDD
10%DVDD
VOH2
IOH = -200µA
80%DVDD
VOL2
IOL = 200µA
VHS
VOL1
Max.
80%DVDD
-
Power down
mode
Current
Normal mode
IDD2
Consumption
Operation
Bypass mode
IDD3
Operation
Interval 1
IDD4
(Normal mode)
Interval 2
IDD5
Averaged Current
(Normal mode)
Consumption
Interval 1
( Interval Operation )
IDD6
(Bypass mode)
Interval 2
IDD7
(Bypass mode)
(Note) Reference data only, not tested
IDD1
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Typ.
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0.4
-
0.4
Unit
Note
V
CAD1,CAD0
V
CAD1,CAD0
V
SCL,SDA
V
SCL,SDA
V
V
SCL,SDA
SCL,SDA
V
SDA
V
INT
V
INT
55
µA
1.3
mA
1.0
mA
800
µA
110
µA
560
µA
80
µA
Min. Interval
(20ms)
Max. Interval
(330ms)
Min. Interval
(20ms)
Max. Interval
(330ms)
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3) Digital AC Characteristics (1):Standard mode (100kHz)
Unless otherwise specified VDD = 1.71 to 3.63V, DVDD = 1.65 to VDD;
Ta = -30 to +85C
Parameter
Code
SCL frequency
Noise suppression time
SDA bus idle time to the next
command input
Start condition Hold time
Clock low period
Clock high period
Start condition set-up time
Data hold time
Data setup time
Rise time
SDA, SCL note)
Fall time
SDA, SCL note)
Stop condition setup time
fSCL
tI
Min.
Typ.
Max.
Unit
100
50
kHz
ns
tBUF
4.7
µs
tHD:STA
tLOW
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
4.0
4.7
4.0
4.7
0
250
µs
µs
µs
µs
µs
ns
tR
1.0
µs
tF
0.3
µs
tSU:STO
4.0
µs
Note) Reference data only, not tested
4) Digital AC Characteristics (2): Fast mode (400kHz)
Unless otherwise specified, VDD = 1.71 to 3.63V, DVDD = 1.65 to VDD;
Ta = -30 to +85C
Parameter
Code
SCL Frequency
Noise suppression time
SDA bus idle time to the nest
Min.
Typ.
Max.
Unit
fSCL
400
kHz
tI
50
ns
tBUF
1.3
µs
Start condition hold time
tHD:STA
0.6
µs
Clock low period
tLOW
1.3
µs
Clock high period
tHIGH
0.6
µs
Start condition set-up time
tSU:STA
0.6
µs
Data in hold time
tHD:DAT
0
µs
Data in setup time
Rise time
SDA, SCL (note)
Fall time
SDA, SCL (note)
Stop condition setup time
tSU:DAT
100
ns
command input
tR
0.3
µs
tF
0.3
µs
tSU:STO
0.6
µs
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Note) Reference data not tested
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tF
tHIGH
tLOW
tR
SCL
tSU:STA
tHD:STA
tHD:DAT
tSU:DAT
tSU:STO
SDA IN
tDH
tBUF
SDA OUT
Bus Timing
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Functional Descriptions
1. Power Supply State
When VDD and DVDD turn on from the state of VDD = OFF (0V) and DVDD = OFF (0V),
power on reset (POR) is automatice all registers will be initialized, and the AK9720 will shift
to Power down Mode.
Although all states of the following table can exist, the changes to state 3 from state 2 and
the changes to state 2 from state 3 are prohibited.
State
VDD
DVDD
1
OFF (0V)
OFF(0V)
Power Supply State
OFF (0V)
I2C bus is open.
OFF (0V)
I2C bus is open.
2
OFF (0V)
1.65 to 3.63V
INT pin = Low Level
*This is not the recommended operational
condition.
OFF (0V).
3
1.71 to 3.63V
OFF(0V)
The current consumption is as same as
Power down Mode.
I2C bus is open.
4
1.71 to 3.63V
1.65V to VDD
ON
2. Reset Function
When the power supply is in an ON state, set up DVDD lower than VDD (DVDD<=VDD) .
Power-on reset (POR) works until VDD reaches the operating voltage (about 1.4V: design
reference). After POR, all registers are set to initial values, and Power down Mode is
selected.
When VDD is between 1.71V and 3.63V, POR circuit and DVDD monitor circuit are
operational. When DVDD=0V, the current consumption is identical to as Reset State,
because AK9720 is in Reset State.
AK9720 has three reset functions.
(1) Power-on Reset (POR)
POR circuit resets AK9720 by detecting VDD rising.
(2)DVDD Monitor
When DVDD is in OFF (0V), AK9720 is reset.
(3)Soft Reset
When the SRST bit is set, AK9720 is reset.
When AK9720 is reset, all registers are set to initial values, and Power down Mode is
selected.
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3. Operating Mode
AK9720 has five operating modes as below.
(1) Power down Mode
(2) Single shot Mode
(3) Continuous Mode1
(4) Continuous Mode2
(5) EEPROM access Mode
Operating mode can be selected by setting the MODE [2:0] bit of CNTL1 register.
MODE[2:0]=“001”
Power down
Mode
MODE[2:0]=“000”
Automatic Shift
MODE[2:0]=“010”
MODE[2:0]=“000”
MODE[2:0]=“011”
MODE[2:0]=“000”
MODE[2:0]=“100”
MODE[2:0]=“000”
Single shot Mode
Measurement is done once, and Power down Mode
is automatically selected after outputting the
measurement data.
Continuous Mode1
Measurement is automatically repeated.
Power down Mode is selected by setting
MODE[2:0] to“000”
Continuous Mode2
Measurement is automatically repeated in an
intermittent operation.
Power down Mode is selected by setting
MODE[2:0] to“000”
EEPROM Access Mode
EEPROM read-out circuit goes on.
Power down Mode is selected by setting
MODE[2:0] to“000”
Digital Mode
( Back from the analog output mode
defined in MODE[2:0] registers )
CAD1=1
and
CAD0=1
CAD1=0
or
CAD0=0
Analog Output Mode
Regardless of the data in MODE[2:0], mode status is masked to operation , and
analog outputs are shown on SOUT,TOUT pins whatever STOBEN is.
Fig.1. Operation MODE
When the power supply turns on, the AK9720 is in Power down Mode. According to
MODE[2:0] setup,, the AK9720 shifts to the selected mode, and starts operating. Set the
AK9720 to Power down Mode before changing this register setting.
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4. Explanation for Each Operating Mode
4.1 Power down Mode (MODE [2:0] =”000”)
Power supply to most internal circuits is turned off. All registers can be accessed in Power
down Mode. Read/Write register data are retained, and reset by software reset. However,
EEPROM data cannot be read. Reading EEPROM data must be done in EEPROM Access
Mode.
4.2 EEPROM Access Mode (MODE [2:0] =”100”)
When MODE [2:0] is changed from Power down Mode (MODE [2:0] =”000”) to MODE
[2:0]=”100” , the AK9720 shifts to EEPROM Access Mode. Reading EEPROM data should
be done in EEPROM Access Mode. Measurement is not done in EEPROM Access Mode.
4.3 Single shot Mode (MODE [2:0] =”001”)
When AK9720 is set to Single shot Mode (MODE [2:0] =”001”), a measurement and
signal processing are done, then the measurement data (IRSL to TMPH data) are stored to
the measurement data registers, and the AK9720 shifts to Power down Mode automatically.
When the AK9720 shifts to Power down Mode, MODE [2:0] changes to ”000”.
Simultaneously, the DRDY bit of ST1 register changes to “1”. This is called “Data Ready”.
If either the measurement data register (IRSL to TMPH) or ST2 register is read out in “data
ready” state, the DRDY bit changes to “0”. When the AK9720 shifts from Power down
Mode to other modes, the DRDY bit retains “1”.
Measurement data register retains previous data, within the measurement period.
Measurement data can be read out in the measurement period. When measurement data
is read out in a measurement period, the previous data retained is read out.
Operating mode :
Single Measurement
Power down
(1)
(2)
(3)
Measurement Period
Measurement data register
data(1)
data(2)
data(3)
DRDY
Read-out data
data(1)
ST1
Register Write
MODE[2:0]="001"
data(3)
ST2
MODE[2:0]="001"
ST1
MODE[2:0]="001"
Fig.2. Single shot Mode (when measurement data is read, out of the measurement period.)
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Operating mode:
Power down
Single Measurement
(1)
(2)
Measurement Period
Measurement data register
data(1)
(3)
data(2)
data(3)
DRDY
Read-out data
Register Write
data(1)
ST1
MODE[2:0]="001"
MODE[2:0]="001"
ST2
MODE[2:0]="001"
Fig.3. Single shot Mode (when measurement data is read out within the measurement
period.)
4.4 Continuous Measurement Mode1 (MODE [2:0] =”010”)
When the AK9720 is set to Continuous Measurement Mode1 (MODE [2:0] =”010”), the
measurement is automatically repeated. When a measurement and data processing have
been done, the measurement data is stored to the measurement data register (IRSL to
TMPH data), and the measurement is started again.
Measurement Mode is finished by setting the AK9720 to Power down Mode (MODE [2:0]
=”000”).
(N-1)
Measurement
N
(N+1)
Measurement
Measurement
(N+2)
(N+3)
Measurement
Measurement
(N+4)
Measurement
Fig.4. Continuous Measurement Mode1
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[AK9720]
4.5 Continuous Measurement Mode2 (MODE [2:0] =”011”)
When the AK9720 is set to Continuous Measurement Mode2 (MODE [2:0] =”011”), the
measurement is repeated according to the power down time (TBD Hz). When the
measurement and data processing have been done, the measurement data is stored to the
measurement data register (IRSL to TMPH data), and all circuits except those for the
periodic measurement transition to Stand-by(SB) state. The circuits that are in
Stand-by(SB) state are returned to active mode by detecting the next measurement time,
and the measurement is started again.
Measurement Mode is finished by setting the AK9720 to Power down Mode (MODE [2:0]
=”000”).
(N-1)
SB
N
Measurement
( defined by
FRATE[2:0] )
SB
(N+1)
Measurement
SB
( defined by STB[2:0] )
Fig.5. Continuous Measurement Mode2
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5. Data Ready
When measurement data is stored to the measurement data registers, the DRDY bit of
the ST1 register changes to “1”. This state is called “Data Ready”. It can be set up so that
the INT pin outputs "High", when the DRDY bit is "1", by setting up the interruption register.
Read-out procedure is detailed here. (Single shot Mode is is used as an example.)
The same procedure can also be applied to the Continuous Measurement Mode1 and
Continuous Measurement Mode2.
5.1 Normal Read-out Procedure
(1) Read-out ST1 registers
DRDY: DRDY shows whether the state is “Data Ready” or not.
DRDY ="0" means “No Data Ready”.
DRDY ="1" means “Data Ready”.
DOR: DOR shows whether there are any data which was not read out before initiating
the current read.
DOR="0" means that there are no data which was not read out before initiating
the current read.
DOR="1" means that there are data which was not read out before initiating the
current read.
(2) Read the measurement data
Once a data read is initiated fromone of the measurement data registers (IRSL to TMPH)
or the ST2 register, the AK9720 recognizes that a data read-out has begun. When a data
read-out is initiated, DRDY and DOR change to “0”.
(3) Read ST2 Resisters (Required Operation)
The AK9720 recognizes that a data read-out has finished by reading out the ST2 registers.
Because the measurement data registers are protected while reading out, data is not
updated. Data protection of the measurement data register is canceled by reading out the
ST2 register. The ST2 register must be read out after accessing the measurement data
register.
(N-1)
PD
(N)
(N+1)
PD
Measurement
PD
Measurement
Measurement data register
data(N-1)
data(N)
data(N+1)
DRDY
Read-out data
ST1
data(N)
ST2
ST1
data(N+1)
ST2
Fig.6. Normal Read-out Procedure
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5.2 Read-out data within a measurement period
The measurement data register is retained within a measurement period, so the data can
be read out within the measurement period. When data is read out within the measurement
period, the previous data retained is read out.
(N-1)
PD
(N)
(N+1)
SD
Measurement
SD
Measurement
Measuremant data register
data(N-1)
data(N)
DRDY
ST1
Read-out data
data(N)
ST2
ST1
data(N)
ST2
Fig.7. Read-out data within a measurement period
5.3 Skipping Data
When measurement data is not read out between the end points of (N+1)th and Nth
measurement, DRDY is held the until measurement data is read out. In this case, because
the Nth data was skipped, the DRDY bit is “1”. (Fig.8)
When a data read begins after the end of the Nth measurement, and when the data read
cannot be completed until the end of the (N+1) th measurement, the measurement data
registers are protected to read data normally. In this case, because the (N+1) th data has
been skipped, the DOR bit transitions to “1”. (Fig.9)
In both of these cases, the DOR bit changes to “0” from “1”, at the start of reading data if
DRDY is “1”.
(N-1)
PD
(N)
Measurement
(N+1)
PD
Measurement
Measurement data registers
data(N-1)
data(N)
PD
data(N+1)
DRDY
DOR
Read-out data
ST1
data(N+1)
ST2
Fig.8. Skipping Data
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[AK9720]
(N-1)
PD
(N)
Measurement
(N+1)
Measurement
PD
PD
(N+2)
Measurement
Measurement data register
data(N-1)
data(N)
PD
data(N+2)
Data register is protected due to the reading
DRDY does not become "Data Ready",
because data is not updated
DRDY
Skip (N+1)th data
DOR
Read-out Data
ST1
data(N)
ST2
ST1
data(N+2)
Fig.9. When the data read cannot be completed until the beginning of the next
measurement
5.4 End Operation
Select Power down Mode (MODE [2:0] =”000”) to complete the Continuous Measurement
Mode.
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[AK9720]
Serial Interface
The I2C bus interface of the AK9720 supports Standard Mode (Max. 100kHz) and High
Speed Mode (Max.400 kHz).
1. Data Transfer
Initially, the start condition should be input to access the AK9720 through the bus. Next,
send a one byte slave address, which includes the device address. The the AK9720
compares the slave address, and if these addresses match, the AK9720 generates an
acknowledge signal and executes a Read/Write instruction. The stop condition should be
input after executing an instruction.
1.1 Changing state of the SDA line
The SDA line state should be changed only while the SCL line is “Low”. The SDA line
state must be maintained while the SCL line is “High”.
The SDA line state can be changed while the SCL line is “High”, only when a Start
Condition or a Stop Condition is input.
SCL
SDA
Constant
Changing
State
Enable
Fig.1. Changing state of SDA line
1.2 Start/Stop Conditions
A Start condition is generated when the SDA line state is changed from “High” to “Low”
while the SCL line is “High”. All instructions start from a Start condition.
A Stop condition is generated when the SDA line state is changed from “Low” to “High”
while the SCL line is “High”. All instructions end after a Stop condition.
SCL
SDA
Start Condition
Stop Condition
Fig.2. Start/Stop Conditions
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1.3 Acknowledge
The device transmitting data will release the SDA line after transmitting one byte of data
(SDA line state is “High”). The device receiving data will pull the SDA line to “Low” during
the next clock. This operation is called “Acknowledge”. The Acknowledge signal can be
used to indicate successful data transfers.
The AK9720 will output an acknowledge signal after receiving a Start condition and the
Slave address.
The AK9720 will output an acknowledge signal after receiving each byte, when the
WRITE instruction is transmitted.
The AK9720 will transmit the data stored in the selected address after outputting an
acknowledge signal, when a READ instruction is transmitted. Then the AK9720 will monitor
the SDA line after releasing the SDA line. If the master device generates an Acknowledge
instead of a Stop condition, the AK9720 transmits an 8-bit data stored in the next address.
When the Acknowledge is not generated, transmitting data is terminated.
Clocl pulse for
Acknowledge
SCL of Master
Device
1
8
9
Data Output of
Transmitter
Non-Acknowledge
Data Output of
Receiver
Start Condition
Acknowledge
Fig.3. Acknowledge
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[AK9720]
1.4 Slave Address
The Slave address of the AK9720 can be selected from the following list by setting the
CAD0/1 pins.
When the CAD0/1 pins are connected to VSS, the Slave address bit is “0”. When the
CAD0/1 pins are connected to DVDD, the Slave address bit is “1”. Do not set up
“CAD1=CAD0=1” while the I2C interface is used, because the “CAD1=CAD0=1” state is
only for Analog Output Mode.
CAD1
0
0
1
1
CAD0
0
1
0
1
Slave Address
64H
65H
66H
Analog Output Mode Only
Table1. Setting CAD0/1 for Slave Address
When the first one byte data including the Slave address is transmitted after a Start
condition, the device, which is specified as the communicator by the Slave address on the
bus, is selected.
After transmitting the Slave address, the device that has the corresponding device
address will execute a instruction after transmitting an Acknowledge signal. The 8 th bit
(Least Significant Bit-LSB) of the first one byte is the R/W bit.
When the R/W bit is set to “1”, a READ instruction is executed. When the R/W bit is set to
“0”, a WRITE instruction is executed.
MSB
1
LSB
1
0
0
1
CAD1
CAD0
R/W
Fig.4. Slave Address
1.5 WRITE Instruction
When the R/W bit is set to “0”, the AK9720 executes a WRITE Operation.
The AK9720 will output an Acknowledge signal and receive the second byte, after
receiving a Start condition and first one bit (Slave address) in a WRITE Operation. The
second byte has an MSB-first configuration, and specifies the address of the internal
control register.
MSB
A7
LSB
A6
A5
A4
A3
A2
A1
A0
Fig.5. Register Address
The AK9720 will generate an Acknowledge and receive the third byte after receiving the
second byte (Register Address).
The data after the third byte is the control data. The control data consists of 8-bits and has
an MSB-first configuration. The AK9720 generates an Acknowledge for each byte
received. The data transfer is terminated by the Stop condition, which is generated by the
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[AK9720]
master device.
MSB
D7
LSB
D6
D5
D4
D3
D2
D1
D0
Fig.6. Control data
Two or more bytes can be written to the AK9720 at once.
The AK9720 generates an Acknowledge and receives the next data after receiving the
third byte (Control Data). When the following data is transmitted without a Stop condition,
after transmitting one byte, the internal address counter is automatically incremented, and
data is written in the next address.
The automatic increment function works in the address from 00H to 14H and the address
from 15H to 18H. When the start address is “00H”, the address is repeatedly incremented
as follows: “00H -> 01H -> ... -> 14H -> 00H -> 01H ...”. When the start address is “15H”,
the address is repeatedly incremented as follows: “15H -> 16H -> ... -> 18H -> 15H ->
16H ...”.
S
T
A
R
T
SDA
S
S
T
O
P
R/W=0
Slave
Address
Register
Address(n)
A
C
K
Data(n)
A
C
K
Data(n+1)
A
C
K
Data(n+x)
A
C
K
A
C
K
P
A
C
K
Fig.7. WRITE Operation
2. READ Instruction
When the R/W bit is set to “1”, the AK9720 executes a READ Operation.
When the AK9720 transmits the data from the specified address, and then the master
device generates an Acknowledge instead of a Stop condition, the next address data can
be read out.
The AK9720 supports both current address read and random address read.
The automatic increment function works in the address of 00H to 13H, and the address of
14H to 16H.
When the address 13H is read out, the next address returns to 00H.
When the address 16H is read out, the next address returns to 14H.
2.1 Current Address Read
The AK9720 has an integrated address counter. The data specified by the counter is read
out in the current address read operation. The internal address counter retains the next
address which is accessed at last.
For example, when the address which was accessed last was ”n”, the data of address
“n+1” is read out by the current address read instruction.
The AK9720 will generate an Acknowledge after receiving a Slave address for a Read
instruction (R/W bit =”1”) in the current address read operation. Then, the AK9720 will start
to transmit the data specified by the internal address counter at the next clock, and will
increment the internal address counter by one.
When the AK9720 generates a Stop condition instead of an Acknowledge after
transmitting the one byte data, a Read out operation is terminated.
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[AK9720]
S
T
A
R
T
SDA
S
S
T
O
P
R/W="1"
Slave
Address
Data (n)
A
C
K
Data (n+2)
Data (n+1)
A
C
K
A
C
K
Data (n+x)
A
C
K
P
A
C
K
Fig.8. Current Address Read
2.2 Random Read
Data from an arbitrary address can be read out by a random read operation.
A random read requires the input of a dummy WRITE instruction before the input of a
slave address of a READ instruction (R/W bit=“1”). To execute a random read, first
generate a start condition, then input the slave address for a WRITE instruction (R/W
bit=“0”) and a read address, sequentially.
After the AK9720 generates an Acknowledge in response to this address input, generate
a start condition and the slave address for a READ instruction (R/W bit=“1”) again. The
AK9720 generates an Acknowledge in response to the input of this slave address. Next,
the AK9720 outputs the data at the specified address, then increments the internal address
counter by one.
When a Stop condition from the master device is generated instead of an Acknowledge
after the AK9720 outputs data, the Read operation stops.
S
T
A
R
T
SDA
S
S
T
A
R
T
R/W="0"
Register
Address (n)
Slave
Address
A
C
K
S
A
C
K
S
T
O
P
R/W="1"
Slave
Address
Data (n)
A
C
K
Data (n+1)
A
C
K
Data (n+x)
A
C
K
P
A
C
K
Fig.9. Random Read
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Package Information
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Spectrum Sensitivity (reference)
Note) Conditions; Sensor Temperature Ts=25C (298K), 1Hz Chopping
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[AK9720]
Field of View
Item
FOV
Code
MIN
TYP
(reference)
MAX
±30
Unit
Remarks
°
50% output (FWHM)
1.2
1
Vsout/Vmax
0.8
0.6
0.4
0.2
0
-90 -80 -70 -60 -50 -40 -30 -20 -10
0
10 20 30 40 50 60 70 80 90
θ [degree]
Note) Conditions: Blackbody Cavity: 227C (500K), Aperture Diameter: 6.4mm,
Distance from sensor and Blackbody Cavity: 100mm,
Sensor Temperature: Ts=25C (298K), 10Hz Chopping
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[AK9720]
Application Notes
1. Remote Temperature Sensing
*Measurement Accuracy of SOUT (normal mode, reference data only, not tested )
±3 C @ Ta=0°C to 50°C, Tobj=20°C to 40°C
±5C @ Ta=0°C to 50°C, Tobj=0°C to 20°C, or 40°C to 100°C
Assembly guideline will be supplied later.
2. Stationary Human Body Detection
*Detection algorithm reference software is available by request
3. Clock Frequency of I2C Interface (reference)
W hen the clock frequency of the I2C interface is outside of the frequency band from
333.7 kHz to 400 kHz, noise may increase.
4. Assembly Guideline
TBD
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[AK9720]
IMPORTANT NOTICE
 These products and their specifications are subject to change without notice.
When you consider any use or application of these products, please make inquiries the
sales office of Asahi Kasei Microdevices Corporation (AKM) or authorized distributors
as to current status of the products.
 Descriptions of external circuits, application circuits, software and other related
information contained in this document are provided only to illustrate the operation and
application examples of the semiconductor products. You are fully responsible for the
incorporation of these external circuits, application circuits, software and other related
information in the design of your equipments. AKM assumes no responsibility for any
losses incurred by you or third parties arising from the use of these information herein.
AKM assumes no liability for infringement of any patent, intellectual property, or other
rights in the application or use of such information contained herein.
 Any export of these products, or devices or systems containing them, may require an
export license or other official approval under the law and regulations of the country of
export pertaining to customs and tariffs, currency exchange, or strategic materials.
 AKM products are neither intended nor authorized for use as critical components Note1) in
any safety, life support, or other hazard related device or system Note2), and AKM
assumes no responsibility for such use, except for the use approved with the express
written consent by Representative Director of AKM. As used here:
Note1) A critical component is one whose failure to function or perform may
reasonably be expected to result, whether directly or indirectly, in the loss of the
safety or effectiveness of the device or system containing it, and which must
therefore meet very high standards of performance and reliability.
Note2) A hazard related device or system is one designed or intended for life
support or maintenance of safety or for applications in medicine, aerospace,
nuclear energy, or other fields, in which its failure to function or perform may
reasonably be expected to result in loss of life or in significant injury or damage to
person or property.
 It is the responsibility of the buyer or distributor of AKM products, who distributes,
disposes of, or otherwise places the product with a third party, to notify such third party
in advance of the above content and conditions, and the buyer or distributor agrees to
assume any and all responsibility and liability for and hold AKM harmless from any and
all claims arising from the use of said product in the absence of such notification.
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