IRF IRFHS8342PBF Compatible with existing surface mount technique Datasheet

IRFHS8342PbF
HEXFET® Power MOSFET
VDS
30
V
VGS max
±20
V
RDS(on) max
16.0
mΩ
(@VGS = 10V)
T OP VIEW
D 1
4.2
(@VGS = 4.5V)
ID
(@Tc(Bottom) = 25°C)
8.5
D
D
S
G 3
G
5 D
nC
d
D
D
D 2
Qg(typical)
D
6 D
4 S
D
S
S
2mm x 2mm PQFN
A
Applications
• Control MOSFET for Buck Converters
• System/Load Switch
Features and Benefits
Features
Low RDSon (≤ 16.0mΩ)
Low Thermal Resistance to PCB (≤ 13°C/W)
Low Profile (≤ 1.0 mm)
Compatible with Existing Surface Mount Techniques
RoHS Compliant Containing no Lead, no Bromide and no Halogen
MSL1, Industrial Qualification
Orderable part number
Package Type
IRFHS8342TRPbF
IRFHS8342TR2PbF
PQFN 2mm x 2mm
PQFN 2mm x 2mm
results in
Resulting Benefits
Lower Conduction Losses
Enable better thermal dissipation
Increased Power Density
Easier Manufacturing
Environmentally Friendlier
Increased Reliability
Standard Pack
Form
Quantity
Tape and Reel
4000
Tape and Reel
400
Note
EOL notice # 259
Absolute Maximum Ratings
Parameter
Max.
VDS
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC(Bottom) = 25°C
ID @ TC(Bottom)= 70°C
ID @ TC(Bottom) = 25°C
IDM
PD @TA = 25°C
PD @TA = 70°C
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
Power Dissipation
Power Dissipation
TJ
TSTG
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Notes  through
1
f
f
c
f
30
±20
8.8
Units
V
d
7.1
19
15
8.5
d
d
d
76
2.1
1.3
0.02
-55 to + 150
A
W
W/°C
°C
are on page 2
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IRFHS8342PbF
Static @ TJ = 25°C (unless otherwise specified)
BVDSS
ΔΒVDSS/ΔTJ
RDS(on)
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
VGS(th)
ΔVGS(th)
IDSS
Gate Threshold Voltage
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Output Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
gfs
Qg
Qg
Qgs
Qgd
Qoss
RG
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Min.
30
–––
–––
–––
1.35
–––
–––
–––
–––
–––
18
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
22
13
20
1.8
-5.8
–––
–––
–––
–––
–––
4.2
8.7
1.5
1.3
3.0
1.9
5.9
15
5.2
5.0
600
100
46
Max. Units
Conditions
–––
V VGS = 0V, ID = 250μA
––– mV/°C Reference to 25°C, ID = 1mA
VGS = 10V, ID = 8.5A
16
mΩ
25
VGS = 4.5V, ID = 6.8A
2.35
V
V = VGS, ID = 25μA
––– mV/°C DS
1.0
VDS = 24V, VGS = 0V
μA
150
VDS = 24V, VGS = 0V, TJ = 125°C
100
VGS = 20V
nA
-100
VGS = -20V
–––
S VDS = 10V, ID = 8.5A
–––
nC VGS = 4.5V, VDS = 15V, ID = 8.5A
–––
VDS = 15V
nC VGS = 10V
–––
ID = 8.5A (See Fig. 6 & 16)
–––
–––
nC VDS = 16V, VGS = 0V
Ω
–––
VDD = 15V, VGS = 4.5V
–––
ID = 8.5A
–––
ns
–––
RG=1.8Ω
–––
See Fig.17
–––
VGS = 0V
–––
pF VDS = 25V
ƒ = 1.0MHz
–––
Min.
Typ.
Max.
–––
–––
8.5
–––
–––
76
ed
e
d
d
d
e
d
Diode Characteristics
IS
Parameter
Continuous Source Current
ISM
(Body Diode)
Pulsed Source Current
VSD
trr
Qrr
ton
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
c
d
Units
A
Conditions
MOSFET symbol
showing the
integral reverse
D
G
S
p-n junction diode.
–––
–––
1.0
V TJ = 25°C, IS = 8.5A , VGS = 0V
–––
11
17
ns TJ = 25°C, IF = 8.5A , VDD = 15V
–––
13
20
nC di/dt = 330A/μs
Time is dominated by parasitic Inductance
d
d
e
e
Thermal Resistance
RθJC (Bottom)
RθJC (Top)
RθJA
RθJA
Parameter
Junction-to-Case
Junction-to-Case
Junction-to-Ambient
Junction-to-Ambient (<10s)
g
g
f
f
Typ.
–––
–––
–––
–––
Max.
13
90
60
42
Units
°C/W
Notes:
 Repetitive rating; pulse width limited by max. junction temperature.
‚ Current limited by package.
ƒ Pulse width ≤ 400μs; duty cycle ≤ 2%.
„ When mounted on 1 inch square copper board
Rθ is measured at TJ of approximately 90°C.
2
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IRFHS8342PbF
100
100
10
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
10V
7.0V
5.0V
4.5V
3.5V
3.3V
2.8V
2.5V
1
2.5V
BOTTOM
10
2.5V
≤60μs PULSE WIDTH
1
0.1
0.1
1
10
0.1
100
1
10
100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
100
1.8
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current(A)
≤60μs PULSE WIDTH
Tj = 150°C
Tj = 25°C
TJ = 150°C
10
TJ = 25°C
VDS = 15V
≤60μs PULSE WIDTH
1.0
ID = 8.5A
VGS = 10V
1.6
1.4
1.2
1.0
0.8
0.6
2.0
3.0
4.0
5.0
6.0
-60 -40 -20 0
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
10000
14
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
1000
Ciss
Coss
100
20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
C, Capacitance (pF)
VGS
10V
7.0V
5.0V
4.5V
3.5V
3.3V
2.8V
2.5V
Crss
ID= 8.5A
12
10
VDS = 24V
VDS = 15V
VDS = 6.0V
8
6
4
2
0
10
0
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage
3
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2
4
6
8
10
12
QG Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
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IRFHS8342PbF
1000
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
100
TJ = 150°C
10
TJ = 25°C
1
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100
100μsec
10
1
Tc = 25°C
Tj = 150°C
Single Pulse
VGS = 0V
0.1
10msec
Limited by
Wire Bond
1msec
DC
0.1
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0.1
1.1
1
10
100
VDS, Drain-to-Source Voltage (V)
VSD, Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
20
2.2
VGS(th), Gate threshold Voltage (V)
LIMITED BY PACKAGE
ID, Drain Current (A)
16
12
8
4
0
25
50
75
100
125
2.0
ID = 25μA
1.8
1.6
1.4
1.2
1.0
150
-75 -50 -25
TC, Case Temperature (°C)
0
25
50
75 100 125 150
TJ , Temperature ( °C )
Fig 9. Maximum Drain Current vs.
Case (Bottom) Temperature
Fig 10. Threshold Voltage vs. Temperature
Thermal Response ( Z thJC ) °C/W
100
10
D = 0.50
0.20
0.10
0.05
1
0.02
0.01
0.1
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.01
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case (Bottom)
4
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IRFHS8342PbF
( Ω)
RDS(on), Drain-to -Source On Resistance m
RDS(on), Drain-to -Source On Resistance (mΩ)
35
ID = 8.5A
30
25
20
TJ = 125°C
15
10
TJ = 25°C
5
0
5
10
15
20
30
Vgs = 4.5V
25
20
15
Vgs = 10V
10
5
0
10
20
30
40
50
60
70
ID, Drain Current (A)
VGS, Gate -to -Source Voltage (V)
Fig 13. Typical On-Resistance vs. Drain Current
Fig 12. On-Resistance vs. Gate Voltage
600
Single Pulse Power (W)
500
400
300
200
100
0
1E-5
1E-4
1E-3
1E-2
1E-1
1E+0
Time (sec)
Fig 14. Typical Power vs. Time
D.U.T
Driver Gate Drive
ƒ
+
‚
-
P.W.
+
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
• dv/dt controlled by RG
• Driver same type as D.U.T.
• I SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
V DD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
„
-
D=
Period
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
5
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IRFHS8342PbF
Id
Vds
Vgs
L
VCC
DUT
0
1K
Vgs(th)
S
Qgs1 Qgs2
VGS
RG
RD
VDS
90%
D.U.T.
+
-V DD
V10V
GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1
Fig 17a. Switching Time Test Circuit
6
Qgodr
Fig 16b. Gate Charge Waveform
Fig 16a. Gate Charge Test Circuit
VDS
Qgd
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10%
VGS
td(on)
tr
td(off)
tf
Fig 17b. Switching Time Waveforms
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IRFHS8342PbF
PQFN 2x2 Outline Package Details
For footprint and stencil design recommendations, please refer to application note AN-1154 at
http://www.irf.com/technical-info/appnotes/an-1154.pdf
PQFN 2x2 Outline Part Marking
8342
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
7
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IRFHS8342PbF
PQFN 2x2 Outline Tape and Reel
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
8
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IRFHS8342PbF
†
Qualification information
†
Industrial
Qualification level
(per JE DE C JE S D47F
Moisture Sensitivity Level
PQFN 2mm x 2mm
RoHS compliant
†
††
guidelines )
MS L1
††
(per JEDE C J-S T D-020D )
Yes
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/product-info/reliability
Applicable version of JEDEC standard at the time of product release.
††
Revision History
Date
9/9/2013
12/17/2013
Comments
•Updated data sheet with new IR corporate template.
• Updated Trr/Qrr test condition from "VDD = 13V" to "VDD = 15V" on page 2
• Updated ordering information to reflect the End-Of-life (EOL) of the mini-reel option (EOL notice #259)
• Updated Qual level from "Consumer" to "Industrial" on page 1, 9
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
9
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December 17, 2013
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