Renesas M37210M3-XXXFP Single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller Datasheet

To all our customers
Regarding the change of names mentioned in the document, such as Mitsubishi
Electric and Mitsubishi XX, to Renesas Technology Corp.
The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi
Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names
have in fact all been changed to Renesas Technology Corp. Thank you for your understanding.
Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been
made to the contents of the document, and these changes do not constitute any alteration to the
contents of the document itself.
Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices
and power devices.
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
DESCRIPTION
Type name
M37210M3-XXXSP/FP
M37210M4-XXXSP
M37211M2-XXXSP
ROM size
12 K bytes
16 K bytes
8 K bytes
RAM size
256 bytes
320 bytes
192 bytes
PIN CONFIGURATION (TOP VIEW)
HSYNC → 1
VSYNC → 2
52 → P52/R
P60/PWM0 ← 3
P61/PWM1 ← 4
50 → P54/B
P62/PWM2 ← 5
P63/PWM3 ← 6
48 ↔ P20
P00/PWM4 ↔ 7
P01/PWM5 ↔ 8
46 ↔ P22
P02/PWM6 ↔ 9
P03/PWM7 ↔ 10
44 ↔ P04
P42/SIN /A-D5 → 11
P41/SCLK ↔ 12
P40/SOUT (/IN ) ↔ 13
D-A ← 14
P35/INT2/A-D4 → 15
P34/INT1 → 16
P33/TIM3 → 17
P32/TIM2 → 18
6-bit PWM outputs
8
8
6
Note : After the reset, set the stack page selection bit which is set “1”
to “0” because the internal RAM of the M37211M2-XXXSP is
in only the zero page.
•
•
•
•
•
•
•
•
•
•
•
•
1
47 ↔ P21
45 ↔ P23
43 ↔ P05
42 ↔ P06
41 ↔ P07
40 ↔ P10
39 ↔ P11
38 ↔ P12
37 ↔ P13
36 ↔ P14
35 ← P15/A-D1
34 ← P16/A-D2
P26 ↔ 21
P27 ↔ 22
32 ↔ P30
XOUT ← 25
VSS
• Number of basic instructions ..................................................... 69
• Memory size ROM ................ 12 K bytes (M37210M3-XXXSP/FP)
16 K bytes (M37210M4-XXXSP)
8 K bytes (M37211M2-XXXSP)
RAM ................. 256 bytes (M37210M3-XXXSP/FP)
320 bytes (M37210M4-XXXSP)
192 bytes (M37211M2-XXXSP)
ROM for display......................................... 3 K bytes
RAM for display .......................................... 72 bytes
The minimum instruction execution time
........................................... 0.5µs (at 8MHz oscillation frequency)
Power source voltage ..................................................... 5V ± 10%
Power dissipation .............................................................. 110mW
(at 4MHz oscillation frequency, VCC = 5.5V, at CRT display)
Subroutine nesting ............................................... 96 levels (Max.)
Interrupts ....................................................... 12 types, 12 vectors
8-bit timers .................................................................................. 4
Programmable I/O ports
(Ports P0, P1, P2, P3, P4) ......................................................... 25
Output ports (ports P5, P6) .......................................................... 8
Output ports (ports P52, P5 6) ..................................................... 12
12 V withstand ports ....................................................................4
Serial I/O ............................................................ 8-bit ✕ 1 channel
PWM output circuit ............... (14-bit ✕ 1, 6-bit ✕ 8) ... M37210M3
M37210M4
(14-bit ✕ 1, 6-bit ✕ 6) .... M37211M2
49 → P55/OUT
P24 ↔ 19
P25 ↔ 20
CNVSS → 23
XIN → 24
FEATURES
51 → P53/G
M37210M3-XXXSP
M37210M4-XXXSP
M37211M2-XXXSP
The M37210M3-XXXSP/FP is a single-chip microcomputer designed
with CMOS silicon gate technology. It is housed in a 52-pin shrink
plastic molded DIP or a 64-pin plastic molded QFP. This single-chip
microcomputer is useful for the channel selection system for TVs
because it provides PWM function, OSD display function and so on.
In addition to their simple instruction sets, the ROM, RAM, and I/O
addresses are placed on the same memory map to enable easy programming.
The features of the M37210E4-XXXSP/FP and the M37210E4SP/FP
are similar to those of the M37210M4-XXXSP except that these
chips have a built-in PROM which can be written electrically.
The differences between the M37210M3-XXXSP/FP, the M37210
M4-XXXSP, and the M37211M2-XXXSP are the ROM size, the RAM
size, and the PWM outputs as shown below. Accordingly, the following descriptions will be for the M37210M3-XXXSP/FP unless otherwise noted.
26
33 ← P17/A-D3
31 ↔ P31
30 ← RESET
29 ← OSC1
28 → OSC2
27
VCC
Outline 52P4B
Note : The M37211M2-XXXSP does not have the PWM6 and the PWM7.
• A-D comparator (5-bit resolution) ................................ 5 channels
• CRT display function
Display characters ..................................... 18 characters ✕ 2 lines
(16 lines max.)
Character kinds ................................................................ 96 kinds
Dot structure ............................................................. 12 ✕ 16 dots
Character size .................................................................... 3 kinds
Character color kinds (It can be specified by the character)
max. 7 kinds (R, G, B)
Raster color (max. 7 kinds)
Display layout
Horizontal ..................................................................... 64 levels
Vertical ....................................................................... 128 levels
Bordering (horizontal and vertical)
APPLICATION
TV
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
33
34
35
36
37
38
39
40
41
42
43
44
45
46
49
32
50
31
51
30
52
29
53
28
54
27
55
26
56
25
M37210M3-XXXFP
57
24
16
15
14
13
12
11
10
P30
NC
P31
RESET
OSC1
OSC2
Vcc
NC
NC
VSS
XOUT
XIN
CNVSS
P27
NC
NC
P00/PWM4
P01/PWM5
P02/PWM6
P03/PWM7
NC
P42/SIN/A-D5
P41/SCLK
P40/SOUT/(/IN)
D-A
P35/INT2/A-D4
P34/INT1
P33/TIM3
P32/TIM2
P2 4
P25
P26
9
17
8
18
64
7
19
63
6
20
62
5
21
61
4
22
60
3
23
59
2
58
1
P21
NC
P20
P55 /OUT
P54 /B
P53 /G
P52 /R
NC
NC
HSYNC
VSYNC
P60 /PWM0
P61 /PWM1
P62 /PWM2
NC
P63 /PWM3
47
48
P22
P23
P04
P05
P06
P07
P10
NC
P11
P12
P13
P14
NC
P1 5/A-D1
P16/A-D2
P17/A-D3
PIN CONFIGURATION (TOP VIEW)
Outline 64P6N-A
2
NC : No connection
8
7
Accumulator
A(8)
P1(8)
Processor
status
register
PS(8)
I/O port P1
33 34 35 36 37 38 39 40
A-D3
3
P2(8)
A-D
comparator
Index
register Y
(8)
Program
counter
PCL(8)
I/O port P2
22 21 20 19 45 46 47 48
Index
register X
(8)
Program
counter
PCH(8)
Notes 1 : The M37211M2-XXXSP does not have PWM outputs of pins 9 and 10.
2 : 320 bytes for M37210M4-XXXSP and 192 bytes for M37211M2-XXXSP
3 : 16 K bytes for M37210M4-XXXSP and 8 K bytes for M37211M2-XXXSP
I/O port P0
41 42 43 44 10 9
P0(8)
8-bit
arithmetic
and logical
unit
Address bus
RAM
256bytes
(Note 2)
26
5
A-D4
INT2
P3(6)
Stack
pointer
(8)
ROM
12 K bytes
(Note 3)
I/O port P3
15 16 17 18 31 32
INT1
23
INT1, INT2
A-D5
I/O port P4
11 12 13
P4(3)
Timer 4
T4 (8)
Timer 3
T3 (8)
Interrupt interval
determination
circuit
TIM3
TIM2
Timer 2
T2 (8)
Timer 1
T1 (8)
Timer count
source selection
circuit
SI/O(8)
1
5
4
3
Output port P6
6
P6(4)
Instruction
register
Instruction decoder
Control signal
2
28
P5(4)
CRT circuit
29
HSYNC YSYNC OSC1 OSC2
14-bit PWM circuit
14
D-A
6-bit PWM circuit
PWM6
27
PWM5
Data bus
30
PWM4
PWM3
Clock
generating
circuit
A-D1
PWM2
25
SIN
PWM1
24
A-D2
PWM7
SCLK
SOUT
PWM0
(5V) (0V) (0V)
VCC VSS CNVSS
Video signal output
49 50 51 52
B
Reset input
RESET
OUT
Clock
output
XOUT
G
Clock
input
XIN
R
FUNCTIONAL BLOCK DIAGRAM of M37210M3-XXXSP
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
3
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
FUNCTIONS
Parameter
Number of basic instructions
Instruction execution time
Clock frequency
M37210M3-XXXSP/FP
Memory size
M37210M4-XXXSP
M37211M2-XXXSP
Input/Output ports
P0
P10 – P14
P15 – P17
P2
P30, P31
P32, P35
P40, P41
P42
P5
P6
ROM
RAM
ROM
RAM
ROM
RAM
I/O
I/O
Input
I/O
I/O
Input
I/O
Input
Output
Output
Serial I/O
Timers
Subroutine nesting
Two external interrupts, four internal timer interrupts,
one serial I/O interrupt, one CRT interrupt, one f(XIN)/4096
interrupt, one VSYNC interrupt, BRK instruction
Interrupt
Clock generating circuit
Power source voltage
Power dissipation
at CRT display ON
at CRT display OFF
at stop mode
Operating temperature range
Device structure
Package
CRT display function
M37210M3-XXXSP, M37210M4-XXXSP, M37211M2-XXXSP
M37210M3-XXXFP
Number of character
Character dot construction
Kinds of characters
Character size
Kinds of color
Display position (horizontal, vertical)
Note : The M37211M2-XXXSP can be also used as PWM4 and PWM5.
4
Functions
69
0.5µs (the minimum instruction execution time, at 8MHz oscillation frequency)
8MHz
12 K bytes
256 bytes
16 K bytes
320 bytes
8 K bytes
192 bytes
8-bit ✕ 1 (can be used as N-channel open-drain output and PWM4-PWM7)(Note)
5-bit ✕ 1 (CMOS 3-state output)
3-bit ✕ 1 (can be used as A-D input)
8-bit ✕ 1 (CMOS 3-state output)
2-bit ✕ 1 (CMOS 3-state input/output)
4-bit ✕ 1 (can be used as timer input pins, INT input pins and A-D input pins)
2-bit ✕ 1 (can be used as N-channel open-drain output and serial I/O function pins)
1-bit ✕ 1 (can be used as serial I/O and A-D input)
4-bit ✕ 1 (can be used as R, G, B, OUT pins)
4-bit ✕ 1 (can be used as N-channel open-drain output and PWM0-PWM3 output pins)
8-bit ✕ 1
8-bit timer ✕ 4
96 levels (max.)
Built-in circuit (externally connected a ceramic resonator or a quartz-crystal oscillator)
5V ± 10%
110mW (at 4MHz oscillation frequency, V CC = 5.5V, Typ.)
55mW (at 4MHz oscillation frequency, V CC = 5.5V, Typ.)
1.65mW (Max.)
−10 to 70°C
CMOS silicon gate process
52-pin shrink plastic molded DIP
64-pin plastic molded QFP
18 characters ✕ 2 lines : maximum 16 lines (by software)
12 ✕ 16 dots
96 kinds
3 kinds
7 kinds max, (R, G, B) : can be specified by character unit
64 levels (horizontal) ✕ 128 levels (vertical)
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
PIN DESCRIPTION
Pin
Name
Input /
Output
VCC ,
VSS
CNVSS
RESET
Power source voltage
CNVSS
Reset input
Input
XIN
Clock input
Input
XOUT
Clock output
Output
φ
P00 – P07
Timing output
I/O port P0
Output
I/O
P11 – P14
I/O port P1
P15 – P17
Input port P1
P20 – P27
I/O port P2
I/O
P30, P31
I/O port P3
I/O
P32 – P35
Input port P3
P40, P41
I/O port P4
P42
Input port P4
P60 – P63
Output port P6
Output
OSC1,
OSC2
Clock input for CRT
display
Clock output for CRT
display
HSYNC input
VSYNC input
CRT output
Input
Output
DA Output
Output
HSYNC
VSYNC
R, G, B,
OUT
D-A
Functions
Apply voltage of 5V ± 10% to VCC , and 0V to VSS.
I/O
Input
Input
I/O
Input
Input
Input
Output
This is connected to VSS .
To enter the reset state, the reset input pin must be kept at a “L” for 2µs or more (under normal VCC conditions).
If more time is needed for the crystal oscillator to stabilize, this “L” condition should be maintained for the required time.
This chip has an internal clock generating circuit. To control generating frequency, an external ceramic resonator or a quartz-crystal oscillator is connected between the XIN and
XOUT pins. If an external clock is used, the clock source should be connected the XIN pin and
the XOUT pin should be left open.
This is the timing output pin.
Port P0 is an 8-bit I/O port with directional registers allowing each I/O bit to be individually
programmed as input or output. At reset, this port is set to input mode. The output structure
is CMOS output.
The output structure is N-channel open-drain output. When PWM4, PWM5, PWM6 and
PWM7 are used, P00, P0 1, P02 and P03 are in common with PWM output pins of PWM4,
PWM5, PWM6 and PWM7.
Ports P10, P11 , P12, P13 and P14 are 5-bit I/O ports and have basically the same functions
as port P0. The output structure is CMOS output.
Ports P15, P16 and P17 are 3-bit input ports and they are in common with input pins of A-D
comparator (A-D1, A-D2 and A-D3).
Port P2 is an 8-bit I/O port and has basically the same functions as port P0.
The output structure is CMOS output.
Ports P30 and P3 1 are 2-bit I/O ports and have basically the same functions as port P0.
The output structure is CMOS output.
Ports P3 2, P33, P34 and P35 are 4-bit input ports and ports P32 and P33 are in common
with external clock input pins of timers 2 and 3. Ports P3 4 and P3 5 are in common with
external interrupt input pins INT1 and INT2. Port P35 is in common with an input pin of A-D
comparator (A-D4).
Ports P40 and P4 1 are 2-bit I/O ports and have basically the same functions as port P0.
When serial I/O is used, ports P40 and P41 are in common with SOUT pin and SCLK pin, respectively.
Port P42 is an 1-bit Input port, and it is common with an input pin of A-D comparator (A-D5)
and serial input pin (SIN).
Port P6 is an 4-bit output port. The output structure is N-channel open-drain. This port is in
common with 6-bit PWM output pins PWM0-PWM3.
This is the I/O pins of the clock generating circuit for the CRT display function.
This is the horizontal synchronizing signal input for CRT display.
This is the vertical synchronizing signal input for CRT display.
This is a 4-bit output pin for CRT display. The output structure is CMOS output. This is in
common with port P52 – P55.
This is an output pin for 14-bit PWM.
5
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
FUNCTIONAL DESCRIPTION
Central Processing Unit (CPU)
CPU Mode Register
The M37210M3-XXXSP/FP uses the standard 740 family instruction
set. Refer to the table of 740 family addressing modes and machine
instructions or the SERIES 740 〈Software〉 User’s Manual for details
on the instruction set.
Machine-resident 740 family instructions are as follows :
The FST and SLW instruction cannot be used.
The MUL, DIV, WIT, and STP instruction can be used.
7
1 1 1 1 1
0
0 0
The CPU mode register is allocated at address 00FB16. The CPU
mode register contains the stack page selection bit.
CPU mode register
(CPUM : address 00FB16)
Fix these bits to “002”
Stack page selection bit (Note)
0 : Zero page
1 : 1 page
Fix these bits to “11112”
Note : Please beware of this bit when programming because it is set to “1” after the reset release.
Especially the internal RAM of the M37211M2-XXXSP is in the zero page, so be sure to set this bit to “0”.
Fig. 1 Structure of CPU mode register
6
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
MEMORY
Special Function Register (SFR) Area
Interrupt Vector Area
The interrupt vector area contains reset and interrupt vectors.
The special function register (SFR) area in the zero page contains
control registers such as I/O ports and timers.
Zero Page
ROM
The 256 bytes from addresses 000016 to 00FF 16 are called the zero
page area. The internal RAM and the special function registers
(SFR) are allocated to this area.
The zero page addressing mode can be used to specify memory and
register addresses in the zero page area. Access to this area with
only 2 bytes is possible in the zero page addressing mode.
ROM is used for sroring user programs as well as the interrupt vector area.
Special Page
RAM
RAM is used for data storage and for stack area of subroutine calls
and interrupts.
RAM for Display
RAM for display is used for specifing the character codes and colors
to display.
The 256 bytes from addresses FF0016 to FFFF16 are called the special page area. The special page addressing mode can be used to
specify memory addresses in the special page area. Access to this
area with only 2 bytes is possible in the special page addressing
mode.
ROM for Display
ROM for display is used for storing character data.
RAM
(320 bytes)
for
M37210M4
















RAM
 (192 bytes)

for

RAM
 M37211M2
(256 bytes) 
for
M37210M3







 000016




 00BF16

SFR area
00FF16




 Zero page




013F16
017F16
Not used
 200016


RAM for display (Note) 
(72 bytes) 
 20B116




ROM for display 
(3 K bytes) 











ROM

(16 K bytes) 
ROM
 (12 K bytes)
for
M37210M4 
for

 M37210M3








Not used
300016
35FF16
Not used
380016
3DFF16
Not used
C00016
D00016




 E00016









ROM


 (8 K bytes) 
 FF0016

for
 M37211M2 








 FFDE16



 FFFF16

Interrupt vector area




 Special page




Note : Refer to Table 6. Contents of CRT display RAM
Fig. 2 Memory map
7
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
00C016
00C116
00C216
00C316
00C416
00C516
00C616
00C716
00C816
00C916
00CA16
00CB16
00CC16
00CD16
00CE16
00CF16
00D016
00D116
00D216
00D316
00D416
00D516
00D616
00D716
00D816
00D916
00DA16
00DB16
00DC16
00DD16
00DE16
00DF16
Port P0
Port P0 directional register
Port P1
Port P1 directional register
Port P2
Port P2 directional register
Port P3
Port P3 directional register
Port P4
Port P4 directional register
Port P5
Port P5 control register
Port P6
Port P6 directional register
14DA-H register
14DA-L register
PWM0 register
PWM1 register
PWM2 register
PWM3 register
PWM4 register
PWM output control register 1
PWM output control register 2
Interrupt Interval determination register
Interrupt Interval determination control register
Serial I/O mode register
Serial I/O register
Note : The M37211M2-XXXSP dose not have this register
Fig. 3 Memory map of special function register (SFR )
8
00E016
00E116
00E216
00E316
00E416
00E516
00E616
00E716
00E816
00E916
00EA16
00EB16
00EC16
00ED16
00EE16
00EF16
00F016
00F116
00F216
00F316
00F416
00F516
00F616
00F716
00F816
00F916
00FA16
00FB16
00FC16
00FD16
00FE16
00FF16
Horizontal position register
Vertical position register 1 (block 1)
Vertical position register 2 (block 2)
Character size register
Border selection register
Color register 0
Color register 1
Color register 2
Color register 3
CRT control register
CRT port control register
A-D mode register
A-D control register
Timer 1
Timer 2
Timer 3
Timer 4
Timer 12 mode register
Timer 34 mode register
PWM5 register
PWM6 register (Note)
PWM7 register (Note)
CPU mode register
Interrupt request register 1
Interrupt request register 2
Interrupt control register1
Interrupt control register2
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
INTERRUPTS
Interrupts can be caused by 12 different sources consisting of 3 external, 7 internal, 1 software, and reset.
Interrupts are vectored interrupts with priorities shown in Table 1. Reset is also included in the table because its operation is similar to an
interrupt.
When an interrupt is accepted, the registers are pushed, interrupt
disable flag I is set, and the program jumps to the address specified
in the vector table. The interrupt request bit is cleared automatically.
The reset can never be disabled. Other interrupts are disabled when
the interrupt disable flag is set.
All interrupts except the BRK instruction interrupt have an interrupt
request bit and an interrupt enable bit. The interrupt request bits are
in interrupt request registers 1 and 2 and the interrupt enable bits are
in interrupt control registers 1 and 2. Figure 4 shows the structure of
the interrupt request registers 1 and 2 and interrupt control registers
1 and 2.
Interrupts other than the BRK instruction interrupt and reset are accepted when the interrupt enable bit is “1”, interrupt request bit is “1”,
and the interrupt disable flag is “0”. The interrupt request bit can be
reset with a program, but not set. The interrupt enable bit can be set
and reset with a program.
Reset is treated as a non-maskable interrupt with the highest priority.
Figure 5 shows interrupts control.
Table 1. Interrupt vector addresses and priority
Interrupt sources
Reset
CRT interrupt
INT2 interrupt
INT1 interrupt
Timer 4 interrupt
f(XIN)/4096 interrupt
VSYNC interrupt
Timer 3 interrupt
Timer 2 interrupt
Timer 1 interrupt
Serial I/O interrupt
BRK instruction interrupt
Priority
1
2
3
4
5
6
7
8
9
10
11
12
Vector addresses
FFFF16, FFFE16
FFFD16,
FFFB16,
FFF916,
FFF516,
FFF316,
FFF116,
FFEF16,
FFED16,
FFEB16,
FFE916,
FFDF16,
FFFC16
FFFA16
FFF816
FFF416
FFF216
FFF016
FFEE16
FFEC16
FFEA16
FFE816
FFDE16
Remarks
Non-maskable
Active edge selectable
Active edge selectable
Active edge selectable
Non-maskable software interrupt
9
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
7
0
Interrupt request register 1
(IREQ1 : address 00FC16)
7
0
0
Interrupt request register 2
(IREQ2 : address 00FD16)
Timer 1 interrupt request bit
Timer 2 interrupt request bit
Timer 3 interrupt request bit
Timer 4 interrupt request bit
CRT interrupt request bit
VSYNC interrupt request bit
INT1 interrupt request bit
INT2 interrupt request bit
Serial I/O1 interrupt request bit
f(XIN)/4096 interrupt request bit
Fix this bit to “0”
0 : No interrupt request issued
1 : Interrupt request issued
7
0 0
0
Interrupt control register 1
(ICON1 : address 00FE16)
Timer 1 interrupt enable bit
Timer 2 interrupt enable bit
Timer 3 interrupt enable bit
Timer 4 interrupt enable bit
CRT interrupt enable bit
VSYNC interrupt enable bit
Fix these bits to “0”
7
0 0 0
0
Interrupt control register 2
(ICON2 : address 00FF16)
INT1 interrupt enable bit
INT2 interrupt enable bit
Serial I/O1 interrupt enable bit
Fix this bit to “0”
f(XIN)/4096 interrupt enable bit
Fix these bits to “0”
0 : Interrupt disabled
1 : Interrupt enabled
Fig. 4 Structure of interrupt-related registers
Interrupt request bit
Interrupt enable bit
Interrupt disable flag (I)
BRK instruction
reset
Fig. 5 Interrupt control
10
interrupt request
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
TIMERS
The M37210M3-XXXSP has 4 timers: timer 1, timer 2, timer 3 and
timer 4. All timers are 8-bit timers with the 8-bit timer latch. The timer
block diagram is shown in Figure 7.
All of the timers count down and their divide ratio is 1/(n+1), where n
is the value of timer latch. The value is set to a timer at the same time
by writing a count value to the corresponding timer latch (addresses
00F016 to 00F316 : timers 1 to 4).
The count value is decremented by 1. The timer interrupt request bit
is set to “1” by an timer overflow at the next count pulse after the
count value reaches “0016.”
set bit 0 of the timer 34 mode register (address 00F516 ) to “0” before
the execution of the STP instruction (f(XIN)16 is selected as the timer
3 count source). The internal STP state is released by timer 4 overflow at these state, the internal clock is connected .
Because of this, the program starts with stable clock.
The structure of timer-related registers is shown in Figure 6.
7
0
Timer 12 mode register
(TM12MR : address 00F416 )
(1) Timer 1
Timer 1 count source selection bit
0 : f (XIN ) /16
1 : 1024µs clock
Timer 1 can select one of the following count sources:
f(XIN)/16
f(XIN)/4096
The count source of timer 1 is selected by setting bit 0 of the timer 12
mode register (address 00F416 ).
Timer 1 interrupt request occurs at timer 1 overflow.
•
•
Timer 2 count source selection bit
0 : Internal clock source
1 : External clock source from P32 /TIM2 pin
Timer 1 count stop bit
0 : Operation
1 : Stop
(2) Timer 2
Timer 2 can select one of the following count sources:
f(XIN)/16
Timer 1 overflow signal
External clock from the P32/TIM2 pin
The count source of timer 2 is selected by setting bits 4 and 1 of the
timer 12 mode register (address 00F416 ). When timer 1 overflow
signal is a count source for the timer 2, the timer 1 functions as an 8bit prescaler.
Timer 2 interrupt request occurs at timer 2 overflow.
•
•
•
(3) Timer 3
Timer 3 can select one of the following count sources:
f(XIN)/16
External clock from the P33/TIM3 pin and the HSYNC pin
The count source of timer 3 is selected by setting bits 5 and 0 of the
timer 34 mode register (address 00F516).
Timer 3 interrupt request occurs at timer 3 overflow.
•
•
(4) Timer 4
Timer 4 can select one of the following count sources:
f(XIN)/16
f(XIN)/2
Timer 3 overflow signal
The count source of timer 3 is selected by setting bits 4 and 1 of the
timer 34 mode register 2 (address 00F516). When timer 3 overflow
signal is a count source for the timer 4, the timer 3 functions as an 8bit prescaler.
Timer 4 interrupt request occurs at timer 4 overflow.
•
•
•
At reset, timers 3 and 4 are connected by hardware and “FF 16” is
automatically set in timer 3; “0716” in timer 4. The f(X IN)/16 is selected as the timer 3 count source. The internal reset is released by
timer 4 overflow at these state, the internal clock is connected .
At execution of the STP instruction, timers 3 and 4 are connected by
hardware and “FF16” is automatically set in timer 3; “0716” in timer 4.
However, the f(XIN)16 is not selected as the timer 3 count source. So
Timer 2 count stop bit
0 : Operation
1 : stop
Timer 2 internal count source
selection bit
0 : f (XIN ) /16
1 : Timer 1 overflow signal
Fix this bit to “0”
7
0
Timer 34 mode register
(TM34MR : address 00F516 )
Timer 3 count source selection bit
0 : f (XIN ) /16
1 : External clock source (bits)
Timer 4 internal count source
selection bit
0 : Timer 3 overflow signal
1 : f (XIN ) /16
Timer 3 count stop bit
0 : Operation
1 : Stop
Timer 4 count stop bit
0 : Operation
1 : Stop
Timer 4 count source selection bit
0 : Internal clock source
1 : f (XIN ) /2
Timer 3 external count source
selection bit
0 : P33 /TIM3 pin input
1 : HSYNC pin input
Fig. 6 Structure of timer-related registers
11
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
Data bus
8
Timer 1 latch (8)
1/4096
8
XIN
1/2
Timer 1
interrupt request
Timer 1 (8)
1/8
T12M0
T12M2
8
T12M4
8
Timer 2 latch (8)
8
P32/TIM2
Timer 2
interrupt request
Timer 2 (8)
D.F.
T12M1
T12M3
8
8
HSYNC
FF16
P33/TIM3
D.F.
T34M5
Reset
STP instruction
Timer 3 latch (8)
8
Timer 3
interrupt request
Timer 3 (8)
T34M0
T34M2
8
8
0716
T34M1
Timer 4 latch (8)
8
Timer 4
interrupt request
Timer 4 (8)
T34M4









Selection gate : Connected to black 
colored side at reset. 

T34M3
8
T12M : Timer 12 mode register
T34M : Timer 34 mode register
Notes 1 : “H” pulse width of external clock inputs TIM2 and TIM3 needs 4 machine cycles or more.
2 : When the external clock source is selected, timers 2 and 3 are counted at a rising edge of input signal.
3 : In the stop mode or the wait mode, external clock inputs TIM2 and TIM3 cannot be used.
Fig. 7 Timer block diagram
12
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
SERIAL I/O
M37210M3-XXXSP has a serial I/O.
A block diagram of the serial I/O is shown in Figure 8.
Synchronous input/output clock (SCLK), and the serial I/O pins (SOUT,
SIN) are used as port P4. The serial I/O mode registers (address
00DC16) are 8-bit registers. Bits 0, 1 and 2 of these registers are
used to select a synchronous clock source.
Bit 3 decides whether parts of P4 will be used as a serial I/O or not.
To use P42 as a serial input, set the directional register bit which corresponds to P42 to “0”. For more information on the directional register, refer to the I/O pin section.
The serial I/O function is discussed below. The function of the serial
I/O differs depending on the clock source ; external clock or internal
clock.
Data bus
XIN
1/2
Frequency
divider
1/2
Synchronization
circuit
SM2
1/4 1/8 1/16
SM1
SM0
P41 latch
Serial I/O counter (8)
P41/SCLK
SM3
P40 latch
Serial I/O
interrupt request
SM5 : LSB↔MSB
P40/SOUT
SM3
Serial I/O shift register (8)
P42/SIN
SM6









Selection gate : Connected to black 
colored side at reset. 

(address 00DD16)
8
Fig. 8 Serial I/O block diagram
13
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
The serial I/O counter is set to 7 when data is stored in the serial I/O
register. At each falling edge of the transfer clock, serial data is output to SOUT. During the rising edge of this clock, data can be input
from SIN and the data in the serial I/O register will be shifted 1 bit.
Transfer direction can be selected by bit 5 of serial I/O mode register.
After the transfer clock has counted 8 times, the serial I/O register will
be empty and the transfer clock will remain at a high level. At this time
the interrupt request bit will be set.
External clock- If an external clock is used, the interrupt request will
be sent after the transfer clock has counted 8 times but transfer clock
will not stop.
Due to this reason, the external clock must be controlled from the
outside. The external clock should not exceed 1MHz at a duty cycle
of 50%. The timing diagram is shown in Figure 9. When using an external clock for transfer, the external clock must be held at “H” level
when the serial I/O counter is initialized. When switching between the
internal clock and external clock, the switching must not be performed during transfer. Also, the serial I/O counter must be initialized
after switching.
Notes 1: On programming, note that the serial I/O counter is set by
writing to the serial I/O register with the bit managing instructions as SEB and CLB instructions.
2: When an external clock is used as the synchronizing clock,
write transmit data to the serial I/O register at “H” of the
transfer clock input level.
Sync. clock
Transfer clock
Serial I/O register
write signal
(Note 1)
Serial I/O output
SOUT
D0
D1
D2
D3
D4
D5
D6
D7
Serial I/O input
SIN
Notes 1 : If internal clock is selected, the Sout pin is at high impedance after transfer is completed.
2 : When an external clock is used as the synchronous clock, write the transmit data to the
serial I/O shift register at “H” of the transfer clock input level.
Fig. 9 Serial I/O timing (for LSB first)
14
Interrupt request bit set
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
7
0
Serial l/O mode register
(SM : address 00DC16)
Internal synchronous clock
selection bits
00 : f (XIN) /4
01 : f (XIN) /16
10 : f (XIN) /32
11 : f (XIN) /64
Synchronous clock selection bit
0 : External clock
1 : Internal clock
Serial l/O port selection bit
0 : P40, P41
1 : SOUT1,S CLK signal output pins
Serial I/O common transmission/reception mode.
Write 1 to bit 6 of serial I/O mode register, and signals SIN and SOUT
switch internal to be able to serial data transmission/reception.
Figure 11 shows signals on serial I/O common transmission/reception mode.
Note : Receive the serial data after writing “FF16 ” to the serial I/O
register.
Fix this bit to “0”
Transfer direction selection bit
0 : LSB first
1 : MSB first
Serial input pin selection bit
0 : Input from SIN pin
1 : Input from SOUT pin
Fig. 10 Structure of serial I/O mode register
P41/SCLK
P40/SOUT (/IN)
clock1
Input or output
The transmission mode
“1”
SM6
Serial I/O shift register
“0”
The reception mode
P42/SIN
Port P42 data
Fig. 11 Signals on serial I/O common transmission/reception mode
15
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
PWM OUTPUT CIRCUIT
(1) Introduction
The M37210M3-XXXSP/FP and M37210M4-XXXSP are
equipped with one 14-bit PWM (DA) and eight 6-bit PWMs
(PWM0-PWM7), and the M37211M2-XXXSP is equipped with
six 6-bit PWMs (PWM0-PWM5). The 14-bit resolution gives DA
the minimum resolution bit width of 500ns (for f(XIN) = 4MHz)
and a repeat period of 8192µs. PWM0-PWM7 have a 6-bit resolution with minimum resolution bit width of 16ms and repeat period of 1024µs.
Block diagram of the PWM is shown in Figure 16.
The PWM timing generator section applies individual control
signals to DA and PWM0-7 using clock input XIN divided by 2
as a reference signal.
(2) Data Setting
The output pins PWM0-3 are in common with port P6 and
PWM4-7 are in common with port P00-P03.
For PWM output, each PWM output selection bit (bit 1 to 7 of
PWM output control register 1, bit 0, 1 of PWM output control
register 2, should be set. When DA is used for output, first set
the higher 8-bit of the DA-H register (address 00CE16), then the
lower 6-bit of the DA-L register (address 00CF16).
When one of the PWM0-7 is used for output, set the 6-bit in the
PWM0-7 register (address 00D0 16 to 00D416, 00F616 to
00F816), respectively.
(3) Transferring Data from Registers to PWM
Circuit
The data written to the PWM registers. 8 bits of the DA-H register is transferred to 14-bit PWM circuit when writing to lower 6
bits of the DA-L register.
(4) Operation of the 6-bit PWMs
The timing diagram of the eight 6-bit PWMs (PWM0-7) is shown
in Figure 13. One period (T) is composed of 64 (26) segments.
There are six different pulse types configured from bits 0 to 5
representing the significance of each bit. These are output
16
within one period in the circuit internal section. Refer to Figure
13 (a).
Six different pulses can be output from the PWM.
These can be selected by bits 0 through 5. Depending on the
content of the 6-bit PWM latch, pulses from 5 to 0 are selected.
The PWM output is the difference of the sum of each of these
pulses. Several examples are shown in Figure 13 (b). Changes
in the contents of the PWM latch allows the selection of 64
lengths of high-level area outputs varying from 0/64 to 63/64. A
length of entirely high-level output cannot be output, i.e. 64/64.
(5) 14-bit PWM Operation
The output example of the 14-bit PWM is shown in Figure 14.
The 14-bit PWM divides the data within the PWM latch into the
lower 6 bits and higher 8 bits.
A high-level area within a length DH times τ is output every short
area of t = 256 τ =128µs as determined by data DH of the higher
8 bits.
Thus, the time for the high-level area is equal to the time set by
the lower 8 bits or that plus τ. As a result, the short-area period
t ( = 128µs, approx. 7.8 kHz) becomes an approximately repetitive period.
(6) Output after Reset
At reset the output of port P6 is in the high impedance state and
the contents of the PWM register and latch are undefined. Note
that after setting the PWM register, its data is transferred to the
latch.
Table 2. Relation between the low-order 6 bits of data and high-level
area increase space
6 low-order bits of data Area longer by τ than that of other tm (m = 0 to 63)
LSB
000000
000001
000010
000100
001000
010000
100000
Nothing
m = 32
m = 16, 48
m = 8, 24, 40, 56
m = 4, 12, 20, 28, 36, 44, 52, 60
m = 2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46, 50, 54, 58, 62
m = 1, 3, 5, 7, ................................................... 57, 59, 61, 63
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
Data bus
Selection gate : connected to black
colored side at reset.
DA-H register
(address 00CE16)
bit 7
Pass gate
bit 0
DA-L register
(address 00CF16)
(14-bit)
LSB
MSB
8
6
6
14
PN2 PN4
14-bit PWM circuit
DA
D-A
PW1
XIN
1/2
PW0
Timing
generator
for PWM
PWM0 register
(address 00D016)
bit 0
bit 5
8
PN3
6-bit PWM circuit
P60 D60
PWM0
PW2
P61 D61
PWM1
PW3
P62 D62
PWM2
PW4
P63 D63
PWM3
PW5
P00 D00
PWM4
PW6
P01 D01
PWM5
PW7
P02 D02
PWM6(Note)
PN0
P03 D03
PWM7(Note)
PN1
Note : The M37211M2-XXXSP can not output the PWM.
Inside of
is as same contents with the others.
PW : PWM output control register 1
PN : PWM output control register 2
D0 : Port P0 direction register
P0 : Port P0
D6 : Port P6 directional register
P6 : Port P6
Fig. 12 PWM block diagram
17
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
1
3
5
7
9
19
39
59
Bit 5
Bit 4
2
6
10
14
18
22
26
30
34
38
42
46
50
54
58
62
Bit 3
4
12
20
28
36
44
52
60
Bit 2
8
24
56
40
Bit 1
16
48
Bit 0
32
(a) Pulses showing the weight of each bit
0016
(0)
0116
(1)
0616
(24)
3F16
(63)
T = 64t
PWM output t = 10µs T = 1024µs
f (XIN) = 4MHz
(b) Example of 6-bit PWM output
Fig. 13 6-bit PWM timing
18
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
Set “2C16” to DA-H register
[DA-H register] 0
0
1
0
1
1
0
Set “2816” to DA-L register
[DA-L register]
0
1
0
1
bit 13
0
0
0
After writing
After writing of DA-L
[DA latch]
0
bit 0
bit 0
bit 7
bit 0
0
1
0
1
1
0
0
1
0
1
0
These bits decide “H” level area
of fundamental waveform
0
0
These bits decide smaller intervals tm in which “H” level area
is [“H” level area of fundamental waveform plus r]
“H” level area of
Minimum bit
High-order 8 bit
( fundamental
waveform ) = ( durations 0.5µs ) ✕ ( value of DA latch )
Fundamental
waveform
Waveform of smaller intervals tm specified by the lower 6 bits
0.5µs ✕ 44
0.5µs ✕ 45
0.5µs
14-bit
2C 2B 2A … 03 02 01 00
PWM output
8-bit
counter
14-bit
2C 2B 2A … 03 02 01 00
PWM output
8-bit
counter
FF FE FD … D6 D5 D4 D3 … 02 01 00
FF FE FD … D6 D5 D4 D3 … 02 01 00
The fundamental waveform of smaller intervals
tm which is not specified by the lower 6 bits is
not changed
0.5µs ✕ 45
τ = 0.5µs
14-bit PWM output
t0
t1
t2
t3
t4
t5
t59
t60
t61
t62
t63
Low-order 6-bit
output of DA latch
T = 8192µs
Fig. 14 14-bit PWM output example (f (XIN) = 4MHz)
19
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
7
0
7
PWM output control register 2
(PN : address 00D616)
DA, PWM count source STOP bit
0 : Supply
1 : Stop
P02/PWM6 output selection bit (Note)
0 : P02 (general-purpose) output
1 : PWM6 (6-bit PWM) output
DA/PN4 output selection bit
0 : DA (14-bit PWM) output
1 : PN4 (general-purpose) output
P03/PWM7 output selection bit (Note)
0 : P03(general-purpose) output
1 : PWM7 (6-bit PWM) output
P60/PWM0 output selection bit
0 : P60 (general-purpose) output
1 : PWM0 (6-bit PWM) output
DA output polarity selection bit
0 : Positive polarity
1 : Negative polarity
P61/PWM1 output selection bit
0 : P61 (general-purpose) output
1 : PWM1 (6-bit PWM) output
6-bit PWM output polarity selection bit
0 : Positive polarity
1 : Negative polarity
P62/PWM2 output selection bit
0 : P62 (general-purpose) output
1 : PWM2 (6-bit PWM) output
D-A pin general-purpose output register
0 : Output “L”
1 : Output “H”
P63/PWM3 output selection bit
0 : P63 (general-purpose) output
1 : PWM3 (6-bit PWM) output
P00/PWM4 output selection bit
0 : P00 (general-purpose) output
1 : PWM4 (6-bit PWM) output
P01/PWM5 output selection bit
0 : P01 (general-purpose) output
1 : PWM5 (6-bit PWM) output
Note : Fix this bit to “0” (M37211M2-XXXSP).
Fig.15 Structure of PWM output control registers 1 and 2
20
0
PWM output control register 1
(PW : address 00D516)
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
A-D COMPARATOR
Block diagram of A-D comparator is shown in Figure 18. A-D comparator consists of 5-bit D-A converter and comparator. The A-D control register can generate 1/64 V CC-step internal analog voltage
based on the settings of bits 0 to 4.
Table 3 gives the relation between the descriptions of A-D control
register bits 0 to 4 and the generated internal analog voltage. The
comparison result of the analog input voltage and the internal analog
voltage is stored in the A-D control register, bit 5.
After selection of an analog input pin by bits 0-2 of A-D mode register
(address 00EE16), the digital value corresponding to the internal analog voltage to be compared is then written in the A-D control register,
bit 0 to 3 and an analog input pin is selected. After 16 machine cycle,
the voltage comparison is completed.
7
0
A-D control register
(ADC : address 00EF16)
D-A converter set bits
(refer to table 3)
Strage bit of comparison result
0 : Input voltage <
reference voltage
1 : Input voltage >
reference voltage
Fig. 16 Structure of A-D control register
Table 3. Relationship between the contents of A-D control register
and reference voltage
……………………
……………………
A-D input pin selection bits
0 0 0 : A-D1
0 0 1 : A-D2
0 1 0 : A-D3
0 1 1 : A-D4
1 0 0 : A-D5
101: 
 These are not
110: 
available
1 1 1 : 
Bit 0
0
1
0
……………………
A-D mode regiser
(ADM : address 00EE16)
Bit 1
0
0
1
……………………
0
Bit 2
0
0
0
……………………
7
Reference voltage Vref
Bit 3
0
0
0
……………………
A-D control register
Bit4
0
0
0
1
1
1
1
1
1
1
1
1
0
1
1
1
0
1
27/64 VCC
29/64 VCC
31/64 VCC
1/64 VCC
3/64 VCC
5/64 VCC
Fig. 17 Structure of A-D mode register
Data bus
A-D mode register
Comparator control
Bits 0 to 2
P15/A-D1
P16/A-D2
P17/A-D3
P35/A-D4
P42/A-D5
A-D control register
Analog
signal
switch
Comparator
Bit 5 Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Switch tree
Resistor ladder
Fig. 18 A-D comparator block diagram
21
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
CRT DISPLAY FUNCTIONS
(1) Outline of CRT Display Functions
Table 4 outlines the CRT display functions of the M37210M3-XXXSP.
The M37210M3-XXXSP incorporates a 18 columns ✕ 2 lines CRT
display control circuit. CRT display is controlled by the CRT display
control register.
Up to 96 kinds of characters can be displayed, and colors can be
specified for each character. Four colors can be displayed on one
screen. A combination of up to 7 colors can be obtained by using
each output signal (R, G and B).
Characters are displayed in a 12 ✕ 16 dot configuration to obtain
smooth character patterns (refer to Figure 19).
The following shows the procedure how to display characters on the
CRT screen.
Table 4. Outline of CRT display functions
Parameter
Functions
Number of display
character
18 characters ✕ 2 lines
Character
configuration
12 ✕ 16 dots (refer to Figure 19)
Kinds of character
Character size
Kinds of color
Color
Coloring unit
96
3 kinds
1 screen : 4 kinds
A character
Possible (multiline display)
Possible (maximum 7 kinds)
Display expansion
Raster coloring
➀ Set the character to be displayed in display RAM.
➁ Set the display color by using the color register.
➂ Specify the color register in which the display color is set by using the display RAM.
➃ Specify the vertical position and character size by using the vertical position register and the character size register.
➄ Specify the horizontal position by using the horizontal position
register.
➅ Write the display enable bit to the designated block display flag of
the CRT control register. When this is done, the CRT starts operation according to the input of the VSYNC signal.
The CRT display circuit has an extended display mode.
This mode allows multiple lines (more than 3 lines) to be displayed
on the screen by interrupting the display each time one line is displayed and rewriting data in the block for which display is terminated
by software.
Figure 21 shows a block diagram of the CRT display control circuit.
Figure 20 shows the structure of the CRT display control register.
7
0
CRT control register
(CC : address 00EA16)
Display of all blocks control bit (Note)
0 : Display of all blocks off
1 : Display of all blocks on
Display of block 1 control bit
0 : Display of block 1 off
1 : Display of block 1 on
12 dots
Display of block 2 control bit
0 : Display of block 2 off
1 : Display of block 2 on
Note : Display is controlled by logical product (AND) between the allblocks display control bit and each block display control bit
Fig. 20 Structure of CRT control register
16 dots
Fig. 19 CRT display character configuration
22
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
OSC1
OSC2
HSYNC VSYNC
(Address 00EA16)
CRT control register
Display oscillation
circuit
(Addresses 00E116 to 00E216)
Vertical position registers
(Address 00E416)
Character size register
Display position control circuit
(Address 00E016)
Horizontal position register
(Address 00E516)
Border selection register
Display control
circuit
RAM for display
9 bits × 18 × 2
ROM for display
12 bits × 16 × 96
(Addresses 00E616
to 00E916)
Color registers
Shift register
12 bits
Shift register
12 bits
(Address 00EC16)
Output circuit
CRT port control register
Data bus
R
G
B
OUT
Fig. 21 Block diagram of CRT display control circuit
23
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
(2) Display Position
The display positions of characters are specified in units called a
“block”. There are two blocks, block 1 and block 2.
Up to 18 characters can be displayed in one block (refer to (4)
Memory for Display).
The display position of each block in both horizontal and vertical directions can be set by software.
The horizontal direction is common to all blocks, and is selected from
64-step display positions in units of 4Tc (Tc = oscillating cycle for display).
The display position in the vertical direction is selected from 128-step
display positions for each block in units of four scanning lines.
Block 2 is displayed after the display of block 1 perfectly (fig. 24(a)).
Then if the display of block 2 starts during the display of block 1, only
block 1 is displayed. As same, when multiline display, block 1 is displayed after the display of block 2 perfectly (fig. 24(b)).
The vertical position can be specified from 128-step positions (four
scanning lines per step) for each block by setting values 0016 to 7F16
to bits 0 to 6 in the vertical position register (addresses 00E116 and
00E215). Figure 22 shows the structure of the vertical position register.
7
0
Vertical position registers 1, 2
(CV1 : address 00E116)
(CV2 : address 00E216)
The vertical display start positions
128-step positions (0016 to 7F16)
Fig. 22 Structure of vertical position registers
The horizontal direction is common to all blocks, and can be specified from 64-step display positions (4Tc per step (Tc = oscillating
cycle for display) by setting values 0016 to 3F16 to bits 0 to 5 in the
horizontal position register (address 00E016 ). Figure 23 shows the
structure of the horizontal position register.
7
0
Horizontal position register
(HR : address 00E016)
The horizontal display start positions
64-step positions (0016 to 3F16)
Fig. 23 Structure of horizontal position register
24
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
(RH)
CV1
Block 1
CV2
Block 2
(a) Example when each block is separated
CV1
CV2
Block 1
Block 2
No display
Block 1 (second)
No display
CV1
(b) Example when block 2 overlaps with block 1
Fig. 24 Display position
25
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
(3) Character Size
The size of characters to be displayed can be selected from three
sizes for each block. Use the character size register (address
00E416) to set a character size. The character size in block 1 can be
specified by using bits 0 and 1 in the character size register ; the
character size in block 2 can be specified by using bits 2 and 3. Figure 25 shows the structure of the character size register.
The character size can be selected from three sizes : small size, medium size and large size. Each character size is determined by the
number of scanning lines in the height (vertical) direction and the
cycle of display oscillation ( = Tc) in the width (horizontal) direction.
The small size consists of [one scanning line] ✕ [1 Tc] ; the medium
size consists of [two scanning lines] ✕ [2 Tc] ; and the large size consists of [three scanning lines] ✕ [3 Tc].
Table 5 shows the relationship between the set values in the character size register and the character sizes.
7
0
Character size register
(CS : address 00E416)
Character size of block 1 selection bits
00 : Minimum size
01 : Medium size
10 : Large size
11 : This is not available
Character size of block 2 selection bits
00 : Minimum size
01 : Medium size
10 : Large size
11 : This is not available
Fig. 25 Structure of character size register
Table 5. The relationship between the set values of the character size register and the character sizes
Set values of the character size register
CSn0
CSn1
Character
size
Width (horizontal) direction
Tc : oscillating cycle for display
Height (vertical) direction
scanning lines
0
0
0
1
Minimum
Medium
1 Tc
2 Tc
1
2
1
1
0
1
Large
3 Tc
This is not available
3
Note : The display start position in the horizontal direction is not affected by the character size. In other words, the horizontal display start position is common to
all blocks even when the character size varies with each block (refer to Figure 26).
26
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
(4) Memory for Display
There are two types of memory for display : ROM of CRT display (addresses 300016 to 35FF16 , 380016 to 3DFF16) used to store character dot data (masked) and display RAM (addresses 200016 to
20B116) used to specify the colors of characters to be displayed. The
following describes each type of display memory.
➀ ROM for display (addresses 300016 to 35FF16 and 380016 to
3DFF16)
The CRT display ROM contains dot pattern data for characters to be
displayed. For characters stored in this ROM to be actually displayed, it is necessary to specify them by writing the character code
inherent to each character (code determined based on the addresses in the CRT display ROM) into the CRT display RAM.
The CRT display ROM has a capacity of 3K bytes. Because 32 bytes
are required for one character data, the ROM can contain up to 96
kinds of characters.
The CRT display ROM space is broadly divided into two areas. The
[vertical 16 dots] × [horizontal (left side) 8 dots] data of display characters are stored in addresses 300016 to 35FF 16 ; the [vertical 16
dots] × [horizontal (right side) 4 dots] data of display characters are
stored in addresses 380016 to 3DFF16 (refer to Figure 27). Note however that the four upper bits in the data to be written to addresses
380016 to 3DFF16 must be set to “1” (by writing data F016 to FF16).
Table 6. Character code list
Character code
Minimum
0016
300016
to
300F16
380016
to
380F16
0116
301016
to
301F16
381016
to
381F16
0216
302016
to
302F16
382016
to
382F16
303016
to
303F16
:
310016
to
310F16
383016
to
383F16
:
390016
to
390F16
311016
to
311F16
:
34F016
to
34FF 16
391016
to
391F16
:
3CF0 16
to
3CFF16
350016
to
350F16
:
35D016
to
35DF 16
3D0016
to
3D0F 16
:
3DD016
to
3DDF16
5E16
35E0 16
to
35EF16
3DE016
to
3DEF16
5F16
35E0 16
to
35FF 16
3DF0 16
to
3DFF16
Medium
0316
:
1016
Large
1116
Horizontal display start position
Contained up address of character data
Left 8 dots lines
Right 4 dots lines
:
4F16
Fig. 26 Display start position of each character size
(horizontal direction)
5016
:
5D16
27
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
The character code used to specify a character to be displayed is
determined based on the address in the CRT display ROM in which
that character is stored.
Assume that data for one character is stored at addresses 3XX016 to
3XXF16 (XX denotes 0016 to 5F16) and addresses 3YY016 to 3YYF16
(YY denotes 8016 to DF16), then the character code for it is “XX16”.
bit 7
3XX016 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3XXF16 0
Fig. 27 Display character stored area
28
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
1
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
1
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
1
0
0
0
0
0
bit 0
0
0
0
0
0
1
1
1
0
0
1
0
0
0
0
0
In other words, character code for any given character is configured
with two middle digits of the four-digit (hexnotated) addresses 300016
to 35FF16 where data for that character is stored.
Table 6 lists the character codes.
bit 7
3XX016+80016 1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
3XXF16+80016 1 1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
bit 3
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
1 0
1 0
1 0
0 1
0 1
0 1
0 0
0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
bit 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
➁ RAM for display (address 200016 to 20B116 )
The CRT display RAM is allocated at addresses 200016 to 20B116 ,
and is divided into a display character code specifying part and display color specifying part for each block.
Table 7 shows the contents of the CRT display RAM.
When a character is to be displayed at the first character (leftmost)
position in block 1, for example, it is necessary to write the character
code to the seven low-order bits (bits 0 to 6) in address 200016 and
the color register No. to the two low-order bits (bits 0 and 1) in address 208016. The color register No. to be written here is one of the
four color registers in which the color to be displayed is set in advance. For details on color registers, refer to (5) Color Registers.
The structure of the CRT display RAM is shown in Figure 27.
Table 7. The contents of the CRT display RAM
Block
Block 1
Display position (from left)
1st character
2nd character
Character code specification
200016
200116
Color specification
208016
3rd character
:
16th character
200216
:
200F16
208216
:
208F16
17th character
18th character
201016
201116
209016
209116
201216
:
201F16
209216
:
209F16
1st character
2nd character
202016
202116
20A0 16
20A116
3rd character
:
16th character
202216
:
202F16
20A2 16
:
20AF16
17th character
18th character
203016
203116
20B0 16
20B116
203216
:
203F16
20B2 16
:
20BF16
Not used
Block 2
Not used
208116
29
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
Block 1
[Character specification]
1st character : 200016
to
18th character : 201116
7
0
Character code (0016 to 5F16)
Specify 96 characters
[Color specification]
1 0
1st character : 208016
to
18th character : 209116
Specify color select mode
00 : Color register 0 specification
01 : Color register 1 specification
10 : Color register 2 specification
11 : Color register 3 specification
Block 2
[Character specification]
1st character : 202016
to
18th character : 203116
7
0
Character code (0016 to 5F16)
Specify 96 characters
[Color specification]
1st character : 20A016
to
18th character : 20B116
1 0
Color register specification
00 : Color register 0 specification
01 : Color register 1 specification
10 : Color register 2 specification
11 : Color register 3 specification
Fig. 28 Structure of the CRT display RAM
30
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
(5) Color Registers
(6) Multiline Display
The color of a displayed character can be specified by setting the
color to one of the four color registers (CO0 to CO3 : addresses
00E616 to 00E9 16) and then specifying that color register with the
CRT display RAM.
There are three color outputs : R, G and B. By using a combination
of these outputs, it is possible to set 23 -1 (when no output) = 7 colors. However, because only four color registers are available, up to
four colors can be displayed at one time.
R, G and B outputs are set by using bits 1 to 3 in the color register.
Bit 5 is used to specify whether a character output or blank output.
Figure 29 shows the structure of the color register.
The M37210M3-XXXSP can normally display two lines on the CRT
screen by displaying two blocks at different vertical positions.
In addition, it allows up to 16 lines to be displayed by using a CRT
interrupt.
The CRT interrupt works in such a way that when display of one
block is terminated, an interrupt request is generated.
In other words, character display for a certain block is initiated when
the scanning line reaches the display position for that block (specified with vertical position register) and when the range of that block
is exceeded, an interrupt is applied.
7
0
Color registers 0,1,2,3
(CO0 : address 00E616)
(CO1 : address 00E716)
(CO2 : address 00E816)
(CO3 : address 00E916)
Note : A CRT interrupt does occurs at the end of display regardless
of display on or off. In other words, even if a block is set to off
display with the display control bit of the CRT control register
(address 00EA16 ), a CRT interrupt request occurs (refer to
Figure 30).
B signal output selection bit
0 : No character is output
1 : Character is output
G signal output selection bit
0 : No character is output
1 : Character is output
R signal output selection bit
0 : No character is output
1 : Character is output
OUT signal output selection bit (Note)
0 : OUT pin outputs character
1 : OUT pin outputs blank
Note : When the character bordering function is used, the contents
of this bit (bit 5) are invalied, and the OUT pin output becomes a border output.
Fig. 29 Structure of color registers
31
MITSUBISHI MICROCOMPUTERS
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
Block 1 (on display)
“CRT interrupt”
Block 2 (on display)
“CRT interrupt”
Block 1’ (on display)
“CRT interrupt”
Block 2’ (on display)
“CRT interrupt”
On display (“CRT interrupt” works after block)
Block 1 (off display)
“CRT interrupt”
Block 2 (off display)
“CRT interrupt”
Block 1’ (off display)
“CRT interrupt”
Block 2’ (off display)
“CRT interrupt”
Off display (“CRT interrupt” occurs after block)
(Note) : That is to say, “CRT interrupt” occurs even when it is off display by setting the display control flag of the CRT control
register (address 00EA16 ).
Fig. 30 Timing of CRT interrupt
32
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
(7) Character Border Function
An border of a one clock (one dot) equivalent size can be added to a
character to be displayed in both horizontal and vertical directions.
The border is output from the OUT pin. In this case, bit 5 in the color
register (contents output from the OUT pin) is nullified, and the border is output from the OUT pin instead.
Border can be specified in units of block by using the border select
register (address 00E516 ). Table 8 shows the relationship between
the values set in the border select register and the character border
function. Figure 32 shows the structure of the border select register.
Table 8. The relationship between the value set in the border selection register and the character border function
Border selection register
MDn0
Functions
0
Ordinary
R, G, B output
OUT output
1
Border including character
R, G, B output
OUT output
Example of output
7
0
Border selection register
(MD : address 00E516)
Block 1 OUT signal output border selection bit
0 : Same output as R, G, B is output
1 : Border output
Block 2 OUT signal output border selection bit
0 : Same output as R, G, B is output
1 : Border output
Fig. 32 Structure of border selection register
is border.
is display by character data.
Fig. 31 Example of border
33
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
(8) CRT Output Pin Control
CRT output pins R, G, B and OUT are respectively shared with port
P52, P53, P54 and P55. When the corresponding bits in the port P5
control register (address 00CB16) are cleared to “0”, the pins are set
for CRT output ; when the bits are set to “1”, the pins function as port
P5 (general- purpose output pins).
The polarities of CRT outputs (R, G, B and OUT, as well as HSYNC
and VSYNC) can be specified by using the CRT port control register
(address 00EC16).
Use bits 0 to 4 in the CRT port control register to set the output polarities of HSYNC , VSYNC , R/G/B and OUT. When these bits are
cleared to “0”, a positive polarity is selected ; when the bits are set to
“1”, a negative polarity is selected.
Bits 5 to 7 in the CRT port control register are used to specify pin by
pin whether normal video signals or R-MUTE, G-MUTE, and BMUTE signals are output from each pin (R, G, B). When set for RMUTE, G-MUTE, and B-MUTE outputs, the whole background
colors of the screen become red, green, and blue.
Figure 33 shows the structure of the CRT port control register.
7
0
Polarity register
(CRTP : address 00EC16)
HSYNC input polarity selection bit
0 : Positive polarity
1 : Negative polarity
VSYNC input polarity selection bit
0 : Positive polarity
1 : Negative polarity
R/G/B output polarity selection bit
0 : Positive polarity
1 : Negative polarity
OUT output polarity selection bit
0 : Positive polarity
1 : Negative polarity
R pin output switch bit
0 : R signal output
1 : R-MUTE signal output
G pin output switch bit
0 : G signal output
1 : G-MUTE signal output
B pin output switch bit
0 : B signal output
1 : B-MUTE signal output
Fig. 33 Structure of CRT port control register
34
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
INTERRUPT INTERVAL DETERMINATION
FUNCTION
The M37210M3-XXXSP incorporates an interrupt interval determination circuit. This interrupt interval determination circuit has an 8-bit
binary up counter as shown in Figure 34.
Using this counter, it determines an interval or a pulse width on the
INT1 or INT2 (refer to Figure 36).
The following describes how the interrupt interval is determined.
1. The interrupt input to be determined (INT1 input or INT2 input) is
selected by using bit 2 in the interrupt interval determination control register (address 00D816 ). When this bit is cleared to “0”, the
INT1 input is selected ; when the bit is set to “1”, the INT2 input is
selected.
2. When the INT1 input is to be determined, the polarity is selected
by using bit 3 of the interrupt interval determination control register ; when the INT2 input is to be determined, the polarity is selected by using bit 4 of the interrupt interval determination control
register.
When the relevant bit is cleared to “0”, determination is made of
the interval of a positive polarity (rising transition) ; when the bit is
set to “1”, determination is made of the interval of a negative po-
larity (falling transition).
3. The reference clock is selected by using bit 1 of the interrupt interval determination control register. When the bit is cleared to “0”, a
64ms clock is selected ; when the bit is set to “1”, a 32µs clock is
selected (based on an oscillation frequency of 4MHz in either
case).
4. Simultaneously when the input pulse of the specified polarity (rising or falling transition) occurs on the INT1 pin (or INT2 pin), the 8bit binary up counter starts counting up with the selected
reference clock (64µs or 32µs).
5. Simultaneously with the next input pulse, the value of the 8-bit binary up counter is loaded into the determination register (address
00D716) and the counter is immediately reset (0016 ). The reference clock is input in succession even after the counter is reset,
and the counter restarts counting up from “0016”.
6. When count value “FE16 ” is reached, the 8-bit binary up counter
stops counting. Then, simultaneously when the next reference
clock is input, the counter sets value “FF16 ” to the determination
register.
32µs
64µs
RE1
Control
circuit
8-bit binary up counter
RE0
8
INT2
INT1
(Note)






Interrupt interval determination register
RE2



Selection gate : Connected to black 
colored side at reset. 

Address 00D716
8
Data bus
RE : Interrupt interval determination control register
Note : The pulse width of external interrupt INT1 and INT2 needs 5 or more machine cycles.
Fig. 34 Block diagram of interrupt interval determination circuit
35
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
7
0
Interrupt interval determination control register
(RE : address 00D816)
Interrupt interval determination circuit operation control bit
0 : Stop
1 : Operation
Reference clock selection bit (At f (XIN) = 4MHZ)
0 : 64ms
1 : 32ms
External interrupt input pin selection bit
0 : INT1 input
1 : INT2 input
INT1 pin input polarity switch bit
0 : Positive polarity input
1 : Negative polarity input
INT2 pin input polarity switch bit
0 : Positive polarity input
1 : Negative polarity input
Interrupt interval determination mode switch bit
0 : Interrupt interval determination mode
1 : Pulse width determination mode
Fig. 35 Structure of interrupt space distinguish control register
INT1 or 2 input
RE5
RE4 (RE3)
0
0
0
1
1
1
0
1
count interval
REi : Bitsi (i = 3, 4, 5) of interrupt space distinguish control register (address 00D816 )
Fig. 36 Interrupt space distinguish control register setting value and the measuring interval
36
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
RESET CIRCUIT
The M37210M3-XXXSP is reset according to the sequence shown in
Figure 39. It starts the program from the address formed by using the
content of address FFFF1 6 as the high order address and the content of the address FFFE16 as the low order address, when the
RESET pin is held at “L” level for no less than 2µs while the power
voltage is 5V ± 10% and the crystal oscillator oscillation is stable and
then returned to “H” level. The internal initializations following reset
are shown in Figure 37.
An example of the reset circuit is shown in Figure 38. The reset input
voltage must be kept below 0.6V until the supply voltage surpasses
4.5V.
Power on
4.5V
Power source
voltage 0V
Reset input
voltage 0V
0.6V
27
Vcc
1
5
30
RESET
M51953AL
4
3
0.1 F
26
Vss
M37210M4-XXXSP
Fig. 38 Example of reset circuit
Address
(1) Port P0 directional register
( 0 0 C 1 16) …
0016
(30) Color register 2
( 0 0 E 8 16) …
0
0 0 0
(2) Port P1 directional register
( 0 0 C 3 16) …
0016
(31) Color register 3
( 0 0 E 9 16) …
0
0 0 0
(3) Port P2 directional register
( 0 0 C 5 16) …
0016
(32) CRT control register
( 0 0 E A 16) …
(4) Port P3
( 0 0 C 6 16) …
(33) CRT port control register
( 0 0 E C 16) … 0 0 0 0
0 0 0
(5) Port P3 directional register
( 0 0 C 7 16) …
(34) A-D mode register
( 0 0 E E 16)…
0 0 0
(6) Port P4
( 0 0 C 8 16) …
(35) A-D control register
( 0 0 E F 16)…
0 0 0 0 0
(7) Port P4 directional register
( 0 0 C 9 16) …
(36) Timer 1
( 0 0 F 0 16) …
FF16
(37) Timer 2
( 0 0 F 1 16) …
0716
(38) Timer 3
( 0 0 F 2 16) …
FF16
0716
(8) Port P5
( 0 0 C A 16) …
(9) Port P5 directional register
( 0 0 C B 16) …
0 0
0 0 0
0 0 0 0
0 0 0
(10) Port P6
( 0 0 C C 16) …
1 1 1 1
(39) Timer 4
( 0 0 F 3 16) …
(11) Port P6 directional register
( 0 0 C D 16) …
1 1 1 1
(40) Timer 12 mode register
( 0 0 F 4 16) …
0 0 0 0 0 0
(12) 14DA-L register
( 0 0 C F 16) …
(41) Timer 34 mode register
( 0 0 F 5 16) …
0 0 0 0 0 0
(13) PWM0 register
( 0 0 D 0 16) …
(42) PWM5 register
( 0 0 F 6 16) …
(14) PWM1 register
( 0 0 D 1 16) …
(43) PWM6 register (Note 3)
( 0 0 F 7 16) …
(15) PWM2 register
( 0 0 D 2 16) …
(44) PWM7 register (Note 3)
( 0 0 F 8 16) …
(16) PWM3 register
( 0 0 D 3 16) …
(45) CPU mode register
( 0 0 F B 16)… 1 1 1 1 1 1 0 0
(17) PWM4 register
( 0 0 D 4 16)…
(46) Interrupt request register 1
( 0 0 F C 16) …
(18) PWM output control register 1
( 0 0 D 5 16) …
0016
(47) Interrupt request register 2
( 0 0 F D 16) … 0
output control
(19) PWM
register 2(Note 2)
( 0 0 D 6 16) …
0 0 0 0 0
(48) Interrupt control register 1
( 0 0 F E 16) … 0 0 0 0 0 0 0 0
interval
(20) Interrupt
determination register
( 0 0 D 7 16) …
0016
(49) Interrupt control register 2
( 0 0 F F 16) … 0 0 0 0 0
0 0 0 0 0 0
0
0 0 0
interval
…
(21) Interrupt
determination control register ( 0 0 D 8 16)
0 0 0 0 0 0
(22) Serial I/O mode register
( 0 0 D C 16) …
0 0 0 0 0 0 0
(23) Horizontal position register
( 0 0 E 0 16) …
0 0 0 0 0 0
(24) Vertical position register 1
( 0 0 E 1 16) …
(25) Vertical position register 2
( 0 0 E 2 16) …
(26) Character size register
( 0 0 E 4 16) …
(27) Border selection register
( 0 0 E 5 16) …
(28) Color register 0
( 0 0 E 6 16) …
0
0 0 0
2 : The M37211M2-XXXSP is
(29) Color register 1
( 0 0 E 7 16) …
0
0 0 0
3 : The M37211M2-XXXSP dose not have this register.
(50) Processor status register
(51) Program counter
( P S )…
1
( P C M)…
Contents of address
F F F F 16
( P C L)…
Contents of address
F F F E 16
Notes 1 : Since the contents of both registers other than those listed
above and the RAM are undefined at reset, it is necessary to
set initial values.
“0” is read from all bits
which is not used.
0 0 0
Fig. 37 Internal state at reset
37
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
XIN
φ
RESET
Internal RESET
SYNC
?
Address
?
00,S 00,S-1 00,S-2 FFFE FFFF
ADH,
ADL
Reset address from the vector table
Data
?
?
PCH
32768 count of XIN clock cycle (Note 3)
Fig. 39 Reset sequence
38
PCL
PS
ADL
ADH
Note 1 : f (XIN ) and f (φ ) are in the relationship : f (XIN) = 2 · f (φ).
2 : A question mark (?) indicates an undefined state that
depends on the previous state.
3 : Immediately after a reset, FF16 is automatically set in
timer 3 and 0716 in timer 4 and timer 4, timer 3 and the
clock (f (XIN) divided by 16) are connected in series.
Reset state is canceled by the overflow signal of timer 4.
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
I/O PORTS
(1) Port P0
Port P0 is an 8-bit I/O port with N-channel open-drain output.
As shown in the memory map (Figure 3), port P0 can be accessed at zero page memory address 00C016.
Port P0 has a directional register (address 00C116) which can be
used to program each individual bit as input (“0”) or as output
(“1”). If the pins are programmed as output, the output data is
latched to the port register and then output. When data is read
from the output port the output pin level is not read, only the
latched data in the port register is read. This allows a previously
output value to be read correctly even though the output voltage
level is shifted up or down.
Pins set as input are in the floating state and the signal levels can
thus be read. When data is written into the input port, the data is
latched only to the port latch and the pin still remains in the floating state.
Ports P0 0-P03 are in common with 6-bit PWM outputs PWM4PWM7. For the M37211M2, ports P00 and P0 1 are in common
with 6-bit PWM outputs PWM4 and PWM5.
(2) Port P1
Port P1 has basically the same function as port P0 except the
output structure is CMOS output. But, pins P1 5-P1 7 are input
ports and in common with analog input pins A-D1-A-D3.
(3) Port P2
Port P2 has basically the same function as port P1.
(4) Port P3
Port P3 are a 2-bit I/O port and a 4-bit input port with function
similar to port P2, but the output structure of P30, P31 is CMOS
output.
P32, P33 are in common with the external clock input pins of timer
2 and 3.
P34, P3 5 are in common with the external interrupt input pins
INT1, INT2 and P35 with the analog input pin of A-D comparator
A-D4.
(5) Port P4
Port P4 are a 2-bit I/O port and a 1-bit input port with function
similar to port P2, but the output structure is N-channel opendrain output.
When a serial I/O function is selected, P40-P4 2 are in common
with pins SOUT, SCLK and SIN.
(6) OSC1, OSC2 pins
Clock input/output pins for CRT display function.
(7) HSYNC, VSYNC pins
HSYNC is a horizontal synchronizing signal input pin for CRT display.
VSYNC is a vertical synchronizing signal input pin for CRT display.
(8) R, G, B, OUT pins
This is an 4-bit output pin for CRT display and in common with
P52-P55.
(9) Port P6
Port P6 is an 4-bit output port with function similar to port P0, but
the output structure is N-channel opendrain output.
This port is in common with 6-bit PWM output pin PWM0-PWM3.
(10) D-A pin
This is a 14-bit PWM output pin.
39
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
N-channel open-drain output
Port P0
Directional register
Port P0
Data bus
Port latch
Port P10 – P14, P2, P30, P31
CMOS 3-state output
Directional register
Data bus
Port P10 – P14, P2, P30, P31
Port latch
Port P40,P41
N-channel open-drain output
Directional register
SIN/SCLK
Port P40,P41
Data bus
Fig. 40 I/O pin block diagram (1)
40
Port latch
Note : P40 , P41 can also be used as
serial I/O pins.
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
N-channel open-drain output
Port P6
Port P6
Data bus
Port latch
Note : P6 can also be used as
6-bit PWM output pins.
D-A, R, G, B, OUT
CMOS output
HSYNC, VSYNC
Internal circuit
Schmitt input
HSYNC, VSYNC
Internal circuit
D-A, R, G, B, OUT
Note : Pins R, G, B, and OUT can also be
used as output ports P52 – P55.
Port P15 – P17
Data bus
Port P15 – P17
TIM2, TIM3,
INT1, INT2,
or SIN
Data bus
Ports P32 – P35, P42
Note : P15 – P17 are in common with input Pins for A-D comparator.
P32, P33 are in common with timer inputs.
P34, P35 are in common with external interrupt inputs.
P42 is in common with input pins of serial I/O pins.
Fig. 41 I/O pin block diagram (2)
41
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
CLOCK GENERATING CIRCUIT
The built-in clock generating circuit is shown in Figure 44.
When the STP instruction is executed, the internal clock φ stops oscillating at “H” level. At the same time, timers 3 and 4 are connected
in hardware and “FF16” is set in the timer 3, “0716 ” is set in the timer
4. Select f(XIN)/16 as the timer 3 count source (set bit 0 of the timer
34 mode register to “0” before the execution of the STP instruction).
And besides, set the timer 3 and timer 4 interrupt enable bits to disabled (“0”) before execution of the STP instruction.
The oscillator is restarted when an external interrupt is accepted.
However, the internal clock φ keeps its “H” level until timer 4 overflows.
This is because the oscillator needs a set-up period if a ceramic resonator or a quartz-crystal oscillator is used.
When the WIT instruction is executed, the internal clock φ stops in the
“H” level but the oscillator continues running. This wait state is
cleared when an interrupt is accepted (Note). Since the oscillation
does not stop, the next instructions are executed at once.
To return from the stop or the wait state, set the interrupt enable bit to
“1” before executing the STP or the WIT instruction.
Note : In the wait mode, the following interrupts are invalid.
(1) VSYNC interrupt
(2) CRT interrupt
(3) Timer 2 interrupt using P32/TIM2 pin input as count source
(4) Timer 3 interrupt using P33/TIM3 pin input as count source
(5) Timer 4 interrupt using f(XIN)/2 as count source
The circuit example using a ceramic resonator (or a quartz crystal
oscillator) is shown in Figure 42.
Use the circuit constants in accordance with the resonator
manufacture’s recommended values.
The example of external clock usage is shown in Figure 43 XIN is the
input, and XOUT is open.
M37210M3-XXXSP
XIN
24
XOUT
25
CIN
COUT
Fig. 42 Ceramic resonator circuit example
M37210M3-XXXSP
XIN
24
Vcc
External oscillation
circuit
Vss
Fig. 43 External clock input circuit example
Interrupt request
Reset
S
Interrupt
disable flag I
S
Q
Q
S
Q
Reset
STP instruction
WIT
instruction
R
R
R
STP instruction
Internal clock φ
T34M0
1/2
1/8
Timer 3
T34M2
XIN
XOUT
Fig. 44 Clock generating circuit block diagram
42
TIM3




Timer 4


Selection gate: Connected to black 
colored side at reset. 
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
PROGRAMMING NOTES
(1) The divide ratio of the timer is 1/ (n + 1).
(2) Even though the BBC and BBS instructions are executed immediately after the interrupt request bits are modified (by the program), those instructions are only valid for the contents before
the modification. At least one instruction cycle is needed (such as
an NOP) between the modification of the interrupt request bits
and the execution of the BBC and BBS instructions.
(3) After the ADC and SBC instructions are executed (indecimal operation mode), one instruction cycle (such as an NOP) is needed
before the SEC, CLC, or CLD instructions are executed.
(4) An NOP instruction is needed immediately after the execution of
a PLP instruction.
(5) In order to avoid noise and latch-up, connect a bypass capacitor
( ≈ 0.1µF) directly between the VCC pin and VSS pin using a thick
wire.
DATA REQUIRED FOR MASK ORDERS
The following are necessary when ordering a mask ROM production.
(1) Mask ROM Order Confirmation Form
(2) Mark Specification Form
(3) Data to be written to ROM, in EPROM form (28-pin DIP type
27256, three identical copies)
PROM Programming Method
The built-in PROM of the blank One Time PROM version and built-in
EPROM version can be read or programmed with a general-purpose
PROM programmer using a special programming adapter.
Product
M37210E4SP
M37210E4FP
Name of Programming Adapter
PCA4754
PCA4756
The PROM of the blank One Time PROM version is not tested
or screened in the assembly process and following processes. To
ensure proper operation after programming, the procedure shown
in Figure 45 is recommended to verify programming.
Programming with
PROM programmer
Screening (Caution)
(150 for 40 hours)
Verification with
PROM programmer
Functional check in target device
Caution : The screening temperature is far higher than the
storage temperature. Never expose to 150°C exceeding 100 hours.
Fig. 45 Programming and testing of One Time PROM version
43
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
ABSOLUTE MAXIMUM RATINGS
Symbol
VCC
VI
VI
VO
VO
IOH
IOL1
IOL2
IOL3
Pd
Topr
Tstg
Parameter
Power source voltage
Input voltage CNVSS
Input voltage P00 – P07, P1 0 – P17, P2 0 – P27 ,
P30 – P35, P4 0 – P42, H SYNC,
VSYNC, RESET, OSC1, XIN
Output voltage P10 – P14, P20 – P27, P30 , P31,
P40, P41, R, G, B, OUT, D-A,
XOUT, OSC2
Output voltage P60 – P63, P00 – P07
“H” average output current R, G, B, OUT, P10 – P14,
P20 – P23, P3 0, P31,
D-A
“L” average output current R, G, B, OUT, P10 – P1 4,
P20 – P23, P3 0, P31, P4 0, P4 1
D-A
“L” average output current P60 – P63 , P00 – P07
“L” average output current P24 – P27
Power dissipation
Operating temperature
Storage temperature
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
VSS
VIH
VIL
VIL
IOH
IOL1
IOL2
IOL3
fCPU
fCRT
fhs
fhs
Conditions
All voltages are based on
VSS.
Output transistors are
cut off.
Unit
V
V
– 0.3 to VCC + 0.3
V
– 0.3 to V CC + 0.3
V
– 0.3 to 13
V
0 to 1 (Note 1)
mA
0 to 2 (Note 2)
mA
0 to 1 (Note 2)
0 to 10 (Note 3)
550
– 10 to 70
– 40 to 125
mA
mA
mW
°C
°C
Ta = 25°C
(VCC = 5V ± 10%, Ta = –10 to 70°C unless otherwise noted)
Parameter
Power source voltage (Note 4)
During the CPU and the CRT operation
Power source voltage
“H” input voltage P00 – P07, P1 0 – P17, P2 0 – P27 ,
P30 – P35, P4 0 – P42, H SYNC,
VSYNC, RESET, XIN, OSC1,
TIM2, TIM3, INT1, INT2, SIN, SCLK
“L” input voltage P00 – P07, P1 0 – P17, P2 0 – P27 ,
P30 – P35, P4 0 – P42
“L” input voltage TIM2, TIM3, INT1, INT2, SIN, SCLK,
HSYNC, VSYNC, RESET, XIN, OSC1
“H” average output current (Note 1) R, G, B, OUT,
P10 – P14, P2 0 – P27, P3 0, P31 , D-A
“L” average output current (Note 2) R, G, B, OUT, P10 – P14,
P20 – P23, P3 0, P31, P4 0, P41, D-A
“L” average output current (Note 2) P60 – P63, P00 – P07
“L” average output current (Note 3) P24 – P2 7
Oscillation frequency (for CPU operation)(Note 5)
Oscillation frequency (for CRT display)
Input frequency TIM2, TIM3, INT1, INT2
Input frequency SCLK
Min.
4.5
0
Limits
Typ.
5.0
0
0.8VCC
Max.
5.5
0
Unit
V
V
VCC
V
0
0.4VCC
V
0
0.2VCC
V
3.6
4.0
4.0
5.0
1
mA
2
mA
1
10
8.1
6.0
100
1
Notes 1 : The total current that flows out of the IC should be 20mA (max.).
2 : The total of IOL1 and IOL2 should be 30mA (max.).
3 : The total of IOL of port P24-P27 should be 20mA (max.).
4 : Connect 0.022µF or more capacitor externally between the V CC – VSS power source pins so as to reduce power
source noise.
Also connect 0.068µF or more capacitor externally between the V CC – CNVSS pins.
5 : Use a quartz-crystal oscillator or a ceramic resonator for CPU oscillation circuit.
44
Ratings
– 0.3 to 6
– 0.3 to 6
mA
mA
MHz
MHz
kHz
MHz
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
ELECTRIC CHARACTERISTICS
Symbol
(VCC = 5V ± 10%, VSS = 0V, Ta = – 10 to 70°C, f (XIN) = 4MHz unless otherwise noted)
Parameter
Test conditions
VCC = 5.5V
f (XIN) = 4MHz
ICC
VOH
VOL
Power source current
“H” output voltage P10 – P14, P20 – P27,
P30, P31, R, G, B, OUT, D-A
“L” output voltage P10 – P14, P2 0 – P23, P3 0, P31,
P40, P41, R, G, B, OUT, D-A
“L” output voltage P60 – P63, P0 0 – P07
“L” output voltage P24 – P27
VT + – VT–
IIZH
IIZL
IOZH
Hysteresis RESET
Hysteresis (Note) HSYNC, VSYNC, TIM2, TIM3,
INT1, INT2, SIN, SCLK
“H” input leak current RESET, P00 – P07,
P10 – P17, P2 0 – P27,
P30 – P35, P4 0 – P42, H SYNC, VSYNC
“L” input leak current RESET, P00 – P07 ,
P10 – P17, P2 0 – P27, P3 0 – P35,
P40 – P42, P6 0 – P63, H SYNC, VSYNC
“H” input leak current
P60 – P63, P0 0 – P07
VCC = 5.5V
f (XIN) = 8MHz
C
R
T
C
R
T
OFF
ON
OFF
ON
At stop mode
VCC = 4.5V
IOH = – 0.5mA
VCC = 4.5V
IOL = 0.5mA
VCC = 4.5V
IOL = 0.5mA
VCC = 4.5V
IOL = 10.0mA
VCC = 5.0V
VCC = 5.0V
Min.
–
–
–
–
–
Limits
Typ.
10
20
20
30
–
Max.
20
40
40
60
300
2.4
Unit
mA
mA
µA
V
0.4
0.4
V
3.0
0.5
0.7
0.5
1.3
V
VCC = 5.5V
VI = 5.5V
5
µA
VCC = 5.5V
VI = 0V
5
µA
VCC = 5.5V
VO = 12V
10
µA
Note : P3 2 – P35 , have the hysteresis when these pins are used as interrupt input pins or timer input pins.
P40 – P4 2 have the hysteresis when these pins are used as serial I/O ports.
45
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
PACKAGE OUTLINE
46
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
GZZ–SH06–09B < 25C0 >
Mask ROM number
740 FAMILY MASK ROM CONFIRMATION FORM
SINGLE-CHIP MICROCOMPUTER M37210M3-XXXSP/FP
MITSUBISHI ELECTRIC
Receipt
Date :
Section head
signature
Supervisor
signature
Note : Please fill in all items marked ❈.
Customer
Date
issued
Date :
Issuance
❈
Submitted by
)
Supervisor
signature
TEL
(
Company
name
❈ 1. Confirmation
Specify the name of the product being ordered and the type of EPROMs submitted.
Three EPROMs are required for each pattern.
If at least two of the three sets of EPROMs submitted contain identical data, we will produce masks based on
this data. We shall assume the responsibility for errors only if the mask ROM data on the products we produce
differs from this data. Thus, extreme care must be taken to verify the data in the submitted EPROMs.
Microcomputer name :
M37210M3-XXXSP
Checksum code for entire EPROM
M37210M3-XXXFP
(hexadecimal notation)
EPROM type (indicate the type used)
27256
EPROM address
000016
Product name
000F16
100016
15FF16
180016
1DFF16
500016
AAA
AAA
AAA
ASCII code :
‘M37210M3 –’
Character ROM1
Character ROM2
ROM (12K bytes)
7FFF16
(1)
(2)
Set “FF16” in the shaded area.
Write the ASCII codes that indicates the product name of “M37210M3–” to addresses 000016 to 000F16.
❈ 2. Mark specification
Mark specification must be submitted using the correct form for the type package being ordered fill out the appropriate
mark specification form (52P4B for M37210M3-XXXSP; 64P6N for M37210M3-XXXFP) and attach to the mask ROM
confirmation form.
❈ 3. Comments
(1/3)
47
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
GZZ–SH06–09B < 25C0 >
740 FAMILY MASK ROM CONFIRMATION FORM
SINGLE-CHIP MICROCOMPUTER M37210M3-XXXSP/FP
MITSUBISHI ELECTRIC
Writing the product name and character ROM data onto EPROMs
Addresses 000016 to 000F16 store the product name, and addresses 100016 to 15FF16 and addresses 180016 to 1DFF16
store the character pattern.
If the name of the product contained in the EPROMs does not match the name on the mask ROM confirmation form, the
ROM processing is disabled. Write the data correctly.
1. Inputting the name of the product with the ASCII code
ASCII codes ‘M37210M3-’ are listed on the right.
The addresses and data are in hexadecimal notation.
Address
000016
000116
000216
000316
000416
000516
000616
000716
‘M’ = 4 D
‘3’ = 3 3
‘7’ = 3 7
‘2’ = 3 2
‘1’ = 3 1
‘0’ = 3 0
‘M’ = 4 D
‘3’ = 3 3
16
16
16
16
16
16
16
16
Address
000816
000916
000A16
000B16
000C16
000D16
000E16
000F16
‘–’ = 2 D 16
F F 16
F F 16
F F 16
F F 16
F F 16
F F 16
F F 16
2. Inputting the character ROM
Input the character ROM data by dividing it into character ROM1 and character ROM2. For the character ROM data,
see the next page and on.
(2/3)
48
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
GZZ–SH06–09B < 25C0>
740 FAMILY MASK ROM CONFIRMATION FORM
SINGLE-CHIP MICROCOMPUTER M37210M3-XXXSP/FP
MITSUBISHI ELECTRIC
The structure of character ROM (divided of 12✕16 dots font)
Example
Character code
“1A16”
Character
ROM2
⇐
Character
ROM1
11A016
to
11AF16
⇐
Example
b7 b6 b5 b4 b3 b2 b1 b0
0
0016
1
2
0416
0416
3
4
5
Example
19A016
to
19AF16
b7 b6 b5 b4 b3 b2 b1 b0
0
F016
1
2
F016
F016
0A16
0A16
1116
3
4
5
F016
F016
F016
6
7
1116
1116
6
7
F016
F016
8
9
2016
2016
8
9
A
B
C
3F16
4016
4016
A
B
C
F816
F416
F416
D
E
4016
0016
D
E
F416
F016
F
0016
F
F016
F16
F816
F816
(3/3)
49
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
GZZ–SH06–10B < 25B0 >
Mask ROM number
740 FAMILY MASK ROM CONFIRMATION FORM
SINGLE-CHIP MICROCOMPUTER M37210M4-XXXSP
MITSUBISHI ELECTRIC
Receipt
Date :
Section head
signature
Supervisor
signature
Note : Please fill in all items marked ❈.
Customer
Date
issued
Date :
Issuance
❈
Submitted by
)
Supervisor
signature
TEL
(
Company
name
❈ 1. Confirmation
Specify the name of the product being ordered and the type of EPROMs submitted.
Three EPROMs are required for each pattern.
If at least two of the three sets of EPROMs submitted contain identical data, we will produce masks based on
this data. We shall assume the responsibility for errors only if the mask ROM data on the products we produce
differs from this data. Thus, extreme care must be taken to verify the data in the submitted EPROMs.
Checksum code for entire EPROM
(hexadecimal notation)
EPROM type (indicate the type used)
27256
AAA
AAA
AAA
EPROM address
000016
Product name
000F16
100016
15FF16
180016
1DFF16
400016
ASCII code :
‘M37210M4 –’
Character ROM1
Character ROM2
ROM (16K bytes)
7FFF16
(1)
(2)
Set “FF16” in the shaded area.
Write the ASCII codes that indicates the product name of “M37210M4–” to addresses 000016 to 000F16.
❈ 2. Mark specification
Mark specification must be submitted using the correct form for the type package being ordered fill out the appropriate
mark specification form (52P4B for M37210M4-XXXSP) and attach to the mask ROM confirmation form.
❈ 3. Comments
(1/3)
50
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
GZZ–SH06–10B < 25B0 >
740 FAMILY MASK ROM CONFIRMATION FORM
SINGLE-CHIP MICROCOMPUTER M37210M4-XXXSP
MITSUBISHI ELECTRIC
Writing the product name and character ROM data onto EPROMs
Addresses 000016 to 000F16 store the product name, and addresses 100016 to 15FF16 and addresses 180016 to 1DFF16
store the character pattern.
If the name of the product contained in the EPROMs does not match the name on the mask ROM confirmation form, the
ROM processing is disabled. Write the data correctly.
1. Inputting the name of the product with the ASCII code
ASCII codes ‘M37210M4-’ are listed on the right.
The addresses and data are in hexadecimal notation.
Address
000016
000116
000216
000316
000416
000516
000616
000716
‘M’ = 4 D
‘3’ = 3 3
‘7’ = 3 7
‘2’ = 3 2
‘1’ = 3 1
‘0’ = 3 0
‘M’ = 4 D
‘4’ = 3 4
16
16
16
16
16
16
16
16
Address
000816
000916
000A16
000B16
000C16
000D16
000E16
000F16
‘–’ = 2 D 16
F F 16
F F 16
F F 16
F F 16
F F 16
F F 16
F F 16
2. Inputting the character ROM
Input the character ROM data by dividing it into character ROM1 and character ROM2. For the character ROM data,
see the next page and on.
(2/3)
51
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
GZZ–SH06–10B < 25B0 >
740 FAMILY MASK ROM CONFIRMATION FORM
SINGLE-CHIP MICROCOMPUTER M37210M4-XXXSP
MITSUBISHI ELECTRIC
The structure of character ROM (divided of 12✕16 dots font)
Example
Character code
“1A16”
Character
ROM2
⇐
Character
ROM1
11A016
to
11AF16
⇐
Example
b7 b6 b5 b4 b3 b2 b1 b0
0
0016
1
2
0416
0416
3
4
5
Example
b7 b6 b5 b4 b3 b2 b1 b0
0
F016
1
2
F016
F016
0A16
0A16
1116
3
4
5
F016
F016
F016
6
7
1116
1116
6
7
F016
F016
8
9
2016
2016
8
9
A
B
C
3F16
4016
4016
A
B
C
F816
F416
F416
D
E
4016
0016
D
E
F416
F016
F
0016
F
F016
(3/3)
52
19A016
to
19AF16
F16
F816
F816
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
GZZ–SH06–11B < 25B1 >
Mask ROM number
740 FAMILY MASK ROM CONFIRMATION FORM
SINGLE-CHIP MICROCOMPUTER M37211M2-XXXSP
MITSUBISHI ELECTRIC
Receipt
Date :
Section head
signature
Supervisor
signature
Note : Please fill in all items marked ❈.
Customer
Date
issued
Date :
Issuance
❈
Submitted by
)
Supervisor
signature
TEL
(
Company
name
❈ 1. Confirmation
Specify the name of the product being ordered and the type of EPROMs submitted.
Three EPROMs are required for each pattern.
If at least two of the three sets of EPROMs submitted contain identical data, we will produce masks based on
this data. We shall assume the responsibility for errors only if the mask ROM data on the products we produce
differs from this data. Thus, extreme care must be taken to verify the data in the submitted EPROMs.
Checksum code for entire EPROM
(hexadecimal notation)
EPROM type (indicate the type used)
27256
AAA
AAA
AAA
EPROM address
000016
Product name
000F16
100016
15FF16
180016
1DFF16
600016
ASCII code :
‘M37211M2 –’
Character ROM1
Character ROM2
ROM (8K bytes)
7FFF16
(1)
(2)
Set “FF16” in the shaded area.
Write the ASCII codes that indicates the product name of “M37211M2–” to addresses 000016 to 000F16.
❈ 2. Mark specification
Mark specification must be submitted using the correct form for the type package being ordered fill out the appropriate
mark specification form (52P4B for M37211M2-XXXSP) and attach to the mask ROM confirmation form.
❈ 3. Note
(1)
(2)
Set the stack page selection bit to “0”, because this bit is set to “1” after reset but the internal RAM is located at 0
page only.
Both P02 pin (9th pin) and P03 pin (10th pin) are not used as PWM output pins.
❈ 4. Comments
(1/3)
53
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
GZZ–SH06–11B< 25B1 >
740 FAMILY MASK ROM CONFIRMATION FORM
SINGLE-CHIP MICROCOMPUTER M37211M2-XXXSP
MITSUBISHI ELECTRIC
Writing the product name and character ROM data onto EPROMs
Addresses 000016 to 000F16 store the product name, and addresses 100016 to 15FF16 and addresses 180016 to 1DFF16
store the character pattern.
If the name of the product contained in the EPROMs does not match the name on the mask ROM confirmation form, the
ROM processing is disabled. Write the data correctly.
1. Inputting the name of the product with the ASCII code
ASCII codes ‘M37211M2-’ are listed on the right.
The addresses and data are in hexadecimal notation.
Address
000016
000116
000216
000316
000416
000516
000616
000716
‘M’ = 4 D
‘3’ = 3 3
‘7’ = 3 7
‘2’ = 3 2
‘1’ = 3 1
‘1’ = 3 1
‘M’ = 4 D
‘2’ = 3 2
16
16
16
16
16
16
16
16
Address
000816
000916
000A16
000B16
000C16
000D16
000E16
000F16
‘–’ = 2 D 16
F F 16
F F 16
F F 16
F F 16
F F 16
F F 16
F F 16
2. Inputting the character ROM
Input the character ROM data by dividing it into character ROM1 and character ROM2. For the character ROM data,
see the next page and on.
(2/3)
54
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
GZZ–SH06–11B < 25B1 >
740 FAMILY MASK ROM CONFIRMATION FORM
SINGLE-CHIP MICROCOMPUTER M37211M2-XXXSP
MITSUBISHI ELECTRIC
The structure of character ROM (divided of 12 ✕16 dots font)
Example
Character code
“1A16”
Character
ROM1
⇐
⇐
Character
ROM2
Example
11A0 16
0
to
1
11AF 16
2
3
4
5
6
7
8
9
A
B
C
D
E
F
b7 b6 b5 b4 b3 b2 b1 b0
0016
0416
0416
0A16
0A16
1116
1116
1116
2016
2016
3F16
4016
4016
4016
0016
0016
Example
19A0 16
0
to
1
19AF 16
2
3
4
5
6
7
8
9
A
B
C
D
E
F
b7 b6 b5 b4 b3 b2 b1 b0
F16
F016
F016
F016
F016
F016
F016
F016
F016
F816
F816
F816
F416
F416
F416
F016
F016
(3/3)
55
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
56
MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
57
MITSUBISHI DATA BOOK
SINGLE-CHIP 8-BIT MICROCOMPUTERS Vol.3
Sep. First Edition 1996 H-DF319-B
Editioned by
Committee of editing of Mitsubishi Semiconductor Data Book
Published by
Mitsubishi Electric Corp., Semiconductor Division
This book, or parts thereof, may not be reproduced in any form without permission of
Mitsubishi Electric Corporation.
REVISION DESCRIPTION LIST
Rev.
No.
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP,
M37210E4-XXXSP/FP, M37210E4SP/FP
DATA SHEET
Revision Description
Rev.
date
1.0
First Edition
9708
2.0
Information about copyright note, revision number, release date added (last page).
971130
(1/1)
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