Maxim MAX8725 Multichemistry battery charger with automatic system power selector Datasheet

19-2805; Rev 2; 9/04
ILABLE
N KIT AVA
EVALUATIO
Multichemistry Battery Chargers with Automatic
System Power Selector
The MAX1909/MAX8725 highly integrated control ICs
simplify construction of accurate and efficient multichemistry battery chargers. The MAX1909/MAX8725
use analog inputs to control charge current and voltage, and can be programmed by a host microcontroller
(µC) or hardwired. High efficiency is achieved through
use of buck topology with synchronous rectification.
The maximum current drawn from the AC adapter is programmable to avoid overloading the AC adapter when
supplying the load and the battery charger simultaneously. The MAX1909/MAX8725 provide a digital output
that indicates the presence of an AC adapter, and an
analog output that monitors the current drawn from the
AC adapter. Based on the presence or absence of the
AC adapter, the MAX1909/MAX8725 automatically select
the appropriate source for supplying power to the system by controlling two external p-channel MOSFETs.
Under system control, the MAX1909/MAX8725 allow the
battery to undergo a relearning or conditioning cycle in
which the battery is completely discharged through the
system load and then recharged.
The MAX1909 includes a conditioning charge feature
while the MAX8725 does not. The MAX1909/MAX8725
are available in space-saving 28-pin, 5mm ✕ 5mm thin
QFN packages and operate over the extended -40°C to
+85°C temperature range. The MAX1909/MAX8725 are
now available in lead-free packages.
Applications
Features
♦
♦
♦
♦
♦
♦
♦
♦
♦
♦
♦
±0.5% Accurate Charge Voltage (0°C to +85°C)
±3% Accurate Input Current Limiting
±5% Accurate Charge Current
Programmable Charge Current >4A
Automatic System Power-Source Selection
Analog Inputs Control Charge Current and
Charge Voltage
Monitor Outputs for
Current Drawn from AC Input Source
AC Adapter Presence
Up to 17.65V (max) Battery Voltage
Maximum 28V Input Voltage
Greater than 95% Efficiency
Charge Any Battery Chemistry: Li+, NiCd, NiMH,
Lead Acid, etc.
Ordering Information
PART
TEMP RANGE
MAX1909ETI
-40°C to +85°C
28 Thin QFN
MAX1909ETI+
-40°C to +85°C
28 Thin QFN
MAX8725ETI
-40°C to +85°C
28 Thin QFN
MAX8725ETI+
-40°C to +85°C
28 Thin QFN
+Denotes
lead-free package.
Minimum Operating Circuit
P3
SRC
CSSP
SRC
DHIV
25
DHI
CSSP
CSSN
PDL
PDS
26
24
23
22
DHIV
SRC
PDL
P2
DCIN
VCTL
27
CSSN
PDS
Pin Configuration
28
TO
EXTERNAL LOAD
0.01Ω
AC ADAPTER: INPUT
Notebook and Subnotebook Computers
Hand-Held Data Terminals
TOP VIEW
PIN-PACKAGE
MAX1909 LDO
MAX8725
ICTL
LDO
MODE
DLOV
ACIN
LDO
DCIN
1
21
DLOV
LDO
2
20
DLO
ACIN
3
19
PGND
REF
4
18
CSIP
GND/PKPRES
5
17
CSIN
ACOK
6
16
BATT
MODE
7
15
GND
IINP
IINP
REF
CLS
P1
DHI
ACOK
MAX1909
MAX8725
LDO
DLO
IINP
CLS
ICTL
VCTL
0.015Ω
12
13
14
CCV
CCI
CCS
11
CSIP
CCI
10
PKPRES
CCV
9
10µH
PGND
MAX8725 ONLY
8
N1
CCS
CSIN
REF
BATT
GND
THIN QFN
Functional Diagrams appear at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX1909/MAX8725
General Description
MAX1909/MAX8725
Multichemistry Battery Chargers with Automatic
System Power Selector
ABSOLUTE MAXIMUM RATINGS
DCIN, CSSP, CSSN, SRC, ACOK to GND..............-0.3V to +30V
DHIV ........................................................…SRC + 0.3, SRC - 6V
DHI, PDL, PDS to GND ...............................-0.3V to (VSRC + 0.3)
BATT, CSIP, CSIN to GND .....................................-0.3V to +20V
CSIP to CSIN or CSSP to CSSN or PGND to GND ...-0.3V to +0.3V
CCI, CCS, CCV, DLO, IINP, REF,
ACIN to GND ........................................-0.3V to (VLDO + 0.3V)
DLOV, VCTL, ICTL, MODE, CLS, LDO,
PKPRES to GND ...................................................-0.3V to +6V
DLOV to LDO.........................................................-0.3V to +0.3V
DLO to PGND ..........................................-0.3V to (DLOV + 0.3V)
LDO Short-Circuit Current...................................................50mA
Continuous Power Dissipation (TA = +70°C)
28-Pin TQFN (derate 20.8mW/°C above +70°C) .......1666mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
0
3.6
V
VVCTL = 3.6V (3 or 4 cells);
not including VCTL resistor tolerances
-0.8
+0.8
VVCTL = 3.6V/20 (3 or 4 cells); not including
VCTL resistor tolerances
-0.8
+0.8
VVCTL = 3.6V (3 or 4 cells); including VCTL
resistor tolerances of 1%
-1.0
+1.0
VVCTL = VLDO (3 or 4 cells, default
threshold of 4.2V/cell)
-0.5
+0.5
VVCTL rising
4.1
4.3
VVCTL = 3V
0
2.5
VDCIN = 0, VVCTL = 5V
0
12
MAX1909
0
3.6
MAX8725
0
3.2
CHARGE VOLTAGE REGULATION
VCTL Range
Battery Regulation Voltage
Accuracy
VVCTL Default Threshold
VCTL Input Bias Current
%
V
µA
CHARGE-CURRENT REGULATION
ICTL Range
CSIP-to-CSIN Full-Scale CurrentSense Voltage
Charge-Current Accuracy
2
69.37
75.00
80.63
MAX1909: VICTL = 3.6V (not including ICTL
resistor tolerances)
-7.5
+7.5
MAX8725: VICTL = 3.2V (not including ICTL
resistor tolerances)
-5
+5
MAX1909: VICTL = 3.6V x 0.5, MAX8725:
VICTL = 3.2V x 0.5 (not including ICTL
resistor tolerances)
-5
+5
MAX1909: VICTL = 0.9V (not including ICTL
resistor tolerances)
-7.5
+7.5
MAX8725: VICTL = 0.18V (not including
ICTL resistor tolerances)
-30
+30
_______________________________________________________________________________________
V
mV
%
Multichemistry Battery Chargers with Automatic
System Power Selector
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
Charge-Current Accuracy
VICTL Default Threshold
SYMBOL
CONDITIONS
TYP
MAX
MAX1909: VICTL = 3.6V x 0.5, MAX8725:
VICTL = 3.2V x 0.5 (including ICTL resistor
tolerances of 1%)
-7.0
+7.0
VICTL = VLDO (default threshold of 45mV)
-5
+5
VICTL rising
4.1
BATT/CSIP/CSIN Input Voltage
Range
CSIP/CSIN Input Current
MIN
4.2
0
%
4.3
V
19
V
Charging enabled
350
650
Charging disabled; VDCIN = 0 or VICTL = 0
0.1
1
ICTL Power-Down Mode
Threshold Voltage
MAX1909
0.75
MAX8725
0.06
ICTL Power-Up Mode Threshold
Voltage
MAX1909
0.85
MAX8725
0.11
VICTL = 3V
-1
+1
VDCIN = 0V, VICTL = 5V
-1
+1
ICTL Input Bias Current
UNITS
µA
V
V
µA
INPUT CURRENT REGULATION
CSSP-to-CSSN Full-Scale
Current-Sense Voltage
Input Current-Limit
Accuracy
72.75
77.25
VCLS = REF
-3
+3
VCLS = REF x 0.75
-3
+3
VCLS = REF x 0.5
-4
+4
CSSP/CSSN Input Voltage Range
CSSP/CSSN Input Current
75.00
8.0
28
VCSSP = VCSSN = VDCIN > 8.0V
450
730
VDCIN = 0
0.1
1
CLS Input Range
mV
%
V
µA
1.6
REF
V
CLS Input Bias Current
VCLS = 2.0V
-1
+1
µA
IINP Transconductance
VCSSP - VCSSN = 56mV
2.7
3.3
mA/V
VCSSP - VCSSN = 75mV, terminated with
10kΩ
-7.5
+7.5
VCSSP - VCSSN = 56mV, terminated with
10kΩ
-5
+5
VCSSP - VCSSN = 20mV, terminated with
10kΩ
-10
+10
IINP Output Current
VCSSP - VCSSN = 150mV, VIINP = 0V
350
µA
IINP Output Voltage
VCSSP - VCSSN = 150mV, VIINP = float
3.5
V
IINP Accuracy
3.0
%
_______________________________________________________________________________________
3
MAX1909/MAX8725
ELECTRICAL CHARACTERISTICS (continued)
MAX1909/MAX8725
Multichemistry Battery Chargers with Automatic
System Power Selector
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
28
V
SUPPLY AND LINEAR REGULATOR
DCIN Input Voltage Range
VDCIN
8.0
DCIN falling
DCIN Undervoltage-Lockout Trip
Point
DCIN Quiescent Current
IDCIN
BATT Input Current
IBATT
7
7.4
DCIN rising
7.5
7.85
8.0V < VDCIN < 28V
2.7
6
VBATT = 19V, VDCIN = 0V, or ICTL = 0V
0.1
1
VBATT = 16.8V, VDCIN = 19V, ICTL = 0V
0.1
1
VBATT = 2V to 19V, VDCIN > VBATT + 0.3V
LDO Output Voltage
8.0V < VDCIN < 28V, no load
LDO Load Regulation
0 < ILDO < 10mA
LDO Undervoltage-Lockout Trip
Point
VDCIN = 8.0V
V
mA
µA
200
500
5.4
5.55
V
80
115
mV
3.20
4
5.15
V
4.2023
4.2235
4.2447
V
3.1
3.9
V
50
100
150
mV
100
200
300
mV
2.007
2.048
2.089
V
10
20
30
mV
+1
µA
ns
5.25
REFERENCE
REF Output Voltage
Ref
REF Undervoltage-Lockout Trip
Point
0 < IREF < 500µA
REF falling
TRIP POINTS
BATT POWER_FAIL Threshold
VDCIN - VBATT, VDCIN falling
BATT POWER_FAIL Threshold
Hysteresis
ACIN Threshold
ACIN rising
ACIN Threshold Hysteresis
ACIN Input Bias Current
VACIN = 2.048V
-1
SWITCHING REGULATOR
DHI Off-Time
DHI Minimum Off-Time
DLOV Supply Current
IDLOV
VBATT = 16.0V, VDCIN = 19V, VMODE = 3.6V
360
400
440
VBATT = 16.0V, VDCIN = 17V, VMODE = 3.6V
260
300
350
ns
5
10
µA
DLO low
Sense Voltage for Minimum
Discontinuous Mode Ripple
Current
7.5
mV
Cycle-by-Cycle Current-Limit
Sense Voltage
97
mV
Sense Voltage for Battery
Undervoltage Charge Current
Battery Undervoltage Threshold
DHIV Output Voltage
4
MAX1909 only, BATT = 3.0V per cell
3
MAX1909 only, MODE = float (3 cell),
VBATT rising
9.18
MAX1909 only, MODE = LDO (4 cell),
VBATT rising
12.235
With respect to SRC
4.5
6
mV
9.42
V
-4.5
12.565
-5.0
_______________________________________________________________________________________
-5.5
V
Multichemistry Battery Chargers with Automatic
System Power Selector
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
DHIV Sink Current
MIN
TYP
MAX
10
UNITS
mA
DHI On-Resistance Low
DHI = VDHIV, IDHI = -10mA
2
5
Ω
DHI On-Resistance High
DHI = VCSSN, IDHI = 10mA
2
4
Ω
DLO On-Resistance High
VDLOV = 4.5V, IDLO = +100mA
3
7
Ω
DLO On-Resistance Low
VDLOV = 4.5V, IDLO = -100mA
1
3
Ω
ERROR AMPLIFIERS
VCTL = 3.6, VBATT = 16.8V, MODE = LDO
0.0625
0.125
0.2500
VCTL = 3.6, VBATT = 12.6V, MODE = FLOAT
0.0833
0.167
0.3330
GMI Loop Transconductance
MAX1909: ICTL = 3.6V, MAX8725: VICTL =
3.2V, VCSSP - VCSIN = 75mV
0.5
1
2
mA/V
GMS Loop Transconductance
VCLS = 2.048V, VCSSP - VCSSN = 75mV
0.5
1
2
mA/V
CCI/CCS/CCV Clamp Voltage
0.25V < VCCV < 2.0V, 0.25V < VCCI < 2.0V,
0.25V < VCCS < 2.0V
150
300
600
mV
0.8
V
1.6
1.8
2.0
V
-2
+2
µA
0
28
GMV Loop Transconductance
mA/V
LOGIC LEVELS
MODE Input Low Voltage
MODE Input Middle Voltage
MODE Input High Voltage
MODE Input Bias Current
2.8
MODE = 0V or 3.6V
V
ACOK AND PKPRES
ACOK Input Voltage Range
ACOK Sink Current
VACOK = 0.4V, ACIN = 1.5V
ACOK Leakage Current
VACOK = 28V, ACIN = 2.5V
1
V
mA
1
µA
PKPRES Input Voltage
Range
0
LDO
V
PKPRES Input Bias Current
-1
+1
µA
PKPRES Battery Removal Detect
Threshold
MAX8725, PKPRES rising
PKPRES Hysteresis
MAX8725
% of
LDO
55
1
%
PDS, PDL SWITCH CONTROL
PDS Switch Turn-Off Threshold
VDCIN - VBATT, VDCIN falling
50
100
150
mV
PDS Switch Threshold Hysteresis
VDCIN - VBATT
100
200
300
mV
PDS Output Low Voltage, PDS
Below SRC
IPDS = 0A
8
10
12
V
PDS Turn-On Current
PDS = SRC
6
12
mA
PDS Turn-Off Current
VPDS = VSRC - 2V, VDCIN = 16V
10
50
mA
PDL Switch Turn-On Threshold
VDCIN - VBATT, VDCIN falling
50
100
150
mV
PDL Switch Threshold Hysteresis
VDCIN - VBATT
100
200
300
mV
_______________________________________________________________________________________
5
MAX1909/MAX8725
ELECTRICAL CHARACTERISTICS (continued)
MAX1909/MAX8725
Multichemistry Battery Chargers with Automatic
System Power Selector
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
MIN
TYP
MAX
UNITS
PDL Turn-On Resistance
PARAMETER
SYMBOL
PDL = GND
CONDITIONS
50
100
150
kΩ
PDL Turn-Off Current
VSRC - VPDL = 1.5V
6
12
SRC = 19V, DCIN = 0V
SRC Input Bias Current
SRC = 19, VBATT = 16V
Delay Time Between PDL and
PDS Transitions
mA
1
2.5
450
1000
5
7.5
µA
µs
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = -40°C to +85°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
0
3.6
V
VVCTL = 3.6V (3 or 4 cells); not including
VCTL resistor tolerances
-0.8
+0.8
VVCTL = 3.6V/20 (3 or 4 cells); not including
VCTL resistor tolerances
-0.8
+0.8
VVCTL = 3.6V (3 or 4 cells); including VCTL
resistor tolerances of 1%
-1.0
+1.0
VVCTL = VLDO (3 or 4 cells, default
threshold of 4.2V/cell)
-0.8
+0.8
VVCTL rising
4.1
4.3
VVCTL = 3V
0
2.5
VDCIN = 0V, VVCTL = 5V
0
12
MAX1909
0
3.6
MAX8725
0
3.2
69.37
80.63
MAX1909: VICTL = 3.6V (not including ICTL
resistor tolerances)
-7.5
+7.5
MAX8725: VICTL = 3.2V (not including ICTL
resistor tolerances)
-5
+5
MAX1909: VICTL = 3.6V x 0.5, MAX8725:
VICTL = 3.2V x 0.5 (not including ICTL
resistor tolerances)
-5
+5
MAX1909: VICTL = 0.9V (not including ICTL
resistor tolerances)
-7.5
+7.5
MAX8725: VICTL = 0.18V (not including
ICTL resistor tolerances)
-30
+30
CHARGE VOLTAGE REGULATION
VCTL Range
Battery Regulation Voltage
Accuracy
VVCTL Default Threshold
VCTL Input Bias Current
%
V
µA
CHARGE-CURRENT REGULATION
ICTL Range
CSIP-to-CSIN Full-Scale CurrentSense Voltage
Charge-Current Accuracy
6
_______________________________________________________________________________________
V
mV
%
Multichemistry Battery Chargers with Automatic
System Power Selector
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = -40°C to +85°C, unless otherwise noted.)
PARAMETER
SYMBOL
Charge-Current Accuracy
VICTL Default Threshold
CONDITIONS
MIN
TYP
MAX
MAX1909: VICTL = 3.6V x 0.5, MAX8725:
VICTL = 3.2V x 0.5 (including ICTL resistor
tolerances of 1%)
-7.0
+7.0
VICTL = VLDO (default threshold of 45mV)
-5
+5
VICTL rising
4.3
BATT/CSIP/CSIN Input Voltage
Range
0
UNITS
%
V
19
V
µA
CSIP/CSIN Input Current
Charging enabled
650
ICTL Power-Down Mode
Threshold Voltage
MAX1909
0.75
MAX8725
0.06
ICTL Power-Up Mode Threshold
Voltage
MAX1909
0.85
MAX8725
0.11
V
V
INPUT CURRENT REGULATION
CSSP-to-CSSN Full-Scale
Current-Sense Voltage
Input Current-Limit Accuracy
72.75
77.25
VCLS = REF
-3
+3
VCLS = REF x 0.75
-3
+3
VCLS = REF x 0.5
-4
+4
CSSP/CSSN Input Voltage Range
8.0
mV
%
28
V
730
µA
1.6
REF
V
VCSSP - VCSSN = 56mV
2.7
3.3
mA/V
VCSSP - VCSSN = 75mV, terminated with
10kΩ
-7.5
+7.5
VCSSP - VCSSN = 56mV, terminated with
10kΩ
-5
+5
VCSSP - VCSSN = 20mV, terminated with
10kΩ
-10
+10
IINP Output Current
VCSSP - VCSSN = 150mV, VIINP = 0V
350
µA
IINP Output Voltage
VCSSP - VCSSN = 150mV, VIINP = float
3.5
V
CSSP/CSSN Input Current
VCSSP = VCSSN = VDCIN > 8.0V
CLS Input Range
IINP Transconductance
IINP Accuracy
%
SUPPLY AND LINEAR REGULATOR
DCIN Input Voltage Range
VDCIN
8.0
DCIN falling
DCIN Undervoltage-Lockout Trip
Point
DCIN rising
DCIN Quiescent Current
IDCIN
8.0V < VDCIN < 28V
BATT Input Current
IBATT
VBATT = 2V to 19V, VDCIN > VBATT + 0.3V
LDO Output Voltage
8.0V < VDCIN < 28V, no load
LDO Load Regulation
0 < ILDO < 10mA
28
7
7.85
5.25
V
V
6
mA
500
µA
5.55
V
115
mV
_______________________________________________________________________________________
7
MAX1909/MAX8725
ELECTRICAL CHARACTERISTICS (continued)
MAX1909/MAX8725
Multichemistry Battery Chargers with Automatic
System Power Selector
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = -40°C to +85°C, unless otherwise noted.)
PARAMETER
SYMBOL
LDO Undervoltage-Lockout Trip
Point
CONDITIONS
VDCIN = 8.0V
MIN
TYP
MAX
UNITS
3.20
5.15
V
4.1960
4.2520
V
3.9
V
50
150
mV
100
300
mV
2.007
2.089
V
10
30
mV
ns
REFERENCE
REF Output Voltage
Ref
REF Undervoltage-Lockout Trip
Point
0 < IREF < 500µA
REF falling
TRIP POINTS
BATT POWER_FAIL Threshold
VDCIN - VBATT, VDCIN falling
BATT POWER_FAIL Threshold
Hysteresis
ACIN Threshold
ACIN rising
ACIN Threshold Hysteresis
SWITCHING REGULATOR
DHI Off-Time
VBATT = 16.0V, VDCIN = 19V, VMODE = 3.6V
360
440
DHI Minimum Off-Time
VBATT = 16.0V, VDCIN = 17V, VMODE = 3.6V
260
350
ns
10
µA
mV
DLOV Supply Current
Sense Voltage for Battery
Undervoltage Charge Current
Battery Undervoltage Threshold
DHIV Output Voltage
IDLOV
DLO low
MAX1909 only, BATT = 3.0V per cell
3
6
MAX1909 only, MODE = float (3 cell),
VBATT rising
9.18
9.42
MAX1909 only, MODE = LDO (4 cell),
VBATT rising
12.235
12.565
-4.5
-5.5
With respect to SRC
DHIV Sink Current
V
10
V
mA
DHI On-Resistance Low
DHI = VDHIV, IDHI = -10mA
5
Ω
DHI On-Resistance High
DHI = VCSSN, IDHI = 10mA
4
Ω
DLO On-Resistance High
VDLOV = 4.5V, IDLO = +100mA
7
Ω
DLO On-Resistance Low
VDLOV = 4.5V, IDLO = -100mA
3
Ω
ERROR AMPLIFIERS
VCTL = 3.6, VBATT = 16.8V, MODE = LDO
0.0625
0.2500
VCTL = 3.6, VBATT = 12.6V, MODE = FLOAT
0.0833
0.3330
GMI Loop Transconductance
MAX1909: ICTL = 3.6V, MAX8725: VICTL =
3.2V, VCSSP - VCSIN = 75mV
0.5
2.0
mA/V
GMS Loop Transconductance
VCLS = 2.048V, VCSSP - VCSSN = 75mV
0.5
2.0
mA/V
CCI/CCS/CCV Clamp Voltage
0.25V < VCCV < 2.0V, 0.25V < VCCI < 2.0V,
0.25V < VCCS < 2.0V
150
600
mV
0.8
V
2.0
V
GMV Loop Transconductance
mA/V
LOGIC LEVELS
MODE Input Low Voltage
MODE Input Middle Voltage
8
1.6
_______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = -40°C to +85°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
MODE Input High Voltage
TYP
MAX
2.8
UNITS
V
ACOK AND PKPRES
ACOK Input Voltage Range
0
ACOK Sink Current
VACOK = 0.4V, ACIN = 1.5V
28
1
PKPRES Input Voltage Range
0
PKPRES Battery Removal Detect
Threshold
V
mA
LDO
V
% of
LDO
MAX8725, PKPRES rising
55
PDS Switch Turn-Off Threshold
VDCIN - VBATT, VDCIN falling
50
150
mV
PDS Switch Threshold Hysteresis
VDCIN - VBATT
100
300
mV
PDS Output Low Voltage, PDS
Below SRC
IPDS = 0A
8
12
V
PDS Turn-On Current
PDS = SRC
6
PDS Turn-Off Current
VPDS = VSRC - 2V, VDCIN = 16V
10
PDL Switch Turn-On Threshold
VDCIN - VBATT, VDCIN falling
50
150
mV
PDL Switch Threshold Hysteresis
VDCIN - VBATT
100
300
mV
PDL Turn-On Resistance
PDL = GND
50
150
kΩ
PDL Turn-Off Current
VSRC - VPDL = 1.5V
6
SRC Input Bias Current
SRC = 19, VBATT = 16V
PDS, PDL SWITCH CONTROL
mA
mA
mA
1000
µA
Note 1: Guaranteed by design. Not production tested.
Typical Operating Characteristics
(Circuit of Figure 2, VDCIN = 20V, charge current = 3A, 4 Li+ series cells, TA = +25°C, unless otherwise noted.)
BATTERY INSERTION
AND REMOVAL RESPONSE
SYSTEM LOAD-TRANSIENT RESPONSE
MAX1909/MAX8725 toc01
MAX1909/MAX8725 toc02
17V
5A
ISYSTEMLOAD
0A
VBATT
16V
VCCV
0A
5A
5A/div
IBATT
IIN
0A
5A IBATT
0A
IIN
0A 5A/div
VCCV
VCCI
VCCI
VCCV
CCS
3V
3V
2V
VCCI, VCCV
1V
CCI
VCCI
0V
500µs/div
2V
VCCI
1V
VCCS
0V
100µs/div
_______________________________________________________________________________________
9
MAX1909/MAX8725
ELECTRICAL CHARACTERISTICS (continued)
Multichemistry Battery Chargers with Automatic
System Power Selector
LINE-TRANSIENT RESPONSE
LDO LOAD REGULATION
INDUCTOR CURRENT
200mA/div
3A
VBATT AC-COUPLED
200mV/div
MAX1909/MAX8725 toc04
0
30V
VDCIN
20V
-0.2
LDO OUTPUT ERROR (%)
MAX1909/MAX8725 toc03
-0.4
-0.6
-0.8
-1.0
-1.2
1.8V
VCCV
1.6V
-1.4
0
500µs/div
1
2
3
4
5
6
7
8
10
9
LDO CURRENT (mA)
LDO LINE REGULATION
REF LOAD REGULATION
0
-0.05
MAX1909/MAX8725 toc06
0.05
0
-0.02
REF OUTPUT ERROR (%)
MAX1909/MAX8725 toc05
LDO OUTPUT ERROR (%)
0.10
-0.04
-0.06
-0.08
-0.10
-0.12
-0.10
-0.14
10
30
20
0
200
INPUT VOLTAGE (V)
400
600
800
1000
REF CURRENT (µA)
EFFICIENCY vs. CHARGE CURRENT
REF vs. TEMPERATURE
0.05
0
-0.05
-0.10
100
98
4 CELLS
96
EFFICIENCY (%)
MAX1909/MAX8725 toc07
0.10
MAX1909/MAX8725 toc08
0
REF OUTPUT ERROR (%)
MAX1909/MAX8725
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VDCIN = 20V, charge current = 3A, 4 Li+ series cells, TA = +25°C, unless otherwise noted.)
94
92
3 CELLS
90
88
86
84
-0.15
82
80
-0.20
-40
-15
10
35
TEMPERATURE (°C)
10
60
85
0
0.5
1.0
1.5
2.0
2.5
3.0
CHARGE CURRENT (A)
______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
SWITCHING FREQUENCY vs. VIN - VBATT
400
350
3.5
250
200
2.5
2.0
1.5
150
1.0
100
0.5
50
0
0
2
4
6
10
8
0.5
0
1.0
2.5
3.0
IINP ACCURACY vs. INPUT CURRENT
INPUT CURRENT-LIMIT ACCURACY
vs. SYSTEM LOAD
4
2
0
-2
-4
-6
4
INPUT CURRENT-LIMIT ACCURACY (%)
MAX1909/MAX8725 toc11
6
-8
VBATT = 13V
3
VBATT = 10V
2
0
VBATT = 16V
VBATT = 12V
ICHARGE = 3A
-1
-2
MAX1909 ONLY
0.5
1.0
INPUT CURRENT (A)
1.5
2.0
2.5
3.0
SYSTEM LOAD (A)
INPUT CURRENT-LIMIT ACCURACY
vs. SYSTEM LOAD
INPUT CURRENT-LIMIT ACCURACY vs. VCLS
2
VBATT = 12V
0
-1
MAX1909/MAX8725 toc14
3
3
INPUT CURRENT-LIMIT ACCURACY (%)
MAX1909/MAX8725 toc13
4
VBATT = 16V
3.5
1
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
INPUT CURRENT-LIMIT ACCURACY (%)
2.0
INPUT CURRENT (A)
8
1
1.5
VIN - VBATT (V)
MAX1909/MAX8725 toc12
0
IINP ACCURACY (%)
CHARGER
DISABLED
3.0
IINP (%)
300
MAX1909/MAX8725 toc10
450
SWITCHING FREQUENCY (kHz)
IINP ERROR vs. INPUT CURRENT
4.0
MAX1909/MAX8725 toc09
500
2
1
0
-1
-2
VBATT = 10V
VBATT = 13V
-3
-2
0
0.5
1.0
1.5
2.0
SYSTEM LOAD (A)
2.5
3.0
3.5
1.5
2.0
2.5
3.0
3.5
VCLS (V)
______________________________________________________________________________________
11
MAX1909/MAX8725
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VDCIN = 20V, charge current = 3A, 4 Li+ series cells, TA = +25°C, unless otherwise noted.)
MAX1909/MAX8725
Multichemistry Battery Chargers with Automatic
System Power Selector
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VDCIN = 20V, charge current = 3A, 4 Li+ series cells, TA = +25°C, unless otherwise noted.)
PDL-PDS SWITCHING,
AC ADAPTER INSERTION
PDS-PDL SWITCHOVER,
WALL ADAPTER REMOVAL
MAX1909/MAX8725 toc15
MAX1909/MAX8725 toc16
20V
VPDS
VWALLADAPTER
10V
20V
20V
VSYSTEMLOAD
10V
VPDS
20V
VWALLADAPTER
10V
VSYSTEMLOAD, VPDS
10V
SYSTEM LOAD
VPDL
0V
VPDS
20V
VPDL
20V
VBATT
10V
VPDL
0V
VPDL, VBATT
10V
0V
VPDL
VSYSTEMLOAD
100µs/div
500µs/div
PDS-PDL SWITCHOVER,
BATTERY INSERTION
PDL-PDS SWITCHING,
BATTERY REMOVAL
MAX1909/MAX8725 toc17
MAX1909/MAX8725 toc18
20V
VPDS
15V
VSYSTEM
CONDITIONING MODE 10V
WALL ADAPTER = 18V
5V
VPKDET
20V
VSYSTEM
CONDITIONING MODE 15V
WALL ADAPTER = 18V
10V
VPDS
5V
VPKPRES
0V
VPDL
15V
VBATT
10V
0V
VPKPRES
15V
VBATT
10V
5V V
PDL
MAX8725 ONLY
0V
50µs/div
12
5V
0V
10µs/div
______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
PIN
NAME
1
DCIN
DC Supply Voltage Input. Bypass DCIN with a 1µF capacitor to power ground.
2
LDO
Device Power Supply. Output of the 5.4V linear regulator supplied from DCIN. Bypass with a 1µF capacitor.
3
ACIN
AC Detect Input. This uncommitted comparator input can be used to detect the presence of the charger’s
power source. The comparator’s open-drain output is the ACOK signal.
4
REF
4.2235V Voltage Reference. Bypass with a 1µF capacitor to GND.
GND
MAX1909: Ground this pin
5
PKPRES
FUNCTION
MAX8725: Pull PKPRES high to disable charging. Used for detecting presence of battery pack.
ACOK
AC Detect Output. High-voltage open-drain output is high impedance when ACIN is greater than 2.048V. The
ACOK output remains a high impedance when the MAX1909/MAX8725 are powered down.
7
MODE
Trilevel Input for Setting Number of Cells and Asserting the Conditioning Mode:
MODE = GND; asserts conditioning mode.
MODE = float; charge with 3 times the cell voltage programmed at VCTL.
MODE = LDO; charge with 4 times the cell voltage programmed at VCTL.
8
IINP
Input Current Monitor Output. The current delivered at the IINP output is a scaled-down replica of the system
load current plus the input-referred charge current sensed across CSSP and CSSN inputs. The
transconductance of (CSSP - CSSN) to IINP is 3mA/V.
9
CLS
Source Current-Limit Input. Voltage input for setting the current limit of the input source.
10
ICTL
Input for Setting Maximum Output Current
11
VCTL
Input for Setting Maximum Output Voltage
6
12
CCI
Output Current-Regulation Loop-Compensation Point. Connect 0.01µF to GND.
13
CCV
Voltage-Regulation Loop-Compensation Point. Connect 10kΩ in series with 0.1µF to GND.
14
CCS
Input Current-Regulation Loop-Compensation Point. Use 0.01µF to GND.
15
GND
Analog Ground
16
BATT
Battery Voltage Feedback Input
17
CSIN
Output Current-Sense Negative Input
18
CSIP
Output Current-Sense Positive Input. Connect a current-sense resistor from CSIP to CSIN.
19
PGND
20
DLO
21
DLOV
Low-Side Driver Supply. Bypass with a 1µF capacitor to ground.
22
DHIV
High-Side Driver Supply. Bypass with a 0.1µF capacitor to SRC.
23
DHI
High-Side Power-MOSFET Driver Output. Connect to high-side PMOS gate. When the MAX1909/MAX8725 are
shut down, the DHI output is HIGH.
24
SRC
Source Connection for Driver for PDS/PDL Switches. Bypass SRC to power ground with a 1µF capacitor.
25
CSSN
Input Current Sense for Charger (Negative Input)
26
CSSP
Input Current Sense for Charger (Positive Input). Connect a current-sense resistor from CSSP to CSSN.
27
PDS
Power-Source PMOS Switch Driver Output. When the MAX1909/MAX8725 are powered down, the PDS output
is pulled to SRC through an internal 1MΩ resistor.
28
PDL
System-Load PMOS Switch Driver Output. When the MAX1909/MAX8725 are powered down, the PDL output
is pulled to ground through an internal 100kΩ resistor.
Power Ground
Low-Side Power-MOSFET Driver Output. Connect to low-side NMOS gate. When the MAX1909/MAX8725 are
shut down, the DLO output is LOW.
______________________________________________________________________________________
13
MAX1909/MAX8725
Pin Description
MAX1909/MAX8725
Multichemistry Battery Chargers with Automatic
System Power Selector
P3
RS1
0.01Ω
AC ADAPTER
TO
SYSTEM LOAD
0.1µF
0.1µF
OUTPUT VOLTAGE: 12.6V
C22
1µF
CHARGE I LIMIT: 3.0A
CSSP
SRC
CSSN
PDS
D4
R6
590kΩ
1%
C1
22µF
C17
0.1µF
SRC
R7
196kΩ
1%
VCTL
R4
100kΩ
LDO
DHIV
DCIN
C5
1µF
MAX1909
MAX8725
PDL
LDO
ICTL
OUTPUT
DLOV
ACIN
LDO
P2
C13
1µF
R13
33Ω
C16
1µF
MODE
P1
(INPUT I LIMIT: 7.5A)
R8
1MΩ
LDO
REF
DHI
CLS
ACOK
DLO
TO
HOST
SYSTEM
LDO
N1
L1
10µH
PGND
R9
10kΩ
CSIP
RS2
0.015Ω
PKPRES (MAX8725 ONLY)
CCV
CCI
R5
10kΩ
C11
0.1µF
CCS
C9
0.01µF
C10
0.01µF
CSIN
BATT
GND
REF
BATT +
C4
22µF
C12
1µF
BATTERY
TEMP
GND
BATT PGND
GND
Figure 1. Typical Operating Circuit Demonstrating Hardwired Control
14
______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
P4
RS1
0.01Ω
TO
SYSTEM LOAD
0.1µF
0.1µF
OUTPUT VOLTAGE: 16.8V
C15
1µF
CSSP
SRC
CSSN
C17
0.1µF
SRC
R7
196kΩ
1%
C1
22µF
PDS
D4
R6
590kΩ
1%
DHIV
DCIN
C5
1µF
LDO
D/A OUTPUT
VCTL
MAX1909
MAX8725
PDL
LDO
P2
C13
1µF
ICTL
OPEN-DRAIN
DLOV
OUTPUTS
MODE
ACIN
R13
33Ω
C16
1µF
LDO
P1
R8
1MΩ
DHI
ACOK
INPUT
PKPRES (MAX8725 ONLY)
OUTPUT
DLO
A/D INPUT
C14
0.1µF
R9
10kΩ
(INPUT I LIMIT: 7.5A)
REF
CSIP
R19, R20
10kΩ
RS2
0.015Ω
C11
0.1µF
LDO
CSIN
BATT
CCI
R21
10kΩ
CCS
C9
0.01µF
L1
10µH
PGND
CLS
R5
10kΩ
HOST
N1
IINP
CCV
AVDD/REF
MAX1909/MAX8725
P3
AC ADAPTER
C10
0.01µF
GND
REF
BATT +
C4
22µF
SMART
BATTERY
C12
1µF
SCL
SCL
SDA
SDA
TEMP
GND
BATT PGND
GND
Figure 2. Smart-Battery Charger Circuit Demonstrating Operation with a Host Microcontroller
______________________________________________________________________________________
15
MAX1909/MAX8725
Multichemistry Battery Chargers with Automatic
System Power Selector
DCIN
MAX8725 ONLY
PKPRES
LDO
PACK_ON
RDY
5.4V
LINEAR
REGULATOR
0.9 * LDO
4.2235V
REFERENCE
ICTLOK
GND
ACIN
ACOK
CHG
LOGIC
0.8V
REF
BATT
2.048V
SRDY
DRIVER
DCIN
GND
SRC
PDS
CHG
CCS
SRC-10V DRIVER
PDL
CLS
MODE
100kΩ
GMS
CSSP
SWITCH LOGIC
LEVEL
SHIFTER
CSSN
CSIP
LEVEL
SHIFTER
CSIN
Gm
IINP
SRC
GMI
DRIVER
ICTL
DHI
CCI
BATT
DHIV
MAX1909 ONLY
LVC
BATT_UV
3.0V/CELL
MODE
CELL SELECT
LOGIC AND
BATTERY VOLTAGEDIVIDER
DC-DC
CONVERTER
GMV
CCV
DLOV
REF
DRIVER
R
DLO
9R
VCTL
MAX1909
MAX8725
R
Figure 3. Functional Diagram
16
______________________________________________________________________________________
PGND
Multichemistry Battery Chargers with Automatic
System Power Selector
The MAX1909/MAX8725 include all of the functions
necessary to charge Li+, NiMH, and NiCd batteries. A
high-efficiency, synchronous-rectified step-down DCDC converter is used to implement a precision constant-current, constant-voltage charger with input
current limiting. The DC-DC converter uses external
p-channel/n-channel MOSFETs as the buck switch and
synchronous rectifier to convert the input voltage to the
required charge current and voltage. The charge current and input current-limit sense amplifiers have lowinput-referred offset errors and can use small-value
sense resistors. The MAX1909/MAX8725 feature a voltage-regulation loop (CCV) and two current-regulation
loops (CCI and CCS). The CCV voltage-regulation loop
monitors BATT to ensure that its voltage never exceeds
the voltage set by VCTL. The CCI battery current-regulation loop monitors current delivered to BATT to ensure
that it never exceeds the current limit set by ICTL. A
third loop (CCS) takes control and reduces the charge
current when the sum of the system load and the inputreferred charge current exceeds the power source current limit set by CLS. Tying CLS to the reference
voltage provides a 7.5A input current limit with a 10mΩ
sense resistor.
The ICTL, VCTL, and CLS analog inputs set the charge
current, charge voltage, and input current limit, respectively. For standard applications, internal set points for
ICTL and VCTL provide a 3A charge current using a
15mΩ sense resistor and a 4.2V per-cell charge voltage. The variable for controlling the number of cells is
set with the MODE input. The MAX8725 includes a
PKPRES input used for battery-pack detection.
Based on the presence or absence of the AC adapter,
the MAX1909/MAX8725 automatically provide an opendrain logic output signal ACOK and select the appropriate source for supplying power to the system. A
p-channel load switch controlled from the PDL output and
a similar p-channel source switch controlled from the PDS
output are used to implement this function. Using the
MODE control input, the MAX1909/MAX8725 can be programmed to perform a relearning, or conditioning, cycle
in which the battery is isolated from the charger and completely discharged through the system load. When the
battery reaches 100% depth of discharge, it is recharged
to full capacity.
The circuit shown in Figure 1 demonstrates a simple
hardwired application, while Figure 2 shows a typical
application for smart-battery systems with variable
charge current and source switch configuration that supports battery conditioning. Smart-battery systems typically use a host µC to achieve this added functionality.
Setting the Charge Voltage
The MAX1909/MAX8725 use a high-accuracy voltage
regulator for charge voltage. The VCTL input adjusts
the battery output voltage. In default mode (VCTL =
LDO), the overall accuracy of the charge voltage is
±0.5%. VCTL is allowed to vary from 0 to 3.6V, which
provides a 10% adjustment range of the battery voltage. Limiting the adjustment range reduces the sensitivity of the charge voltage to external resistor
tolerances from ±1% to ±0.05%. The overall accuracy
of the charge voltage is better than ±1% when using
±1% resistors to divide down the reference to establish
VCTL. The per-cell battery termination voltage is a function of the battery chemistry and construction. Consult
the battery manufacturer to determine this voltage. The
battery voltage is calculated by the equation:

− 1.8V  
V
VBATT = CELL VREF +  VCTL



9.52

where VREF = 4.2235V, and CELL is the number of cells
selected with the MAX1909/MAX8725s’ trilevel MODE
control input. When MODE is tied to the LDO output,
CELL = 4. When MODE is left floating, CELL = 3. When
MODE is tied to ground, the charger enters conditioning mode, which is used to isolate the battery from the
charger and discharge it through the system load. See
the Conditioning Mode section. The internal error amplifier (GMV) maintains voltage regulation (see Figure 3
for the Functional Diagram). The voltage-error amplifier
is compensated at CCV. The component values shown
in Figures 1 and 2 provide suitable performance for
most applications. Individual compensation of the voltage regulation and current-regulation loops allow for
optimal compensation. See the Compensation section.
Setting the Charge Current
The voltage on the ICTL input sets the maximum
voltage across current-sense resistor RS2, which in turn
determines the charge current. The full-scale differential voltage between CSIP and CSIN is 75mV; thus, for a
0.015Ω sense resistor, the maximum charge current is
5A. In default mode (ICTL = LDO), the sense voltage is
45mV with an overall accuracy of ±5%. The charge current is programmed with ICTL using the equation:
ICHG =
0.075 VICTL
×
RS2
3.6V
______________________________________________________________________________________
17
MAX1909/MAX8725
Detailed Description
MAX1909/MAX8725
Multichemistry Battery Chargers with Automatic
System Power Selector
The input range for ICTL is 0 to 3.6V on the MAX1909,
and 0 to 3.2V on the MAX8725. The charger shuts down
if ICTL is forced below 0.75V for the MAX1909 and 0.06V
for the MAX8725. When choosing current-sense resistor
RS2, note that it must have a sufficient power rating to
handle the full-load current. The sense resistor’s I 2R
power loss reduces charger efficiency. Adjusting ICTL to
drop the voltage across the current-sense resistor
improves efficiency, but may degrade accuracy due to
the current-sense amplifier’s input offset error. The
charge-current error amplifier (GMI) is compensated at
the CCI pin. See the Compensation section.
Conditioning Charge
The MAX1909 includes a battery voltage comparator
that allows a conditioning charge of overdischarged
Li+ battery packs. If the battery-pack voltage is less
than 3.1V x the number of cells programmed by
CELLS, the MAX1909 charges the battery with 300mA
current when using sense resistor RS2 = 0.015Ω. After
the battery voltage exceeds the conditioning charge
threshold, the MAX1909 resumes full-charge mode,
charging to the programmed voltage and current limits.
The MAX8725 does not provide automatic support for
providing a conditioning charge. To configure the
MAX8725 to provide a conditioning charge current,
ICTL should be directly driven.
Setting the Input Current Limit
The total input current, from a wall cube or other DC
source, is the sum of the system supply current and the
current required by the charger. The MAX1909/MAX8725
reduce the source current by decreasing the charge current when the input current exceeds the set input current
limit. This technique does not truly limit the input current.
As the system supply current rises, the available charge
current drops proportionally to zero. Thereafter, the total
input current can increase without limit.
An internal amplifier compares the differential voltage
between CSSP and CSSN to a scaled voltage set with
the CLS input. VCLS can be driven directly or set with a
resistive voltage-divider between REF and GND.
Connect CLS to REF to set the input current-limit sense
voltage to the maximum value of 75mV. Calculate the
input current as follows:
IIN =
0.075 VCLS
×
RS1 VREF
V CLS determines the reference voltage of the GMS
error amplifier. Sense resistor RS1 sets the maximum
allowable source current. Once the input current limit is
reached, the charge current is decreased linearly until
the input current is below the desired threshold.
18
Duty cycle affects the accuracy of the input current
limit. AC load current also affects accuracy (see the
Typical Operating Characteristics). Refer to the
MAX1909/MAX8725 EV kit data sheet for more details
on reducing the effects of switching noise.
When choosing the current-sense resistor RS1, carefully
calculate its power rating. Take into account variations
in the system’s load current and the overall accuracy of
the sense amplifier. Note that the voltage drop across
RS1 contributes additional power loss, which reduces
efficiency.
System currents normally fluctuate as portions of the
system are powered up or put to sleep. Without input
current regulation, the input source must be able to
deliver the maximum system current and the maximum
charger input current. By using the input current-limit
circuit, the output current capability of the AC wall
adapter can be lowered, reducing system cost.
Current Measurement
The MAX1909/MAX8725 include an input current monitor
IINP. The current delivered at the IINP output is a scaleddown replica of the system load current plus the inputreferred charge current that is sensed across CSSP and
CSSN inputs. The output voltage range is 0 to 3V.
The voltage of IINP is proportional to the input current
according to the following equation:
VIINP = ISOURCE ✕ RS1 ✕ GIINP ✕ R9
where ISOURCE is the DC current supplied by the AC
adapter power, GIINP is the transconductance of IINP
(3mA/V typ), and R9 is the resistor connected between
IINP and ground.
Leave the IINP pin unconnected if not used.
LDO Regulator
LDO provides a 5.4V supply derived from DCIN and
can deliver up to 10mA of extra load current. The lowside MOSFET driver is powered by DLOV, which must
be connected to LDO as shown in Figure 1. LDO also
supplies the 4.2235V reference (REF) and most of the
control circuitry. Bypass LDO with a 1µF capacitor.
Shutdown and Charge Inhibit (PKPRES)
When the AC adapter is removed, the MAX1909/
MAX8725 shut down to a low-power state that does not
significantly load the battery. Under these conditions, a
maximum of 6µA is drawn from the battery through the
combined load of the SRC, CSSP, CSSN, CSIP, CSIN,
and BATT inputs. The charger enters this low-power state
when DCIN falls below the undervoltage-lockout (UVLO)
threshold of 7V. The PDS switch turns off, the PDL switch
turns on, and the system runs from the battery.
______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
Charging can also be inhibited by driving ICTL below
0.035V, which suspends switching and pulls CCI, CCS,
and CCV to ground. The PDS and PDL drivers, LDO,
input current monitor, and control logic (ACOK) all
remain active in this state. Approximately 3mA of supply current is drawn from the AC adapter and 3µA
(max) is drawn from the battery to support these
functions.
In smart-battery systems, PKPRES is usually driven from a
voltage-divider formed with a low-value resistor or PTC
thermistor inside the battery pack and a local resistive
pullup. This arrangement automatically detects the presence of a battery. The MAX8725 threshold voltage is 55%
of VLDO, with hysteresis of 1% VLDO to prevent erratic
transitions.
AC Adapter Detection and
Power-Source Selection
The MAX1909/MAX8725 include a hysteretic comparator that detects the presence of an AC power adapter
and automatically delivers power to the system load
from the appropriate available power source. When the
adapter is present, the open-drain ACOK output
becomes high impedance. The switch threshold at
ACIN is 2.048V. Use a resistive voltage-divider from the
adapter’s output to the ACIN pin to set the appropriate
detection threshold. When charging, the battery is isolated from the system load with the p-channel PDL
switch, which is biased off. When the adapter is absent,
the drives to the switches change state in a fast breakbefore-make sequence. PDL begins to turn on 7.5µs
after PDS begins to turn off.
The threshold for selecting between the PDL and PDS
switches is set based on the voltage difference
between the DCIN and the BATT pins. If this voltage
difference drops below 100mV, the PDS is switched off
and PDL is switched on. Under these conditions, the
MAX1909/MAX8725 are completely powered down.
The PDL switch is kept on with a 100kΩ pulldown resistor when the charger is powered down through ICTL or
PKPRES, or when the AC adapter is removed.
The drivers for PDL and PDS are fully integrated. The positive bias inputs for the drivers connect to the SRC pin and
the negative bias inputs connect to a negative regulator
referenced to SRC. With this arrangement, the drivers can
swing from SRC to approximately 10V below SRC.
Conditioning Mode
The MAX1909/MAX8725 can be programmed to perform a conditioning cycle to calibrate the battery’s fuel
gauge. This cycle consists of isolating the battery from
the charger and discharging it through the system load.
When the battery reaches 100% depth of discharge, it
is then recharged. Driving the MODE pin low places the
MAX1909/MAX8725 in conditioning mode, which stops
the charger from switching, turns the PDS switch off,
and turns the PDL switch on.
To utilize the conditioning mode function, the configuration of the PDS switch must be changed to two sourceconnected FETs to prevent the AC adapter from supplying current to the system through the MOSFET’s
body diode. See Figure 2. The SRC pin must be connected to the common source node of the back-to-back
FETs to properly drive the MOSFETs.
It is essential to alert the user that the system
is performing a conditioning cycle. If the user terminates the cycle prematurely, the battery can be discharged even though the system was running off the
AC adapter for a substantial period of time. If the AC
adapter is in fact removed during conditioning, the
MAX1909/MAX8725 keep the PDL switch on and the
charger remains off as it would in normal operation.
In the MAX8725, if the battery is removed during conditioning mode, the PKPRES control overrides conditioning mode. When MODE is grounded and PKPRES goes
high, the PDS switch starts turning on within 7.5µs and
the system is powered from the AC adapter.
In the MAX1909, disable conditioning mode before the
battery is overdischarged or removed.
DC-DC Converter
The MAX1909/MAX8725 employ a buck regulator with a
PMOS high-side switch and a low-side NMOS synchronous rectifier. The MAX1909/MAX8725 feature a pseudo-fixed-frequency, cycle-by-cycle current-mode
control scheme. The off-time is dependent upon VDCIN,
VBATT, and a time constant, with a minimum tOFF of
300ns. The MAX1909/MAX8725 can also operate in
discontinuous conduction for improved light-load efficiency. The operation of the DC-DC controller is determined by the following four comparators as shown in
Figure 4:
• CCMP: Compares the control point (lowest voltage
clamp (LVC)) against the charge current (CSI). The
high-side MOSFET on-time is terminated if the CCMP
output is high.
______________________________________________________________________________________
19
MAX1909/MAX8725
The body diode of the PDL switch prevents the voltage
on the power source output from collapsing.
MAX1909/MAX8725
Multichemistry Battery Chargers with Automatic
System Power Selector
AC ADAPTER
CSSP
CSSN
MAX1909
MAX8725
DHI
CSS
20X
DHI
IMAX
1.94V
R
Q
S
Q
COMP
DLO
DLO
IMIN
0.15V
TOFF
ZCMP
0.1V
LVC
CLS
GMS
ICTL
CSIP
LVC
GMI
CSI
20X
CSIN
VCTL
GMV
CCV
CCI
CCS
BATT
COUT
RCCV
CCV
CCI
CCS
Figure 4. DC-DC Converter Functional Diagram
20
______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
• IMAX: Compares the charge current (CSI) to the
internally fixed cycle-by-cycle current limit. The
current-sense voltage limit is 97mV. With RS2 =
0.015Ω, this corresponds to 6A. The high-side
MOSFET on-time is terminated if the IMAX output is
high and a new cycle cannot begin until IMAX goes
low. IMAX protects against sudden overcurrent
faults.
t OFF =
where fNOM = 400kHz:
t ON =
The MAX1909/MAX8725 control charge voltage (CCV
control loop), charge current (CCI control loop), or input
current (CCS control loop), depending on the operating
conditions. The three control loops, CCV, CCI, and CCS,
are brought together internally at the LVC amplifier. The
output of the LVC amplifier is the feedback control
signal for the DC-DC controller. The minimum
voltage at CCV, CCI, or CCS appears at the output of
the LVC amplifier and clamps the other two control
loops to within 0.3V above the control point. Clamping
the other two control loops close to the lowest control
loop ensures fast transition with minimal overshoot
when switching between different control loops (see the
Compensation section).
Continuous Conduction Mode
With sufficient battery current loading, the MAX1909/
MAX8725s’ inductor current never reaches zero, which
is defined as continuous conduction mode. If the BATT
voltage is within the following range:
3.1V ✕ (number of cells) < VBATT < (0.88 ✕ VDCIN)
the regulator is not in dropout and switches at fNOM =
400kHz. The controller starts a new cycle by turning on
the high-side p-channel MOSFET and turning off the
low-side n-channel MOSFET. When the charge current
is greater than the control point (LVC), CCMP goes high
and the off-time is started. The off-time turns off the
high-side p-channel MOSFET and turns on the low-side
n-channel MOSFET. The operating frequency is governed by the off-time and is dependent upon VDCIN
and VBATT. The off-time is set by the following equation:
L × IRIPPLE
VCSSN − VBATT
V
×t
where IRIPPLE = BATT OFF
L
• ZCMP: Compares the charge current (CSI) to 333mA
(RS2 = 0.015Ω). The current-sense voltage threshold
is 5mV. If ZCMP output is high, then both MOSFETs
are turned off. The ZCMP comparator terminates the
switch on-time in discontinuous mode.
CCV, CCI, CCS, and LVC Control Blocks
VCSSN − VBATT
fNOM
VCSSN
1
f=
1
t ON + t OFF
These equations describe the controller’s pseudo-fixedfrequency performance over the most common operating conditions.
At the end of the fixed off-time, the controller can initiate
a new cycle if the control point (LVC) is greater than
0.15V (IMIN = high) and the peak charge current is less
than the cycle-by-cycle limit (IMAX = low). If the charge
current exceeds IMAX, the on-time is terminated by the
IMAX comparator.
If during the off-time the inductor current goes to zero,
ZCMP = high, both the high- and low-side MOSFETs
are turned off until another cycle is ready to begin. This
condition is discontinuous conduction. See the
Discontinuous Conduction section.
There is a minimum 0.3µs off-time when the (VDCIN VBATT) differential becomes too small. If VBATT ≥ 0.88 x
V DCIN , then the threshold for minimum off-time is
reached and the tOFF is fixed at 0.3µs. The switching
frequency in this mode varies according to the equation:
f =
1


VBATT
t OFF 
+ 1
 VCSSN − VBATT

Discontinuous Conduction
The MAX1909/MAX8725 enter discontinuous-conduction mode when the output of the LVC control point falls
below 0.15V. For RS2 = 0.015Ω, this corresponds to
0.5A:
0.15V
IMIN =
= 0.5A
20 × RS2
where RS2 = 0.015Ω.
______________________________________________________________________________________
21
MAX1909/MAX8725
• IMIN: Compares the control point (LVC) against
0.15V (typ). If IMIN output is low, then a new cycle
cannot begin. This comparator determines whether
the regulator operates in discontinuous mode.
MAX1909/MAX8725
Multichemistry Battery Chargers with Automatic
System Power Selector
In discontinuous mode, a new cycle is not started until
the LVC voltage rises above 0.15V. Discontinuousmode operation can occur during conditioning charge
of overdischarged battery packs, when the charge current has been reduced sufficiently by the CCS control
loop, or when the charger is in constant voltage mode
with a nearly full battery pack.
Compensation
The charge voltage, charge current, and input currentlimit regulation loops are compensated separately and
independently at the CCV, CCI, and CCS pins.
CCV Loop Compensation
The simplified schematic in Figure 5 is sufficient to
describe the operation of the MAX1909/MAX8725 when
the voltage loop (CCV) is in control. The required compensation network is a pole-zero pair formed with CCV
and RCV. The pole is necessary to roll off the voltage
loop’s response at low frequency. The zero is necessary
to compensate the pole formed by the output capacitor
and the load. RESR is the equivalent series resistance
(ESR) of the charger output capacitor (COUT). RL is the
equivalent charger output load, where RL = ∆VBATT /
∆ICHG. The equivalent output impedance of the GMV
amplifier, ROGMV, is greater than 10MΩ. The voltage
loop transconductance (GMV = ICCV / VBATT) depends
on the MODE input, which determines the number of
cells. GMV = 0.125mA/mV for 4 cells and GMV =
0.167mA/mV for 3 cells. The DC-DC converter transconductance is dependent upon the charge current-sense
resistor RS2:
BATT
GMOUT
RL
RESR
COUT
CCV
GMV
RCV
ROGMV
REF
CCV
Figure 5. CCV Loop Diagram
GMOUT =
1
A CSI × RS2
where ACSI = 20, and RS2 = 0.015Ω in the Typical
Operating Circuits (Figures 1 and 2), so GM OUT =
3.33A/V.
The loop transfer function is:
LTF = GMOUT ×
ROGMV × (1 + sCCV × RCV )
RL
1
+
sC
(
OUT × RL )
(1+ sCCV × ROGMV )
GMV (1+ sCOUT × RESR )
×
Table 1. Poles and Zeros of the Voltage-Loop Transfer Function
NO.
CALCULATION
1
CCV pole
fP _ CV =
2
CCV zero
1
fZ _ CV =
2πRCV × CCV
3
Output pole
1
4
22
NAME
Output zero
2πROGMV × CCV
Lowest frequency pole created by CCV and GMV’s finite output
resistance. Since ROGMV is very large and not well controlled, the
exact value for the pole frequency is also not well controlled
(ROGMV > 10MΩ).
Voltage-loop compensation zero. If this zero is at the same
frequency or lower than the output pole fP_OUT, then the loop
transfer function approximates a single pole response near the
crossover frequency. Choose CCV to place this zero at least one
decade below crossover to ensure adequate phase margin.
1
2πRL × COUT
Output pole formed with the effective load resistance RL and the
output capacitance COUT. RL influences the DC gain but does not
affect the stability of the system or the crossover frequency.
1
2πRESR × COUT
Output ESR Zero. This zero can keep the loop from crossing unity
gain if fZ_OUT is less than the desired crossover frequency;
therefore, choose a capacitor with an ESR zero greater than the
crossover frequency.
fP _ OUT =
fZ _ OUT =
DESCRIPTION
______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
ROGMV × (1 + sCCV × RCV )
(1+ sCCV × ROGMV )
≅ RCV
COUT also has a much lower impedance than RL near
crossover, so the parallel impedance is mostly capacitive and:
RL
(1+ sCOUT × RL )
≅
1
sCOUT

RCV
fCO _ CV = GMOUT × GMV 

 2π × COUT 
For stability, choose a crossover frequency lower than
1/10th of the switching frequency. Choosing a
crossover frequency of 30kHz and solving for R CV
using the component values listed in Figure 1 yields:
MODE = VCC (4 cells)
GMV = 0.125µA/mV
COUT = 22µF
VBATT = 16.8V
RL = 0.2Ω
GMOUT = 3.33A/V
fCO_CV = 30kHz
fOSC = 400kHz
If RESR is small enough, its associated output zero has
a negligible effect near crossover and the loop-transfer
function can be simplified as follows:
LTF = GMOUT ×
Setting the LTF = 1 to solve for the unity-gain frequency
yields:
RCV
GMV
sCOUT
RCV =
2π × COUT × fCO _ CV
= 10kΩ
GMV × GMOUT
To ensure that the compensation zero adequately cancels the output pole, select fZ_CV ≤ fP_OUT:
CCV ≥ (RL/RCV) COUT
where CCV ≥ 4nF (assuming 4 cells and 4A maximum
charge current).
Figure 6 shows the Bode plot of the voltage-loop frequency response using the values calculated above.
80
0
40
-45
20
0
-90
-20
MAG
PHASE
-40
0.1
1
10
100
1k
FREQUENCY (Hz)
10k
100k
-135
1M
PHASE (DEGREES)
MAGNITUDE (dB)
60
CCI Loop Compensation
The simplified schematic in Figure 7 is sufficient to
describe the operation of the MAX1909/MAX8725 when
the battery current loop (CCI) is in control. Since the
output capacitor’s impedance has little effect on the
response of the current loop, only a single pole is
required to compensate this loop. ACSI is the internal
gain of the current-sense amplifier. RS2 is the charge
current-sense resistor, RS2 = 15mΩ. R OGMI is the
equivalent output impedance of the GMI amplifier,
which is greater than 10MΩ. GMI is the charge-current
amplifier transconductance = 1µA/mV. GMOUT is the
DC-DC converter transconductance = 3.3A/V.
The loop transfer function is given by:
LTF = GMOUT × A CSI × RS2 × GMI
ROGMI
1+ sROGMI × CCI
Figure 6. CCV Loop Response
______________________________________________________________________________________
23
MAX1909/MAX8725
The poles and zeros of the voltage-loop transfer function
are listed from lowest frequency to highest frequency in
Table 1.
Near crossover, CCV has a much lower impedance
than ROGMV. Since CCV is in parallel with ROGMV, CCV
dominates the parallel impedance near crossover.
Additionally, RCV has a much higher impedance than
CCV and dominates the series combination of RCV and
CCV, so:
100
CSIP
CSIN
RS2
CSI
0
MAG
PHASE
80
GMOUT
MAGNITUDE (dB)
MAX1909/MAX8725
Multichemistry Battery Chargers with Automatic
System Power Selector
60
40
-45
20
0
CCI
-20
GMI
CCI
-40
ROGMI
-90
0.1
10
1k
100k
FREQUENCY (Hz)
ICTL
Figure 7. CCI Loop Diagram
Figure 8. CCI Loop Response
This describes a single-pole system. Since:
CCS Loop Compensation
The simplified schematic in Figure 9 is sufficient to
describe the operation of the MAX1909/MAX8725 when
the input current-limit loop (CCS) is in control. Since the
output capacitor’s impedance has little effect on the
response of the input current-limit loop, only a single
pole is required to compensate this loop. ACSS is the
internal gain of the current-sense amplifier. RS1 is the
input current-sense resistor; RS1 = 10mΩ in the typical
operating circuits. R OGMS is the equivalent output
impedance of the GMS amplifier, which is greater than
10MΩ. GMS is the charge-current amplifier transconductance = 1µA/mV. GMIN is the DC-DC converter’s
input-referred transconductance = (1/D) GM OUT =
(1/D) 3.3A/V.
GMOUT =
1
A CSI × RS2
the loop transfer function simplifies to:
LTF = GMI
ROGMI
1+ sROGMI × CCI
The crossover frequency is given by:
fCO _ CI =
GMI
2πCCI
For stability, choose a crossover frequency lower than
1/10th of the switching frequency:
CCI = GMI / (2π fO_CI)
Choosing a crossover frequency of 30kHz and using the
component values listed in Figure 1 yields CCI > 5.4nF.
Values for CCI greater than 10 times the minimum value
may slow down the current-loop response excessively.
Figure 8 shows the Bode plot of the current-loop frequency response using the values calculated above.
ADAPTER
INPUT
CSSP
CLS
CSS
RS1
CSSN
GMS
CCS
GMIN
CCS
ROGMS
Figure 9. CCS Loop Diagram
24
______________________________________________________________________________________
SYSTEM
LOAD
Multichemistry Battery Chargers with Automatic
System Power Selector
100
0
MAGNITUDE (dB)
80
60
40
-45
20
PHASE (DEGREES)
MAG
PHASE
0
-20
-40
0.1
10
1k
100k
-90
10M
FREQUENCY (Hz)
Figure 10. CCS Loop Response
The loop transfer function is given by:
LTF = GMIN × A CSS × RS1× GMS
ROGMS
1 + sROGMS × CCS
Since:
GMIN =
1
A CSS × RS1
the loop transfer function simplifies to:
LTF = GMS
ROGMS
1+ sROGMS × CCS
The crossover frequency is given by:
fCO _ CS =
GMS
2πCCS
For stability, choose a crossover frequency lower than
1/10th the switching frequency:
CCS = GMS / (2π fCO_CS)
Choosing a crossover frequency of 30kHz and using
the component values listed in Figure 1 yields CCS >
5.4nF. Values for CCI greater than 10 times the minimum value may slow down the current-loop response
excessively. Figure 10 shows the Bode plot of the input
current-limit loop frequency response using the values
calculated above.
The high-side driver (DHI) swings from SRC to 5V
below SRC and typically sources 0.9A and sinks 0.5A
from the gate of the p-channel FET. The internal pulldown transistors that drive DHI high are robust, with a
2.0Ω (typ) on-resistance.
The low-side driver (DLO) swings from DLOV to ground
and typically sources 0.5A and sinks 0.9A from the gate
of the n-channel FET. The internal pulldown transistors
that drive DLO low are robust, with a 1.0Ω (typ) onresistance. This helps prevent DLO from being pulled
up when the high-side switch turns on, due to capacitive coupling from the drain to the gate of the low-side
MOSFET. This places some restrictions on the FETs
that can be used. Using a low-side FET with smaller
gate-to-drain capacitance can prevent these problems.
______________________________________________________________________________________
25
MAX1909/MAX8725
MOSFET Drivers
The DHI and DLO outputs are optimized for driving
moderately-sized power MOSFETs. The MOSFET drive
capability is the same for both the low-side and highside switches. This is consistent with the variable duty
factor that occurs in the notebook computer environment where the battery voltage changes over a wide
range. An adaptive dead-time circuit monitors the DLO
output and prevents the high-side FET from turning on
until DLO is fully off. There must be a low-resistance,
low-inductance path from the DLO driver to the
MOSFET gate for the adaptive dead-time circuit to work
properly. Otherwise, the sense circuitry in the
MAX1909/MAX8725 interpret the MOSFET gate as “off”
while there is still charge left on the gate. Use very
short, wide traces measuring 10 squares to 20 squares
or less (1.25mm to 2.5mm wide if the MOSFET is 25mm
from the device). Unlike the DLO output, the DHI output
uses a fixed-delay 50ns time to prevent the low-side
FET from turning on until DHI is fully off. The same layout considerations should be used for routing the DHI
signal to the high-side FET.
Since the transition time for a p-channel switch can be
much longer than an n-channel switch, the dead time
prior to the high-side PMOS turning on is more pronounced than in other synchronous step-down regulators, which use high-side n-channel switches. On the
high-to-low transition, the voltage on the inductor’s
“switched” terminal flies below ground until the low-side
switch turns on. A similar dead-time spike occurs on
the opposite low-to-high transition. Depending upon the
magnitude of the load current, these spikes usually
have a minor impact on efficiency.
MAX1909/MAX8725
Multichemistry Battery Chargers with Automatic
System Power Selector
Table 2. Recommended Components
REFERENCE QTY
C1, C4
C5, C15
C9, C10
C11, C14,
C17
C12, C13,
C16
DESCRIPTION
2
22µF ±20%, 35V E-size low-ESR
tantalum capacitors
AVX TPSE226M035R0300
Kemet T495X226M035AS
2
1µF ±10%, 25V, X7R ceramic capacitors
(1206)
Murata GRM31MR71E105K
Taiyo Yuden TMK316BJ105KL
TDK C3216X7R1E105K
2
3
3
0.01µF ±10%, 25V, X7R ceramic
capacitors (0402)
Murata GRP155R71E103K
TDK C1005X7R1E103K
0.1µF ±10%, 25V, X7R ceramic
capacitors (0603)
Murata GRM188R71E104K
TDK C1608X7R1E104K
1µF ±10%, 6.3V, X5R ceramic
capacitors (0603)
Murata GRM188R60J105K
Taiyo Yuden JMK107BJ105KA
TDK C1608X5R1A105K
D4
1
Schottky diode, 0.5A, 30V SOD-123
Diodes Inc. B0530W
General Semiconductor MBR0530
ON Semiconductor MBR0530
D5
1
25V ±1% zener diode
CMDZ5253B
L1
1
10µH, 4.4A inductor
Sumida CDRH104R-100NC
TOKO 919AS-100M
REFERENCE QTY
DESCRIPTION
N1/P1
1
Dual n- and p-channel MOSFETs, 7A,
30V and -5A, -30V, 8-pin SO, MOSFET
Fairchild FDS8958A or
Single n-channel MOSFETs, +13.5A,
+30V FDS6670S and
Single p-channel MOSFETs, -13.5A,
-30V FDS66709Z
P2, P3, P4
3
Single, p-channel, -11A, -30V, 8-pin SO
MOSFETs
Fairchild FDS6675
R4
1
100kΩ, ±5% resistor (0603)
R5, R9, R21
2
10kΩ ±1% resistors (0603)
R6
1
590kΩ ±1% resistor (0603)
R7
1
196kΩ ±1% resistor (0603)
R8
1
1MΩ ±5% resistor (0603)
R11
1
1kΩ ±5% resistor (0603)
R16
1
33Ω ±5% resistor (0603)
R19, R20
2
10kΩ ±5% resistors (0603)
RS1
1
0.01Ω ±1%, 0.5W sense resistor (2010)
Vishay Dale WSL2010 0.010 1.0%
IRC LRC-LR2010-01-R010-F
RS2
1
0.015Ω ±1%, 0.5W sense resistor (2010)
Vishay Dale WSL2010 0.015 1.0%
IRC LRC-LR2010-01-R015-F
U1
1
MAX1909ETI/MAX8725ETI (28-pin thin
QFN-EP)
MOSFET Selection
for these devices focus on the challenge of obtaining
high load-current capability when using high-voltage
(>20V) AC adapters. Low-current applications usually
require less attention. The high-side MOSFET (P1) must
be able to dissipate the resistive losses plus the switching
losses at both VDCIN(MIN) and VDCIN(MAX).
MOSFETs P2 and P3 (Figure 1) provide power to the
system load when the AC adapter is inserted. These
devices may have modest switching speeds, but must
be able to deliver the maximum input current as set by
RS1. As always, care should be taken not to exceed
the device’s maximum voltage ratings or the maximum
operating temperature.
The p-channel/n-channel MOSFETs (P1, N1) are the
switching devices for the buck controller. The guidelines
Ideally, the losses at VDCIN(MIN) should be roughly equal
to losses at VDCIN(MAX), with lower losses in between. If
the losses at VDCIN(MIN) are significantly higher than the
losses at VDCIN(MAX), consider increasing the size of P1.
Conversely, if the losses at VDCIN(MAX) are significantly
higher than the losses at VDCIN(MIN), consider reducing
the size of P1. If DCIN does not vary over a wide range,
the minimum power dissipation occurs where the resistive
losses equal the switching losses.
Design Procedure
Table 2 lists the recommended components and refers
to the circuit of Figure 2. The following sections
describe how to select these components.
26
______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
Select devices that have low turn-off times. To be
conservative, make sure that P1(t DOFF(MAX) ) N1(tDON(MIN)) < 40ns. Failure to do so may result in
efficiency-killing shoot-through currents. If delay mismatch causes shoot-through currents, consider adding
extra capacitance from gate to source on N1 to slow
down its turn-on time.
MOSFET Power Dissipation
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET, the worst-case
power dissipation (PD) due to resistance occurs at the
minimum supply voltage:
V
 I
2
PD(P1) =  BATT   LOAD  × RDS(ON)
 VDCIN   2 
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages.
However, the RDS(ON) required to stay within package
power-dissipation limits often limits how small the
MOSFET can be. The optimum occurs when the switching (AC) losses equal the conduction (I 2 R DS(ON) )
losses. High-side switching losses do not usually
become an issue until the input is greater than approximately 15V. Switching losses in the high-side MOSFET
can become an insidious heat problem when maximum
AC adapter voltages are applied, due to the squared
term in the CV2 f switching-loss equation. If the highside MOSFET that was chosen for adequate RDS(ON) at
low supply voltages becomes extraordinarily hot when
subjected to VDCIN(MAX), then choose a MOSFET with
lower losses. Calculating the power dissipation in P1
due to switching losses is difficult since it must allow for
difficult quantifying factors that influence the turn-on
and turn-off times. These factors include the internal
gate resistance, gate charge, threshold voltage, source
inductance, and PC board layout characteristics. The
1.5
3 CELLS
4 CELLS
RIPPLE CURRENT (A)
The MAX1909/MAX8725 have an adaptive dead-time circuit that prevents the high-side and low-side MOSFETs
from conducting at the same time (see the MOSFET
Drivers section). Even with this protection, it is still possible for delays internal to the MOSFET to prevent one
MOSFET from turning off when the other is turned on.
MAX1909/MAX8725
Choose a low-side MOSFET that has the lowest possible on-resistance (R DS(ON)), comes in a moderatesized package, and is reasonably priced. Make sure
that the DLO gate driver can supply sufficient current to
support the gate charge and the current injected into
the parasitic gate-to-drain capacitor caused by the
high-side MOSFET turning on; otherwise, cross-conduction problems can occur.
1.0
0.5
VDCIN = 19V
VCTL = ICTL = LDO
0
8
9
10 11 12 13 14 15 16 17 18
VBATT (V)
Figure 11. Ripple Current vs. Battery Voltage (MAX1909)
following switching-loss calculation provides only a very
rough estimate and is no substitute for breadboard
evaluation, preferably including a verification using a
thermocouple mounted on P1:
PD(P1_ Switching) =
VDCIN(MAX)2 × CRSS × fSW × ILOAD
2 IGATE
where CRSS is the reverse transfer capacitance of P1,
and IGATE is the peak gate-drive source/sink current.
For the low-side MOSFET (N1), the worst-case power
dissipation always occurs at maximum input voltage:
 V
 I
2
PD(N1) = 1−  BATT    LOAD  × RDS(ON)


2
V
  DCIN  
Choose a Schottky diode (D1, Figure 2) with a forward
voltage low enough to prevent the N1 MOSFET body
diode from turning on during the dead time. As a general rule, a diode with a DC current rating equal to 1/3rd
the load current is sufficient. This diode is optional and
can be removed if efficiency is not critical.
Inductor Selection
The charge current, ripple, and operating frequency
(off-time) determine the inductor characteristics.
Inductor L1 must have a saturation current rating of at
least the maximum charge current plus 1/2 of the ripple
current (∆IL):
ISAT = ICHG + (1/2) ∆IL
______________________________________________________________________________________
27
MAX1909/MAX8725
Multichemistry Battery Chargers with Automatic
System Power Selector
The ripple current is determined by:
∆IL = VBATT tOFF / L
where:
tOFF = 2.5µs (VDCIN - VBATT) / VDCIN for
VBATT < 0.88 VDCIN
or:
tOFF = 0.3µs for VBATT > 0.88 VDCIN
Figure 11 illustrates the variation of the ripple current
vs. battery voltage when the circuit is charging at 3A
with a fixed input voltage of 19V.
Higher inductor values decrease the ripple current.
Smaller inductor values require high-saturation current
capabilities and degrade efficiency. Designs that set
LIR = ∆IL / ICHG = 0.3 usually result in a good balance
between inductor size and efficiency.
Input-Capacitor Selection
The input capacitor must meet the ripple current
requirement (IRMS) imposed by the switching currents.
Nontantalum chemistries (ceramic, aluminum, or OSCON) are preferred due to their resilience to power-up
surge currents.
 V

BATT (VDCIN − VBATT )
IRMS = ICHG 


VDCIN


The input capacitors should be sized so that the
temperature rise due to ripple current in continuous
conduction does not exceed approximately 10°C. The
maximum ripple current occurs at 50% duty factor or
VDCIN = 2 ✕ VBATT, which equates to 0.5 ✕ ICHG. If the
application of interest does not achieve the maximum
value, size the input capacitors according to the
worst-case conditions.
Output-Capacitor Selection
The output capacitor absorbs the inductor ripple current and must tolerate the surge current delivered from
the battery when it is initially plugged into the charger.
As such, both capacitance and ESR are important
parameters in specifying the output capacitor as a filter
and to ensure the stability of the DC-DC converter (see
the Compensation section). Beyond the stability
requirements, it is often sufficient to make sure that the
output capacitor’s ESR is much lower than the battery’s
ESR. Either tantalum or ceramic capacitors can be
used on the output. Ceramic devices are preferable
because of their good voltage ratings and resilience to
surge currents.
28
Applications Information
Startup Conditioning Charge for
Overdischarged Cells
It is desirable to charge deeply discharged Li+ batteries at a low rate to improve cycle life. The
MAX1909/MAX8725 automatically reduces the charge
current when the voltage per cell is below 3.1V. The
charge current-sense voltage is set to 4.5mV (ICHG =
300mA with RS2 = 15mΩ) until the battery voltage rises
above the threshold. There is approximately 300mV for
3 cell, 400mV for 4 cell of hysteresis to prevent the
charge-current magnitude from chattering between the
two values.
For the MAX8725, control the ICTL voltage to set a conditioning charge rate.
Layout and Bypassing
Bypass DCIN with a 1µF capacitor to ground (Figure 1).
D4 protects the MAX1909/MAX8725 when the DC
power source input is reversed. A signal diode for D4 is
adequate because DCIN only powers the LDO and the
internal reference. Bypass LDO, DHIV, DLOV, and
other pins as shown in Figure 1.
Good PC board layout is required to achieve specified
noise, efficiency, and stable performance. The PC
board layout artist must be given explicit instructions—
preferably, a sketch showing the placement of the
power-switching components and high-current routing.
Refer to the PC board layout in the MAX1909/MAX8725
evaluation kit for examples. A ground plane is essential
for optimum performance. In most applications, the circuit is located on a multilayer board, and full use of the
four or more copper layers is recommended. Use the
top layer for high-current connections, the bottom layer
for quiet connections, and the inner layers for an uninterrupted ground plane.
Use the following step-by-step guide:
1) Place the high-power connections first, with their
grounds adjacent:
a) Minimize the current-sense resistor trace
lengths, and ensure accurate current sensing
with Kelvin connections.
b) Minimize ground trace lengths in the high-current
paths.
c) Minimize other trace lengths in the high-current
paths.
d) Use > 5mm wide traces.
______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
f)
Minimize the LX node (MOSFETs, rectifier cathode, inductor (15mm max length)).
PGND
POWER PATH
Ideally, surface-mount power components are
flush against one another with their ground
terminals almost touching. These high-current
grounds are then connected to each other with
a wide, filled zone of top-layer copper, so they
do not go through vias.
QUIET GROUND
ISLAND
The resulting top-layer ground plane is connected
to the normal inner-layer ground plane at the output ground terminals, which ensures that the IC’s
analog ground is sensing at the supply’s output
terminals without interference from IR drops and
ground noise. Other high-current paths should
also be minimized, but focusing primarily on short
ground and current-sense connections eliminates
about 90% of all PC board layout problems.
2) Place the IC and signal components. Keep the main
switching node (LX node) away from sensitive analog components (current-sense traces and REF
capacitor). Important: the IC should be less than
10mm from the current-sense resistors.
Quiet connections to REF, VCTL, ICTL, CCV, CCI,
CCS, IINP, ACIN, and DCIN should be returned to a
separate ground (GND) island. The appropriate
traces are marked on the schematic with the
ground symbol ( ). There is very little current flowing in these traces, so the ground island need not
be very large. When placed on an inner layer, a sizable ground island can help simplify the layout
because the low-current connections can be made
through vias. The ground pad on the backside of
the package should also be connected to this quiet
ground island.
3) Keep the gate drive traces (DHI and DLO) as short
as possible (L < 20mm), and route them away from
the current-sense lines and REF. These traces
should also be relatively wide (W > 1.25mm).
KELVIN-SENSE VIAS
UNDER THE SENSE
RESISTOR
(REFER TO EVALUATION KIT)
INDUCTOR
COUT
COUT
CIN
OUTPUT
INPUT
GND
Figure 12. PC Board Layout Examples
Chip Information
TRANSISTOR COUNT: 2720
PROCESS: BiCMOS
4) Place ceramic bypass capacitors close to the IC.
The bulk capacitors can be placed further away.
5) Use a single-point star ground placed directly
below the part at the PGND pin. Connect the power
ground (ground plane) and the quiet ground island
at this location. See Figure 12.
______________________________________________________________________________________
29
MAX1909/MAX8725
e) Connect C1 and C2 to the high-side MOSFET
(10mm max length). Return these capacitors to
the power ground plane.
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
D2
0.15 C A
D
b
C
L
0.10 M C A B
D2/2
D/2
k
0.15 C B
MARKING
QFN THIN.EPS
MAX1909/MAX8725
Multichemistry Battery Chargers with Automatic
System Power Selector
XXXXX
E/2
E2/2
C
L
(NE-1) X e
E
E2
k
L
DETAIL A
PIN # 1
I.D.
e
PIN # 1 I.D.
0.35x45∞
(ND-1) X e
DETAIL B
e
L1
L
C
L
C
L
L
L
e
e
0.10 C
A
C
0.08 C
A1 A3
PACKAGE OUTLINE,
16, 20, 28, 32L THIN QFN, 5x5x0.8mm
21-0140
-DRAWING NOT TO SCALE-
COMMON DIMENSIONS
A
0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80
0
A3
b
D
E
L1
0
0.20 REF.
0.02 0.05
0
0.20 REF.
0.02 0.05
0
0.20 REF.
0.02 0.05
0.20 REF.
0.25 0.30 0.35 0.25 0.30 0.35 0.20 0.25 0.30 0.20 0.25 0.30
4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10
4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10
0.80 BSC.
e
k
L
0.02 0.05
0.65 BSC.
0.50 BSC.
0.50 BSC.
0.25 - 0.25 - 0.25 - 0.25
0.30 0.40 0.50 0.45 0.55 0.65 0.45 0.55 0.65 0.30 0.40 0.50
-
-
-
-
-
N
ND
NE
16
4
4
20
5
5
JEDEC
WHHB
WHHC
-
-
1
2
EXPOSED PAD VARIATIONS
PKG.
16L 5x5
20L 5x5
28L 5x5
32L 5x5
SYMBOL MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX.
A1
F
-
-
-
28
7
7
WHHD-1
-
-
32
8
8
WHHD-2
NOTES:
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.
3. N IS THE TOTAL NUMBER OF TERMINALS.
D2
L
E2
PKG.
CODES
MIN.
NOM. MAX.
MIN.
NOM. MAX.
±0.15
T1655-1
T1655-2
T1655N-1
3.00
3.00
3.00
3.10 3.20 3.00
3.10 3.20 3.00
3.10 3.20 3.00
3.10 3.20
3.10 3.20
3.10 3.20
T2055-2
T2055-3
T2055-4
3.00
3.00
3.00
3.10 3.20 3.00
3.10 3.20 3.00
3.10 3.20 3.00
3.10
3.10
3.10
3.20
3.20
3.20
**
**
**
**
T2055-5
T2855-1
T2855-2
T2855-3
T2855-4
T2855-5
T2855-6
T2855-7
T2855-8
T2855N-1
T3255-2
T3255-3
T3255-4
T3255N-1
3.15
3.15
2.60
3.15
2.60
2.60
3.15
2.60
3.15
3.15
3.00
3.00
3.00
3.00
3.25
3.25
2.70
3.25
2.70
2.70
3.25
2.70
3.25
3.25
3.10
3.10
3.10
3.10
3.25
3.25
2.70
3.25
2.70
2.70
3.25
2.70
3.25
3.25
3.10
3.10
3.10
3.10
3.35
3.35
2.80
3.35
2.80
2.80
3.35
2.80
3.35
3.35
3.20
3.20
3.20
3.20
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL
CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE
OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1
IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE.
3.35
3.35
2.80
3.35
2.80
2.80
3.35
2.80
3.35
3.35
3.20
3.20
3.20
3.20
3.15
3.15
2.60
3.15
2.60
2.60
3.15
2.60
3.15
3.15
3.00
3.00
3.00
3.00
**
**
0.40
DOWN
BONDS
ALLOWED
NO
YES
NO
NO
YES
NO
Y
**
NO
NO
YES
YES
NO
**
**
0.40
**
**
**
**
**
NO
YES
Y
N
NO
YES
NO
NO
**
**
**
**
** SEE COMMON DIMENSIONS TABLE
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm
FROM TERMINAL TIP.
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.
9. DRAWING CONFORMS TO JEDEC MO220, EXCEPT EXPOSED PAD DIMENSION FOR T2855-1,
T2855-3 AND T2855-6.
10. WARPAGE SHALL NOT EXCEED 0.10 mm.
11. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY.
12. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY.
PACKAGE OUTLINE,
16, 20, 28, 32L THIN QFN, 5x5x0.8mm
21-0140
-DRAWING NOT TO SCALE-
F
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
30 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2004 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.