ON LV5695P System power supply ic for automotive infotainment multiple output linear voltage regulator Datasheet

Ordering number : ENA1972B
LV5695P
Bi-CMOS IC
System Power Supply IC
for Automotive Infotainment
Multiple Output Linear
Voltage Regulator
http://onsemi.com
Overview
The LV5695P is a multiple output linear regulator IC, which allows reduction of quiescent current. The LV5695P is
specifically designed to address automotive infotainment systems power supply requirements. The LV5695P integrates
5 linear regulator outputs, 2 high side power switches, over current protection, overvoltage protection and thermal
shutdown circuitry.
Function
• Quiescent current 50μA (Typ. when only VDD is in operation)
• Five channel regulator
For VDD: VOUT is 5.0V/3.3V(Operation always),
IOmax is 300mA
For SWD5V: VOUT is 5.0V, IOmax is 500mA
For CD: VOUT is 8.0V, IOmax is 2000mA
For illumination: VOUT is 8.5V, IOmax is 500mA
For audio systems: VOUT is 8.45V, IOmax is 800mA
• Two high side switch:
AMP: Voltage difference between input and output is 0.5V,
IOmax is 500mA
ANT: Voltage difference between input and output is 0.5V,
IOmax is 350mA
• Over current protector
• Overvoltage protector (Without VDD-OUT) Clamp voltage is 28V (typical)
• Thermal Shut down 175ºC (typical)
• Pch-LDMOS is used for power output block.
HZIP15J
(Warning) The protector functions only improve the IC’s tolerance and they do not guarantee the safety of the IC if used under the
conditions out of safety range or ratings. Use of the IC such as use under over current protection range or thermal shutdown state may
degrade the IC’s reliability and eventually damage the IC.
ORDERING INFORMATION
See detailed ordering and shipping information on page 14 of this data sheet.
Semiconductor Components Industries, LLC, 2014
March, 2014
32414NK/O2611SY 20111018-S00003/82411SY 20110718-S00006 No.A1972-1/14
LV5695P
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Symbol
Power supply voltage
VCC max
Conditions
Power dissipation
Pd max
IC unit
(*1)
At using Al heat sink (50×50×1.5mm3)
Ratings
Unit
At infinity heat sink
36
V
1.5
W
5.6
W
32.5
W
50
V
Peak voltage
VCC peak
Regarding Bias wave, refer to below the pulse.
Operating temperature
Topr
-40 to +85
°C
Storage temperature
Tstg
-55 to +150
°C
Junction temperature
Tj max
150
°C
*1 : Ta ≤ 25°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
Recommended Operating Conditions at Ta = 25°C
Parameter
Power supply voltage rating 1
Conditions
Ratings
Unit
VDD output ON, SWD output ON
Power supply voltage rating 2
ILM output ON
Power supply voltage rating 3
Audio output ON, CD output ON
7 to 16
V
10.3 to 16
V
10 to 16
V
* VCC1 should be as follows: VCC1>VCC-0.7V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
Electrical Characteristics at Ta = 25°C(*2), VCC = VCC1=14.4V
Parameter
Current drain
Symbol
ICC
Conditions
Ratings
min
typ
VDD no load, CTRL1/2/3 = ⎡L/L/L⎦
Unit
max
50
100
μA
0.3
V
CTRL1/2/3 Input
Low input voltage
VIL1
0
Middle input voltage 1
VIM1
0.8
1.06
1.4
V
Middle input voltage 2
VIM2
1.9
2.13
2.4
V
High input voltage
VIH
2.9
3.2
5.5
V
Input impedance
RIN
280
400
520
kΩ
Input voltage ≤ 3.3V
IKVDD input.
Low input voltage
VIL2
High input voltage
VIH2
IKVDD
-
-
0.7
V
VCC1-0.7
-
-
V
VDD output(5V/3.3V)
Output voltage
VO11
IO1 = 200mA, IKVDD = VCC1
4.85
5.0
5.15
V
VO12
IO1 = 200mA, IKVDD = GND
3.2
3.3
3.4
V
Output current
IO1
VO11 ≥ 4.7V, VO12 ≥ 3.1V
300
Line regulation
ΔVOLN1
7.5V < VCC1 < 16V, IO1 = 200mA
30
70
mV
Load regulation
ΔVOLD1
1mA < IO1 < 200mA
70
150
mV
Dropout voltage 1
VDROP1
IO1 = 200mA (VDD output 5V time)
0.8
1.6
V
Dropout voltage 2
VDROP1’
IO1 = 100mA (VDD output 5V time)
0.4
0.8
Ripple rejection
RREJ1
f = 120Hz, IO1 = 200mA
mA
30
40
8.196
8.45
V
dB
AUDIO (8.45V) Output ; CTRL2 = ⎡M1 or H⎦
AUDIO output voltage 1
VO3
IO3 = 650mA
AUDIO output current
IO3
VO3 ≥ 8.0V
Line regulation
ΔVOLN3
10V < VCC < 16V, IO3 = 650mA
Load regulation
ΔVOLD3
Dropout voltage 1
VDROP3
Dropout voltage 2
VDROP3’
IO3 = 200mA
Ripple rejection
RREJ3
f = 120Hz, IO3 = 650mA
8.7
800
V
mA
30
90
mV
1mA < IO3 < 650mA
100
200
mV
IO3 = 650mA
0.7
1.2
V
0.2
0.35
V
40
50
dB
Continued on next page.
No.A1972-2/14
LV5695P
Continued from preceding page
Parameter
Symbol
Conditions
Ratings
min
typ
Unit
max
ILM (8.5V) Output ; CTRL1 = ⎡M1 or H⎦
ILM output voltage
VO4
IO4 = 350mA
ILM output current
IO4
VO4 ≥ 8.1V
8.245
8.5
8.755
Line regulation
ΔVOLN4
10.8V < VCC < 16V, IO4 = 350mA
Load regulation
ΔVOLD4
Dropout voltage 1
VDROP4
Dropout voltage 2
VDROP4’
IO4 = 100mA
Ripple rejection
RREJ4
f = 120Hz, IO4 = 350mA
Output voltage
VO5
IO5 = 500mA
Output current
IO5
VCC-1.0 ≥ ΔVO5
Output voltage
VO6
IO6 = 300mA
Output current
IO6
VCC-1.0 ≥ ΔVO6
350
SWD output voltage
VO7
IO7 = 350mA
4.85
SWD output current
IO7
VO7 ≥ 4.7V
500
Line regulation
ΔVOLN7
10V < VCC < 16V, IO7 = 350mA
30
70
mV
Load regulation
ΔVOLD7
1mA < IO7 < 350mA
70
150
mV
Dropout voltage
VDROP7
IO7 = 350mA
0.8
1.6
V
Ripple rejection
RREJ7
f = 120Hz, IO7 = 350mA
500
V
mA
40
100
mV
1mA < IO4 < 350mA
70
150
mV
IO4 = 350mA
1.0
1.5
V
0.3
0.6
V
40
50
dB
AMP_HS-SW; CTRL3 = ⎡M2 or H⎦
VCC-0.5
VCC-1.0
500
V
mA
ANT_HS-SW; CTRL3 = ⎡M1 or H⎦
VCC-0.5
VCC-1.0
V
mA
SWD5V; CTRL2 = ⎡M2 or H⎦
5.0
5.15
V
mA
40
50
dB
8.0
8.24
V
CD(8.0V output); CTRL1 = ⎡ M2 or H⎦
CD output voltage
VO81
IO8 = 1300mA
7.76
CD output current
IO8
VO81 ≥ 7.6V
2000
Line regulation
ΔVOLN8
10.5V < VCC < 16V, IO8 = 1300mA
40
100
mV
Load regulation
ΔVOLD8
10mA < IO8 < 1300mA
70
200
mV
V
mA
Dropout voltage 1
VDROP8
IO8 = 1300mA
1.3
1.95
Dropout voltage 2
VDROP8’
IO8 = 350mA
0.35
0.7
Ripple rejection
RREJ8
f = 120Hz, IO8 = 1300mA
40
50
V
dB
*2: The entire specification has been defined based on the tests performed under the conditions where Tj and Ta (=25°C) are almost equal. There tests were
performed with pulse load to minimize the increase of junction temperature (Tj).
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
No.A1972-3/14
LV5695P
Package Dimensions
unit : mm
HZIP15J
CASE 945AC
ISSUE A
GENERIC
MARKING DIAGRAM*
XXXXXXXXXX
YMDDD
SOLDERING FOOTPRINT*
Through Hole Area
(Unit: mm)
Package name
HZIP15J
2.54
1.2
2.54
(1.91)
XXXXX = Specific Device Code
Y = Year
M = Month
DDD = Additional Traceability Data
2.54
2.54
NOTE: The measurements are not to guarantee but for reference only.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
No.A1972-4/14
LV5695P
• Allowable power dissipation derating curve
Pd max -- Ta
Allowable power dissipation, Pd max -- W
8
Aluminum heat sink mounting conditions
tightening torque : 39N⋅cm, using silicone grease
7
Aluminum heat sink (50 × 50 × 1.5mm3) when using
6
5.6
5
4
3
2
Independent IC
1.5
1
0
0
20
40
60
80
100
120
140 150 160
Ambient temperature, Ta -- °C
• Waveform applied during surge test
50V
90%
10%
16V
5msec
100msec
No.A1972-5/14
LV5695P
CTRL Pin Output Truth Table(Each output can be independently controlled by four value input.)
INAMP
INANT
CTRL3
AMP
ANT
L
L
L
OFF
OFF
L
H
M1
OFF
ON
H
L
M2
ON
OFF
H
H
H
ON
ON
CTRL2
SWD5V
AUDIO
CTRL1
CD
ILM
L
OFF
OFF
L
OFF
OFF
M1
OFF
ON
M1
OFF
ON
M2
ON
OFF
M2
ON
OFF
H
ON
ON
H
ON
ON
INAMP
INANT
CTL3
(Warning) Usage of CTRL2
When CTRL pin transits between L and M2, since it passes M1, ILM,/AUDIO/ANT is turned on for a moment. Likewise,
when CTRL pin transits between H and M1, since it passes M2, ILM/AUDIO/ANT is turned off for a moment.
To avoid operation failure by the above factors, please refer to the following precautions.
• Do not connect parasitic capacitor to CTRL as much as possible.
• If use of capacitor for CTRL is required, keep the resistance value as low as possible.
• Make sure that the output load capacitor has enough marjin against the voltage fluctuation due to instantaneous
ON/OFF.
No.A1972-6/14
LV5695P
z Block Diagram
VCC
AMP
out
AMP_SW(V CC -0.5V)
500mA
ANT
out
ANT_SW(VCC -0.5V)
350mA
Over
Voltage
Protection
Start
up
Vref
+
ILM output(8.5V)
500mA
+
CTRL1
CTRL2
AUDIO output(8.45V)
800mA
OUTPUT
Control
CTRL3
+
SWD output(5V)
500mA
Thermal
+
CD output(8V)
2000mA
Shut Down
VCC1(VDD power supply input)
GND
VCC
+
VDD output(3.3/5V)
300mA
IKVDD:VDD(3.3/5V) changeing pin
IKVDD=VCC1:5V
IKVDD=GND:3.3V
No.A1972-7/14
LV5695P
Pin Function
Pin No.
1
Pin name
ILM
Description
ILM output pin
ON when CTRL1 = M1, H
Equivalent Circuit
VCC
15
8.5V/0.5A
1
2
GND
3
CD
2
GND
15
VCC
GND pin
CD output pin
ON when CTRL1 = M2, H
8.0V/2A
3
2
4
CTRL1
CTRL1/2/3 input pin
6
CTRL2
Four values input
8
CTRL3
GND
15
VCC
4
6
8
2
5
AUDIO
AUDIO output pin
ON when CTRL2 = M1, H
15
GND
VCC
8.45V/0.8A
5
2
GND
Continued on next page.
No.A1972-8/14
LV5695P
Continued from preceding page.
Pin No.
7
Pin name
SWD
Description
SWD output pin
ON when CTRL2 = M2, H
Equivalent Circuit
VCC
15
5V/0.5A
7
2
9
ANT
ANT output pin
GND
VCC
15
ON when CTRL3 = M1, H
VCC-0.5V/350mA
EXT output pin
11
ON when CTRL2 = M2, H
VCC-0.5V/500mA
11 9
10
NC
(GND)
12
IKVDD
VDD voltage change control input pin
VCC1/GND
2
GND
14
VCC
12
2
13
VDD
VDD output pin
5.0V/0.3A(IKVDD = VCC1)
3.3V/0.3A(IKVDD = GND)
GND
VCC
14
13
2
14
VCC1
VDD power supply pin
15
VCC
Power supply pin
GND
VCC 15
2
14 VCC1
GND
No.A1972-9/14
LV5695P
Timing Chart
28V
VCC
(15PIN)
28V
VCC1
(14PIN)
5.8V
VDD output
(5V time)
(13PIN)
CTRL1 input
(4PIN)
H
M2
M1
L
H
CTRL2 input
(6PIN)
M2
M1
L
H
CTRL3 input
(8PIN)
M2
M1
L
ILM output
(1PIN)
CD output
(3PIN)
AUDIO output
(5PIN)
SWD output
(7PIN)
ANT output
(9PIN)
AMP output
(11PIN)
*Usage condition: Use under typical value.
No.A1972-10/14
LV5695P
+
AUDIO
CD
ILM
CTRL3
IKVDD
VCC1
15
C11 C16 +
C12 +
C14 +
R1
D4
D2
C15
C13
VDD
C8 + C7
C6 + C5
C4 + C3
C2 + C1
CTRL2
14
13
C10
+
C9
CTRL1
12
11
VCC
10
9
VDD
8
7
AMP
(NC)
CTRL3
CTRL2
6
5
ANT
4
3
SWD
2
1
AUDIO
CD
ILM
GND
CTRL1
Example of applied circuit
D5
D3
D1
ANT AMP
SWD
VCC
Peripheral parts list
Name of part
Description
Recommended value
C2, C4, C6, C8, C12
Output stabilization capacitor
10μF or more*
C1, C3, C5, C7, C11
Output stabilization capacitor
0.22μF or more*
Remarks
Electrolytic capacitor
Ceramic capacitor
C14, C16
Power supply bypass capacitor
100μF or more
These capacitors must be placed near
C13, C15
Oscillation prevention capacitor
0.22μF or more
the VCC and GND pins.
C9, C10
AMP/ANT output stabilization capacitor
2.2μF or more
R1
Resistance for protection
D1
Diode for prevention of backflow
D2, D3, D4, D5
10 to 100kΩ
Diode for internal element protection
SB1003M3
note)The circuit diagram and the values are only tentative which are subject to change.
* : Make sure that the capacitors of the output pins are 10μF or higher and ESR is 10Ω or lower in total and temperature characteristics and accuracy are taken
into consideration. Also the E-cap should have good high frequency characteristics.
Caution for implementing LV5695P to a system board
The package of LV5695P is HZIP15J which has some metal exposures other than connection pins and heatsink as shown in the
diagram below. The electrical potentials of (2) and (3) are the same as those of pin 15 and pin 1, respectively. (2) (=pin 15) is the VCC
pin and (3) (=pin 1) is the ILM (regulator) output pin. When you implement the IC to the set board, make sure that the bolts and the
heatsink are out of touch from (2) and (3). If the metal exposures touch the bolts which has the same electrical potential with GND,
GND short occurs in ILM output and VCC. The exposures of (1) are connected to heatsink which has the same electrical potential with
substrate of the IC chip (GND). Therefore, (1) and GND electrical potential of the set board can connect each other.
· HZIP15J outline
Heat-sink
1 Same potential
2 15PIN
Same potential
1PIN
3 Same potential
Heat-sink
1 Same potential
Heat-sink side
1
Heat-sink
Same potential
:Metal exposure
Heat-sink side
:Metal exposure
<Top view of HZIP15J>
<Side view of HZIP15J>
No.A1972-11/14
LV5695P
· Frame diagram (LV5695P) *In the system power supply other than LV5695P, pin assignment may differ.
Metal exposure 1
Metal exposure 3
Metal exposure 2
Metal exposure 1
LV5695
Metal exposure 1
Metal exposure 1
1PIN
15PIN
No.A1972-12/14
LV5695P
HZIP15J Heat sink attachment
Heat sinks are used to lower the semiconductor device junction temperature by leading the head generated by the device to
the outer environment and dissipating that heat.
a. Unless otherwise specified, for power ICs with tabs and power ICs with attached heat sinks, solder must not be
applied to the heat sink or tabs.
b.
Heat sink attachment
· Use flat-head screws to attach heat sinks.
· Use also washer to protect the package.
· Use tightening torques in the ranges 39-59Ncm(4-6kgcm) .
· If tapping screws are used, do not use screws with a diameter larger
than the holes in the semiconductor device itself.
· Do not make gap, dust, or other contaminants to get between the
semiconductor device and the tab or heat sink.
· Take care a position of via hole .
· Do not allow dirt, dust, or other contaminants to get between the
semiconductor device and the tab or heat sink.
· Verify that there are no press burrs or screw-hole burrs on the heat sink.
· Warping in heat sinks and printed circuit boards must be no more than
0.05 mm between screw holes, for either concave or convex warping.
· Twisting must be limited to under 0.05 mm.
· Heat sink and semiconductor device are mounted in parallel.
Take care of electric or compressed air drivers
· The speed of these torque wrenches should never exceed 700 rpm,
and should typically be about 400 rpm.
Binding head
machine screw
Countersunk head
mashine screw
Heat sink
gap
Via hole
c.
Silicone grease
· Spread the silicone grease evenly when mounting heat sinks.
· Our company recommends YG-6260 (Momentive Performance Materials Japan LLC)
d.
Mount
· First mount the heat sink on the semiconductor device, and then mount that assembly on the printed circuit board.
· When attaching a heat sink after mounting a semiconductor device into the printed circuit board, when tightening
up a heat sink with the screw, the mechanical stress which is impossible to the semiconductor device and the pin
doesn't hang.
e.
When mounting the semiconductor device to the heat sink using jigs, etc.,
· Take care not to allow the device to ride onto the jig or positioning dowel.
· Design the jig so that no unreasonable mechanical stress is not applied to the semiconductor device.
f.
Heat sink screw holes
· Be sure that chamfering and shear drop of heat sinks must not be larger than the diameter of screw head used.
· When using nuts, do not make the heat sink hole diameters larger than the diameter of the head of the screws used.
A hole diameter about 15% larger than the diameter of the screw is desirable.
· When tap screws are used, be sure that the diameter of the holes in the heat sink are not too small. A diameter about
15% smaller than the diameter of the screw is desirable.
g.
There is a method to mount the semiconductor device to the heat sink by using a spring band. But this method is not
recommended because of possible displacement due to fluctuation of the spring force with time or vibration.
No.A1972-13/14
LV5695P
ORDERING INFORMATION
Device
LV5695P-E
Package
HZIP15J
(Pb-Free)
Shipping (Qty / Packing)
20 / Fan-Fold
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application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual
performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as
components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
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PS No.A1972-14/14
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