ONSEMI P1727AF-08SR

P1727
Notebook LCD Panel EMI
Reduction IC
Features
system cost savings by reducing the number of circuit
board layers and shielding that are traditionally required
to pass EMI regulations.
• FCC approved method of EMI attenuation
• Generates a low EMI spread spectrum of the input
clock frequency
The P1727 modulates the output of a single PLL in
order to “spread” the bandwidth of a synthesized clock,
thereby decreasing the peak amplitudes of its
harmonics. This result in significantly lower system EMI
compared to the typical narrow band signal produced
by oscillators and most clock generators. Lowering EMI
by increasing a signal’s bandwidth is called spread
spectrum clock generation.
• Optimized for frequency range: P1727X: 20MHz to
40MHz
• Internal loop filter minimizes external components
and board space
• 8 different frequency deviations ranging from
±0.625% to –3.50%
• Low inherent Cycle-to-cycle jitter
• 3.3V Operating Voltage
The P1727 uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented by using a proprietary all-digital method.
• Supports notebook VGA and other LCD timing
controller applications
• Available in 8-pin SOIC.
Applications
Product Description
The P1727 is targeted towards notebook LCD displays,
The P1727 is a versatile spread spectrum frequency
modulator designed specifically for a wide range of
clock frequencies. The P1727 reduces electromagnetic
interference (EMI) at the clock source, allowing system
wide reduction of EMI of down stream (clock and data
dependent signals). The P1727 allows significant
other displays using an LVDS interface, PC peripheral
Block Diagram
PDB
devices and embedded systems.
VDD
PLL
Modulation
CLKIN
Frequency
Divider
Feedback
Divider
Phase
Detector
Loop
Filter
VCO
Output
Divider
ModOUT
REFOUT
VSS
©2010 SCILLC. All rights reserved.
JANUARY 2010 – Rev. 1
Publication Order Number:
P1727/D
P1727
Pin Configuration
8 PDB
CLKIN 1
VDD
VSS
2
P1727
7
NC
6 NC
3
ModOUT 4
5
Table 1 – Power Down Selection
PDB
Spread Spectrum
ModOUT
REFOUT
PLL
Mode
0
N/A
Disabled
Disabled
Power Down
1
ON
Normal
Normal
Normal
Table 2 – Frequency Deviation Selection
P/ N
Deviation
P/N
Deviation
P1727A
-1.25%
P1727E
±0.625%
P1727B
-1.75%
P1727F
±0.875%
P1727C
-2.50%
P1727G
±1.25%
P1727D
-3.50%
P1727H
±1.75%
Pin Description
Pin#
Pin Name
Type
Description
1
CLKIN
I
External reference frequency input. Connect to externally generated
reference signal.
2
VDD
P
Connect to +3.3V.
3
VSS
P
Ground Connection. Connect to system ground.
4
ModOUT
O
Spread Spectrum Clock output.
5
REFOUT
O
Reference output.
6
NC
No connect.
7
NC
No connect.
8
PDB
I
Powerdown Pin. Pull low to disable spread spectrum clock output.
Rev. 1 | Page 2 of 6 | www.onsemi.com
P1727
Schematic for notebook VGA application
27MHz Pixel Clock input
VDD
1 CLKIN
CLKIN
2 VDD
0.1 µF
PDB 8
P1727
Absolute Maximum Ratings
Symbol
VDD, VIN
TSTG
4 ModOUT
NC 7
NC 6
3 VSS
ModOut Clock
Tie low to enable
Powerdown mode.
REFOUT 5
Parameter
Voltage on any pin with respect to Ground
Storage temperature
Reference Clock O/P
Rating
Unit
-0.5 to +7
V
-65 to +125
°C
Ts
Max. Soldering Temperature (10 sec)
260
°C
TJ
Junction Temperature
150
°C
TDV
Static Discharge Voltage (As per JEDEC STD22- A114-B)
2
KV
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
Operating Conditions
Symbol
Min
Max
Unit
Supply Voltage with respect to VSS
3.0
3.6
V
TA
Operating temperature
-40
+85
°C
CL
Load Capacitance
15
pF
CIN
Input Capacitance
7
pF
VDD
Parameter
Rev. 1 | Page 3 of 6 | www.onsemi.com
P1727
DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
VIL
Input Low voltage
VSS – 0.3
0.8
V
VIH
Input High voltage
2.0
VDD +0.3
V
IIL
Input Low current
-35
µA
IIH
Input High current
35
µA
VOL
Output Low current
VDD = 3.3V, IOL = 20mA
0.4
V
VOH
Output High current
VDD = 3.3V, IOH = 20mA
IDD
Static Supply Current (CLKIN, PDB pulled Low)
ICC
Dynamic Supply Current (No Load)
VDD
Operating Voltage
tON
Power up time (first locked clock cycle after power up)
ZOUT
2.5
V
3.0
Clock Output impedance
2
mA
14
18
mA
3.3
3.6
V
0.18
mS
50
Ω
AC Electrical Characteristics
Symbol
fIN
Parameter
Min
Typ
Max
Unit
Input Frequency:
P1727X
20
40
MHz
fOUT
Output Frequency:
P1727X
20
40
MHz
1
tLH
Output Rise time
Measured from 0.8V to 2.0V
0.7
1.1
nS
Output Fall time
Measured from 2.0V to 0.8V
0.6
tHL
1
tJC
Jitter (Cycle-to-cycle)
tD
Output Duty cycle
45
Note: 1. tLH and tHL are measured with a capacitive load of 15pF.
Rev. 1 | Page 4 of 6 | www.onsemi.com
0.9
0.8
1.0
nS
225
325
pS
50
55
%
P1727
Package Information
8-lead (150-mil) SOIC Package
H
E
D
A2
A
θ
C
D
e
A1
L
B
Dimensions
Symbol
Inches
Min
Max
Millimeters
Min
Max
A1
0.004
0.010
0.10
0.25
A
0.053
0.069
1.35
1.75
A2
0.049
0.059
1.25
1.50
B
0.012
0.020
0.31
0.51
C
0.007
0.010
0.18
0.25
D
0.193 BSC
4.90 BSC
E
0.154 BSC
3.91 BSC
e
0.050 BSC
1.27 BSC
H
0.236 BSC
6.00 BSC
L
0.016
0.050
θ
0°
8°
0.41
1.27
0°
8°
Rev. 1 | Page 5 of 6 | www.onsemi.com
P1727
Ordering Information
Part number
P1727AF-08SR
Marking
ABW
Package Configuration
8-PIN SOIC, TAPE & REEL, Green
Temperature Range
0°C to +70°C
A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free.
Licensed under US patent #5,488,627, #6,646,463 and #5,631,920.
Note: This product utilizes US Patent #6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003.
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without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
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