CS2841B Automotive Current Mode PWM Control Circuit The CS2841B provides all the necessary features to implement off−line fixed frequency current−mode control with a minimum number of external components. The CS2841B (a variation of the CS2843A) is designed specifically for use in automotive operation. The low start threshold voltage of 8.0 V (typ), and the ability to survive 40 V automotive load dump transients are important for automotive subsystem designs. The CS2841 series has a history of quality and reliability in automotive applications. The CS2841B incorporates a precision temperature−controlled oscillator with an internally trimmed discharge current to minimize variations in frequency. Duty−cycles greater than 50% are also possible. On board logic ensures that VREF is stabilized before the output stage is enabled. Ion implant resistors provide tighter control of undervoltage lockout. PDIP−8 N SUFFIX CASE 626 8 1 SOIC−14 D SUFFIX CASE 751A 14 1 Features Optimized for Off−Line Control Internally Trimmed Temperature Compensated Oscillator Maximum Duty−Cycle Clamp VREF Stabilized Before Output Stage Enabled Low Start−Up Current Pulse−By−Pulse Current Limiting Improved Undervoltage Lockout Double Pulse Suppression 1.0 % Trimmed Bandgap Reference High Current Totem Pole Output Pb−Free Packages are Available* PIN CONNECTIONS AND MARKING DIAGRAM COMP VREF CS2841BEBG AWL YYWW • • • • • • • • • • • http://onsemi.com VFB Sense OSC VCC VOUT GND PDIP−8 14 CS2841BD14G AWLYWW VFB NC Sense NC OSC 1 COMP NC VREF NC VCC VCC PWR VOUT PWR GND GND SOIC−14 CS2841B A WL YY, Y WW G *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2005 September, 2005 − Rev. 7 1 = Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Publication Order Number: CS2841B/D CS2841B VCC VCC Pwr Undervoltage Lockout Circuit Set/ Reset GND 5.0 V Reference VREF 8.0 V/7.4 V Internal Bias 2.5 V Output Enable NOR Oscillator OSC VOUT S VFB + − Error Amplifier 2R VC R R 1.0 V PWM Latch Pwr GND Current Sensing Comparator COMP Sense Figure 1. Block Diagram MAXIMUM RATINGS Rating Value Unit 40 V Output Current ±1.0 A Output Energy (Capacitive Load) 5.0 mJ −0.3 to 5.5 V 10 mA 260 peak 230 peak °C °C Supply Voltage (Low Impedance Source) Analog Inputs (VFB, Sense) Error Amp Output Sink Current Lead Temperature Soldering Wave Solder (through hole styles only) Note 1 Reflow (SMD styles only) Note 2 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. 10 seconds max 2. 60 seconds max above 183°C ORDERING INFORMATION Device CS2841BEBN8 Package Shipping † PDIP−8 50 Units / Rail CS2841BEBN8G PDIP−8 (Pb−Free) 50 Units / Rail CS2841BED14 SOIC−14 55 Units / Rail CS2841BED14G SOIC−14 (Pb−Free) 55 Units / Rail CS2841BEDR14 SOIC−14 2500 / Tape & Reel CS2841BEDR14G SOIC−14 (Pb−Free) 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 2 CS2841B ELECTRICAL CHARACTERISTICS (−40°C ≤ TA ≤ 85°C, RT = 680 kW, CT = 0.022 mF for Triangular Mode, VCC = 15 V (Note 3), RT = 10 kW, CT = 3.3 nF for Sawtooth Mode (see Figure 7); unless otherwise specified.) Characteristic Test Conditions Min Typ Max Unit 4.9 5.0 5.1 V Reference Section Output Voltage TJ = 25°C, IOUT = 1.0 mA Line Regulation 8.4 ≤ VCC ≤ 16 V − 6.0 20 mV Load Regulation 1.0 ≤ IOUT ≤ 20 mA − 6.0 25 mV Temperature Stability Note 4 − 0.2 0.4 mV/°C Total Output Variation Line, Load, Temp. Note 4 4.82 − 5.18 V Output Noise Voltage 10 Hz ≤ f ≤ 10 kHz, TJ = 25°C. Note 4 − 50 − mV Long Term Stability TA = 125°C, 1000 Hrs. Note 4 − 5.0 25 mV Output Short Circuit TA = 25°C −30 −100 −180 mA Initial Accuracy Sawtooth Mode: TJ = 25°C. See Figure 7. Sawtooth Mode: −40°C ≤ TA ≤ +85°C Triangular Mode: TJ =25°C. See Figure 7. 47 44 44 52 52 52 57 60 60 kHz kHz kHz Voltage Stability 8.4 ≤ VCC ≤ 16 V − 0.2 1.0 % Temperature Stability Sawtooth Mode: TMIN ≤ TA ≤ TMAX. Note 4 Triangular Mode: TMIN ≤ TA ≤ TMAX. Note 4 − − 5.0 8.0 − − % % Amplitude VOSC (Peak to Peak) − 1.7 − V Discharge Current TJ = 25°C TMIN ≤ TA ≤ TMAX 7.4 7.2 8.3 − 9.2 9.4 mA mA Input Voltage VCOMP = 2.5 V 2.42 2.5 2.58 V Input Bias Current VFB = 0 V − −0.3 −2.0 mA AVOL 2.0 ≤ VOUT ≤ 4.0 V 65 90 − dB Unity Gain Bandwidth Note 4 0.7 1.0 − MHz PSRR 8.4 V ≤ VCC ≤ 16 V 60 70 − dB Output Sink Current VFB = 2.7 V, VCOMP = 1.1 V 2.0 6.0 − mA Output Source Current VFB = 2.3 V, VCOMP = 5.0 V −0.5 −0.8 − mA VOUT High VFB = 2.3 V, RL = 15 kW to Ground 5.0 6.0 − V VOUT Low VFB = 2.7 V, RL = 15 kW to VREF − 0.7 1.1 V Oscillator Section Error Amp Section Current Sense Section Gain Notes 5 and 6 2.85 3.0 3.15 V/V Maximum Input Signal VCOMP = 5.0 V. Note 5 0.9 1.0 1.1 V PSRR 12 V ≤ VCC ≤ 25 V. Note 5 − 70 − dB Input Bias Current VSense = 0 V − −2.0 −10 mA Delay to Output TJ = 25°C. Note 4 − 150 300 ns 3. 4. 5. 6. Adjust VCC above the start threshold before setting at 15 V These parameters, although guaranteed, are not 100% tested in production Parameter measured at trip point of latch with VFB = 0 Gain defined as: A+ DVCOMP ; 0 v VSense v 0.8 V. DVSense http://onsemi.com 3 CS2841B ELECTRICAL CHARACTERISTICS (−40°C ≤ TA ≤ 85°C, RT = 680 kW, CT = 0.022 mF for Triangular Mode, VCC = 15 V (Note 3), RT = 10 kW, CT = 3.3 nF for Sawtooth Mode (see Figure 7); unless otherwise specified.) Characteristic Test Conditions Min Typ Max Unit Output Section Output Low Level ISINK = 20 mA ISINK = 200 mA − − 0.1 1.5 0.4 2.2 V V Output High Level ISOURCE = 20 mA ISOURCE = 200 mA 13 12 13.5 13.5 − − V V Rise Time TJ = 25°C, CL = 1.0 nF. Note 7 − 50 150 ns Fall Time TJ = 25°C, CL = 1.0 nF. Note 7 − 50 150 ns Output Leakage Undervoltage Active, VOUT = 0 − −0.01 −10 mA − − 0.5 1.0 mA VFB = VSense = 0 V, RT = 10 kW, CT = 3.3 nF − 11 17 mA − 7.6 8.0 8.4 V 7.0 7.4 7.8 V Total Standby Current Startup Current Operating Supply Current ICC Undervoltage Lockout Section Start Threshold Min. Operating Voltage After Turn On 7. These parameters, although guaranteed, are not 100% tested in production. PACKAGE PIN DESCRIPTION PACKAGE PIN # PDIP−8 SOIC−14 PIN SYMBOL 1 1 COMP 2 3 VFB 3 5 Sense 4 7 OSC Oscillator Timing Network with Capacitor to Ground, Resistor to VREF 5 8 GND Ground 9 Pwr GND 10 VOUT 11 VCC Pwr 7 12 VCC Positive Power Supply 8 14 VREF Output of 5.0 V Internal Reference 2, 4, 6, 13 NC 6 FUNCTION Error Amp Output, Used to Compensate Error Amplifier Error Amp Inverting Input Noninverting Input to Current Sense Comparator Output Driver Ground Output Drive Pin Output Driver Positive Supply No Connection http://onsemi.com 4 CS2841B TYPICAL PERFORMANCE CHARACTERISTICS 100 900 90 RT = 680 W 700 Duty Cycle (%) 600 RT = 1.5 kW 400 300 70 60 50 40 30 20 RT = 10 kW 7k .02 .03 .04 .05 10 k .01 CT (mF) 3k 4k 5k .002 .003 .005 2k .001 1k .0005 700 10 100 300 400 500 200 200 500 80 100 Frequency (kHz) 800 RT (W) Figure 2. Oscillator Frequency vs. CT Figure 3. Oscillator Duty Cycle vs. RT VREF RT 2N2222 4.7 kW A COMP VREF 0.1 mF 1.0 kW Error Amp Adjust 4.7 kW VCC 100 kW VFB 5.0 kW Sense Adjust VCC 0.1 mF CS2841B Sense VOUT OSC GND 1.0 kW 1.0 W VOUT GND CT Figure 4. Test Circuit http://onsemi.com 5 CS2841B CIRCUIT DESCRIPTION Undervoltage Lockout When the power supply sees a sudden large output current increase, the control voltage will increase allowing the duty cycle to momentarily increase. Since the duty cycle tends to exceed the maximum allowed to prevent transformer saturation in some power supplies, the internal oscillator waveform provides the maximum duty cycle clamp as programmed by the selection of OSC components. During Undervoltage Lockout (Figure 5), the output driver is biased to a high impedance state. The output should be shunted to ground with a resistor to prevent output leakage current from activating the power switch. ON/OFF Command to Reset of IC VCC VREF RT VON = 8.0 V VOFF = 7.4 V OSC CT GND ICC Timing Parameters < 15 mA Vupper < 1.0 mA VCC 7.4 V 8.0 V Vlower tc Figure 5. Typical Undervoltage Characteristics td Sawtooth Mode Large RT (≈ 10 kW) PWM Waveform To generate the PWM waveform, the control voltage from the error amplifier is compared to a current sense signal representing the peak output inductor current (Figure 6). An increase in VCC causes the inductor current slope to increase, thus reducing the duty cycle. This is an inherent feed−forward characteristic of current mode control, since the control voltage does not have to change during changes of input supply voltage. VOSC Internal Clock Triangular Mode Small RT (≈ 700 kW) VOSC OSC OSC RESET Internal Clock EA Output Figure 7. Oscillator Timing Network and Parameters Switch Current VCC Setting the Oscillator IO Oscillator timing capacitor, CT, is charged by VREF through RT and discharged by an internal current source. During the discharge time, the internal clock signal blanks out the output to the Low state, thus providing a user selected maximum duty cycle clamp. Charge and discharge times are determined by the general formulas: VO Figure 6. Timing Diagram for Key CS2841B Parameters http://onsemi.com 6 CS2841B REF * Vlower Ǔ ǒVVREF * Vupper The frequency and maximum duty cycle can be determined from the Typical Performance Characteristic graphs. tc + RTCT ln * IdRT * Vupper ǒVVREF Ǔ REF * IdRT * Vlower td + RTCT ln Grounding High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to GND pin in a single point ground. The transistor and 5.0 kW potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to Sense. Substituting in typical values for the parameters in the above formulas: VREF + 5.0 V Vupper + 2.7 V Vlower + 1.0 V Id + 8.3 mA tc [ 0.5534RTCT 2.3 * 0.0083RTǓ ǒ4.0 * 0.0083RT td + RTCT ln VPR C1 68 mF GND Q1 C2 68 mF C3 4.7 pF 100 V R1 4.7 k 20T D2 MBR360 R2 47 MURS120T3 D1 2n4401 9T DZ1 13 V 1N5243B L1 2.2 mH C4 0.1 mF C5 1000 mF C6 1000 mF C7 0.1 mF VCC = 5.0 V @ 750 mA VC C8 10 mF C9 0.1 mF VCC PVCC C12 CS2841B R5 2.0 k Q2 MTDISN06VTL4 R4 VOUT VREF C10 0.1 mF R3 4.99 k 1.0 % 10 10 nF SENSE R6 1.0 k OSC COMP R7 GND C13 4.7 nF PGND VFB R8 4.99 k 1.0 % C11 22.1 k 0.33 mF C14 47 pF Figure 8. Flyback Application http://onsemi.com 7 R9 0.2 1.0 % VCC VCC−GND CS2841B D1 1N5818 L1 VPR C1 100 mF 100 V GND 17 V 100 mH C2 330 mF C3 0.1 mF R2 10 C4 10 mF R1 12 k C5 0.1 mF VCC VOUT VREF C6 0.1 mF 10 R5 CS2841B SENSE R4 3.0 k 100 COMP OSC Q1 MTP12N10 R3 C7 0.01 mF FB GND R8 2.0 k C9 470 pF C8 1.0 nF D2 1N5818 R6 10 k R7 1.0 Input Voltage Range: 8.0 V to 16 V Output Voltage: 17 V @ 100 mA > 300 mA Figure 9. Boost Application PACKAGE THERMAL DATA Parameter PDIP−8 SOIC−14 Unit RqJC Typical 52 30 °C/W RqJA Typical 100 125 °C/W http://onsemi.com 8 CS2841B PACKAGE DIMENSIONS PDIP−8 CASE 626−05 ISSUE L 8 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5 −B− 1 4 DIM A B C D F G H J K L M N F −A− NOTE 2 L C J −T− MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC −−− 10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC −−− 10_ 0.030 0.040 N SEATING PLANE D M K G H 0.13 (0.005) T A M M B M SOIC−14 CASE 751A−03 ISSUE G −A− 14 8 −B− P 7 PL 0.25 (0.010) M B M 7 1 G F R X 45 _ C −T− SEATING PLANE D 14 PL 0.25 (0.010) M T B J M K S A S http://onsemi.com 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 CS2841B ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Phone: 81−3−5773−3850 Email: [email protected] http://onsemi.com 10 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. CS2841B/D