STMicroelectronics LD3985J47R Ultra low drop-low noise bicmos voltage regulators low esr capacitors compatible Datasheet

LD3985
SERIES
ULTRA LOW DROP-LOW NOISE BICMOS VOLTAGE
REGULATORS LOW ESR CAPACITORS COMPATIBLE
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INPUT VOLTAGE FROM 2.5V TO 6V
STABLE WITH LOW ESR CERAMIC
CAPACITORS
ULTRA LOW DROPOUT VOLTAGE (100mV
TYP. AT 150mA LOAD, 0.4mV TYP. AT 1mA
LOAD)
VERY LOW QUIESCENT CURRENT (85µA
TYP. AT NO LOAD, 170µA TYP. AT 150mA
LOAD; MAX 1.5µA IN OFF MODE)
GUARANTEED OUTPUT CURRENT UP TO
150mA
WIDE RANGE OF OUTPUT VOLTAGE: 1.2V;
1.22V; 1.25V; 1.35V; 1.5V; 1.8V; 2V; 2.1V;
2.2V; 2.4V; 2.5V; 2.6V; 2.7V; 2.8V; 2.85V;
2.9V; 3V; 3.1V; 3.2V; 3.3V; 4.7V; 5V
FAST TURN-ON TIME: TYP. 200µs [CO=1µF,
CBYP= 10nF AND IO=1mA]
LOGIC-CONTROLLED ELECTRONIC
SHUTDOWN
INTERNAL CURRENT AND THERMAL LIMIT
OUTPUT LOW NOISE VOLTAGE 30µVRMS
OVER 10Hz to 100KHz
S.V.R. OF 60dB AT 1KHz, 50dB AT 10KHz
TEMPERATURE RANGE: -40°C TO 125°C
DESCRIPTION
The LD3985 provides up to 150mA, from 2.5V to
6V input voltage.
Flip-Chip
(1.57x1.22)
SOT23-5L
TSOT23-5L
The ultra low drop-voltage, low quiescent current
and low noise make it suitable for low power
applications and in battery powered systems.
Regulator ground current increases only slightly in
dropout, further prolonging the battery life. Power
supply rejection is better than 60 dB at low
frequencies and starts to roll off at 10KHz. High
power supply rejection is maintained down to low
input voltage levels common to battery operated
circuits. Shutdown Logic Control function is
available, this means that when the device is used
as local regulator, it is possible to put a part of the
board in standby, decreasing the total power
consumption. The LD3985 is designed to work
with low ESR ceramic capacitors. Typical
applications are in mobile phone and similar
battery powered wireless systems.
Figure 1: Schematic Diagram
October 2004
Rev. 8
1/14
LD3985 SERIES
Table 1: Absolute Maximum Ratings
Symbol
Parameter
VI
DC Input Voltage
VO
DC Output Voltage
VINH
INHIBIT Input Voltage
Value
Unit
-0.3 to 6 (*)
V
-0.3 to VI+0.3
V
V
IO
Output Current
-0.3 to VI+0.3
Internally limited
PD
Power Dissipation
Internally limited
TSTG
Storage Temperature Range
-65 to 150
°C
TOP
Operating Junction Temperature Range
-40 to 125
°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is
not implied.
(*) The input pin is able to withstand non repetitive spike of 6.5V for 200ms.
Table 2: Thermal Data
Symbol
Parameter
Rthj-case Thermal Resistance Junction-case
Rthj-amb
Thermal Resistance Junction-ambient
SOT23-5L/
TSOT23-5L
Flip-Chip
81
255
Unit
°C/W
170
°C/W
Table 3: Order Codes
SOT23-5L
TSOT23-5L
Flip-Chip
OUTPUT VOLTAGES
LD3985M12R (*)
LD3985M122R
LD3985M125R (*)
LD3985M135R (*)
LD3985M15R
LD3985M18R
LD3985M20R (*)
LD3985M21R (*)
LD3985M22R (*)
LD3985M24R (*)
LD3985M25R
LD3985M26R (*)
LD3985M27R
LD3985M28R (*)
LD3985M285R (*)
LD3985M29R
LD3985M30R (*)
LD3985M31R (*)
LD3985M32R (*)
LD3985M33R
LD3985M44R (*)
LD3985M47R
LD3985M48R (*)
LD3985M49R (*)
LD3985M50R (*)
LD3985G12R (*)
LD3985G122R (*)
LD3985G125R (*)
LD3985G135R (*)
LD3985G15R (*)
LD3985G18R
LD3985G20R (*)
LD3985G21R (*)
LD3985G22R (*)
LD3985G24R (*)
LD3985G25R
LD3985G26R (*)
LD3985G27R
LD3985G28R (*)
LD3985G285R (*)
LD3985G29R
LD3985G30R (*)
LD3985G31R (*)
LD3985G32R (*)
LD3985G33R (*)
LD3985G44R (*)
LD3985G47R (*)
LD3985G48R (*)
LD3985G49R (*)
LD3985G50R (*)
LD3985J12R (*)
LD3985J122R
LD3985J125R
LD3985J135R
LD3985J15R (*)
LD3985J18R
LD3985J20R (*)
LD3985J21R (*)
LD3985J22R (*)
LD3985J24R
LD3985J25R
LD3985J26R
LD3985J27R
LD3985J28R
LD3985J285R (*)
LD3985J29R
LD3985J30R
LD3985J31R
LD3985J32R (*)
LD3985J33R
LD3985J44R (*)
LD3985J47R
LD3985J48R
LD3985J49R (*)
LD3985J50R (*)
1.20 V
1.22 V
1.25 V
1.35 V
1.5 V
1.8 V
2.0 V
2.1 V
2.2 V
2.4 V
2.5 V
2.6 V
2.7 V
2.8 V
2.85 V
2.9 V
3.0 V
3.1 V
3.2 V
3.3 V
4.4 V
4.7 V
4.8 V
4.9 V
5.0 V
(*) Available on request.
2/14
LD3985 SERIES
Figure 2: Connection Diagram (top view for SOT and TSOT, top through view for Flip-Chip)
TSOT23-5L/SOT23-5L
Flip-Chip
Table 4: Pin Description
Pin N°
SOT23-5L/
TSOT23-5L
Pin N°
Flip-Chip
1
4
VI
2
3
2
1
GND
VINH
4
5
BYPASS
5
3
VO
Symbol
Name and Function
Input Voltage of the LDO
Common Ground
Inhibit Input Voltage: ON MODE when VINH ≥ 1.2V, OFF MODE when VINH ≤
0.4V (Do not leave floating, not internally pulled down/up)
Bypass Pin: Connect an external capacitor (usually 10nF) to minimize noise
voltage
Output Voltage of the LDO
Figure 3: Typical Application Circuit
3/14
LD3985 SERIES
Table 5: Electrical Characteristics For LD3985 (Tj = 25°C, VI = VO(NOM) +0.5V, CI = 1µF,
CBYP = 10nF, IO = 1mA, VINH = 1.4V, unless otherwise specified)
Symbol
Parameter
VI
Operating Input Voltage
VO
Output Voltage < 2.5V
VO
∆VO
Output Voltage ≥ 2.5V
Line Regulation (Note 1)
Test Conditions
Min.
Typ.
Max.
Unit
2.5
6
V
IO = 1 mA
-50
50
mV
TJ= -40 to 125°C
-75
75
IO = 1 mA
-2
2
TJ= -40 to 125°C
-3
3
% of
VO(NOM)
%/V
VI = VO(NOM) + 0.5 to 6 VTJ= -40 to 125°C
-0.1
0.1
VO = 4.7 to 5V
-0.19
0.19
∆VO
Load Regulation
IO = 1 mA to 150mA
TJ= -40 to 125°C
VO < 2.5V
0.002
0.008
%/mA
∆VO
Load Regulation
IO = 1 mA to 150mA
VO ≥ 2.5V
TJ= -40 to 125°C (for Flip-Chip)
0.0004
0.002
%/mA
IO = 1 mA to 150mA, TJ= -40 to 125°C
(for SOT23-5L/TSOT23-5L), VO ≥ 2.5V
0.0025
0.005
∆VO
IQ
Output AC Line Regulation VI = VO(NOM) + 1 V, IO = 150mA,
tR= tF = 30µs
Quiescent Current
ON MODE: VINH = 1.2V
IO = 0
IO = 0
mVPP
85
µA
TJ= -40 to 125°C
150
IO = 0 to 150mA
IO = 0 to 150mA
1.5
170
TJ= -40 to 125°C
250
OFF MODE: VINH = 0.4V
0.003
TJ= -40 to 125°C
VDROP
Dropout Voltage (NOTE 1) IO = 1mA
IO = 1mA
1.5
0.4
TJ= -40 to 125°C
2
IO = 50mA
IO = 50mA
20
TJ= -40 to 125°C
35
IO = 100mA
IO = 100mA
45
TJ= -40 to 125°C
70
IO = 150mA
IO = 150mA
mV
60
TJ= -40 to 125°C
100
Short Circuit Current
RL = 0
600
mA
SVR
Supply Voltage Rejection
VI = VO(NOM)+0.25V ±
f = 1KHz
VRIPPLE = 0.1V, IO= 50mA f = 10KHz
VO(NOM) < 2.5V,
VI = 2.55V
60
50
dB
IO(PK)
Peak Output Current
VO ≥ VO(NOM) - 5%
550
mA
VINH
VI = 2.5V to 6V
125°C
IINH
Inhibit Input Logic Low
Inhibit Input Logic High
Inhibit Input Current
eN
Output Noise Voltage
BW = 10 Hz to 100 KHz
tON
Turn On Time (Note 4)
CBYP = 10 nF
100
Thermal Shutdown
Note 5
160
ISC
TSHDN
4/14
VINH = 0.4V
300
TJ= -40 to
0.4
V
1.2
VI = 6V
CO = 1 µF
±1
nA
µVRMS
30
250
µs
°C
LD3985 SERIES
Symbol
CO
Parameter
Output Capacitor
Test Conditions
Capacitance (Note 6)
ESR
Min.
1
5
Typ.
Max.
Unit
22
5000
µF
mΩ
Note 1 – For VO(NOM) < 2V, VI = 2.5V
Note 2 – For VO(NOM) = 1.25V, VI = 2.5V
Note 3 – Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value. This specification does not apply for input voltages below 2.5V.
Note 4 – Turn-on time is time measured between the enable input just exceeding VINH High Value and the output voltage just reaching 95%
of its nominal value
Note 5 – Typical thermal protection hysteresis is 20°C
Note 6 - The minimum capacitor value is 1µF, anyway the LD3985 is still stable if the compensation capacitor has a 30% tolerance in all
temperature range.
TYPICAL PERFORMANCE CHARACTERISTICS (Tj = 25°C, VI = VO(NOM) +0.5V, CI = CO = 1µF,
CBYP = 10nF, IO = 1mA, VINH = 1.4V, unless otherwise specified)
Figure 4: Output Voltage vs Temperature
Figure 6: Output Voltage vs Temperature
Figure 5: Output Voltage vs Temperature
Figure 7: Shutdown Voltage vs Temperature
5/14
LD3985 SERIES
Figure 8: Shutdown Voltage vs Temperature
Figure 11: Line Regulation vs Temperature
Figure 9: Line Regulation vs Temperature
Figure 12: Load Regulation vs Temperature
Figure 10: Line Regulation vs Temperature
Figure 13: Load Regulation vs Temperature
6/14
LD3985 SERIES
Figure 14: Load Regulation vs Temperature
Figure 17: Quiescent Current vs Temperature
Figure 15: Quiescent Current vs Temperature
Figure 18: Supply Voltage Rejection vs
Frequency
Figure 16: Quiescent Current vs Temperature
Figure 19: Load Transient Response
VI = 3.2V, IO = 1 to 150mA, Rise-Fall time = 1µsec
7/14
LD3985 SERIES
Figure 20: Line Transient Response
Figure 22: TURN-OFF
VI = 3.8V to 4.4V, TJ = 25°C, IO = 150mA, CI = CO = 1µF (X7R),
CBYP = 10nF, Rise-Fall time = 1µsec, VO = 2.7V
VI = 3.3V, IO = 1mA, CI = CO = 1µF (cer), CBYP = 10nF, Tf = 20ns,
VO = 2.8V
Figure 21: START-UP
VI = 3.3V, IO = 1mA, CI = CO = 1µF (cer), CBYP = 10nF, Tr = 20ns,
VO = 2.8V
8/14
LD3985 SERIES
SOT23-5L MECHANICAL DATA
mm.
mils
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
0.90
1.45
35.4
57.1
A1
0.00
0.10
0.0
3.9
A2
0.90
1.30
35.4
51.2
b
0.35
0.50
13.7
19.7
C
0.09
0.20
3.5
7.8
D
2.80
3.00
110.2
118.1
E
1.50
1.75
59.0
68.8
e
0.95
37.4
H
2.60
3.00
102.3
118.1
L
0.10
0.60
3.9
23.6
.
7049676C
9/14
LD3985 SERIES
TSOT23-5L MECHANICAL DATA
mm.
mils
DIM.
MIN.
TYP
A
MAX.
MIN.
TYP.
MAX.
1.1
43.3
3.9
A1
0
0.1
A2
0.7
1.0
27.6
39.4
b
0.3
0.5
11.8
19.7
C
0.08
0.2
3.1
7.9
D
2.9
114.2
E
2.8
110.2
E1
1.6
63.0
e
0.95
37.4
e1
1.9
74.8
L
0.3
0.6
11.8
23.6
7282780B
10/14
LD3985 SERIES
Flip-Chip5 MECHANICAL DATA
mm.
mils
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
0.835
0.9
0.965
32.874
35.433
37.992
A1
0.21
0.25
0.29
8.268
9.843
11.417
A2
0.625
0.65
0.675
24.606
25.591
26.575
b
0.265
0.315
0.365
10.433
12.402
14.370
D
1.510
1.540
1.570
59.449
60.630
61.811
E
1.16
1.19
1.22
45.669
46.850
48.031
e
0.45
0.5
0.55
17.717
19.685
21.654
e1
0.816
0.866
0.916
32.126
34.094
36.063
f
0.345
13.583
f1
0.337
13.268
11/14
LD3985 SERIES
Tape & Reel SOT23-xL MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MIN.
TYP.
180
13.0
13.2
MAX.
7.086
C
12.8
D
20.2
0.795
N
60
2.362
T
12/14
MAX.
0.504
0.512
14.4
0.519
0.567
Ao
3.13
3.23
3.33
0.123
0.127
0.131
Bo
3.07
3.17
3.27
0.120
0.124
0.128
Ko
1.27
1.37
1.47
0.050
0.054
0.0.58
Po
3.9
4.0
4.1
0.153
0.157
0.161
P
3.9
4.0
4.1
0.153
0.157
0.161
LD3985 SERIES
Table 6: Revision History
Date
Revision
Description of Changes
07-May-2004
6
05-Oct-2004
7
Part Number Status Changed on Table 3.
tON values are Changed on Table 5.
27-Oct-2004
8
Order Codes changed - Table 3.
13/14
LD3985 SERIES
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