ONSEMI NCP1835MN20R2

NCP1835
Integrated Li−Ion Charger
NCP1835 is an integrated linear charger specifically designed to
charge 1−cell Li−Ion batteries with a constant current, constant
voltage (CCCV) profile. It can charge at currents of up to 1.0 A.
Its low input voltage capability, adjustable charge current, ability
to maintain regulation without a battery, and its onboard thermal
foldback make it versatile enough to charge from a variety of wall
adapters. The NCP1835 can charge from a standard voltage−source
wall adapter as a CCCV charger, or from a current limited adapter to
limit power dissipation in the pass device.
http://onsemi.com
MARKING
DIAGRAMS
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Integrated Voltage and Current Regulation
No External MOSFET, Sense Resistor or Blocking Diode Required
Charge Current Thermal Foldback
Integrated Pre−charge Current for Conditioning Deeply Discharged
Battery
Integrated End−of−Charge (EOC) Detection
1% Voltage Regulation
4.2 V or 4.242 V Regulated Output Voltage
Regulation Maintained without a Battery Present
Programmable Full Charge Current 300 − 1000 mA
Open−Drain Charger Status and Fault Alert Flags
2.8 V Output for AC Present Indication and Powering Charging
Subsystems
Minimum Input Voltage of 2.4 V Allows Use of Current Limited
Adapters
Automatically Recharging if Battery Voltage Drops after Charging
Cycle is Completed
Low Profile 3x3 mm DFN Package
Pb−Free Packages are Available
DFN 3x3
MN SUFFIX
CASE 485C
1
1835
4200
ALYWG
G
1
1835
4242
ALYWG
G
1835 = Device Code
4200 = 4.2 V
4242 = 4.242 V
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
Typical Applications
•
•
•
•
PIN CONNECTIONS
Cellular Phones
PDAs, MP3 Players
Stand−Alone Chargers
Battery Operated Devices
VCC
1
10 BAT
FAULT
2
9
VSNS
CFLG
3
8
ISEL
TIMER
4
7
V2P8
GND
5
6
EN
DFN 3x3
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 15 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
May, 2006 − Rev. 4
1
Publication Order Number:
NCP1835/D
NCP1835
Vin
CFLG
EN
Microprocessor
FAULT
Vin
4.7 mF
Cin
VCC
NCP1835
V2P8
VSNS
ISEL TIMER
80 k
RISEL
BAT
GND
0.1 mF
C2p8
15 nF
CT
4.7 mF
Cout
GND
Figure 1. Typical Application Circuit
PIN FUNCTION DESCRIPTION
Pin
Symbol
Description
1
VCC
Input Supply Voltage. Provides power to the charger. This pin should be bypassed with at least a 4.7 mF ceramic
capacitor to ground.
2
FAULT
An open−drain output indicating fault status. This pin is pulled LOW under any fault conditions. A FAULT condition
resets the counter.
3
CFLG
An open−drain output indicating charging or end−of−charge states. The CFLG pin is pulled LOW when the
charger is charging a battery. It is forced open when the charge current drops to IEOC. This high impedance mode
will be latched until a recharge cycle or a new charge cycle starts.
4
TIMER
Connecting a timing capacitor, CTIME between this pin and ground to set end−of−charge timeout timer.
TIMEOUT = 14*CTIME/1.0 nF (minute). The total charge for CC and CV mode is limited to the length of
TIMEOUT. Trickle Charge has a time limit of 1/8 of the TIMEOUT period.
5
GND
6
EN
7
V2P8
2.8 V reference voltage output. This pin outputs a 2.8 V voltage source when an adapter is present. The
maximum loading for this pin is 2.0 mA.
8
ISEL
The full charge current (IFCHG) can be set by connecting a resistor, RISEL, from the ISEL pin to ground.
IFCHG = (0.8*105 / RISEL) A, the pre−charge current IPC = (0.1*IFCHG) A and the end−of−charge threshold current
IEOC = (0.1*IFCHG) A. For best accuracy, a resistor with 1% tolerance is recommended.
9
VSNS
Battery voltage sense pin. Connect this as close as possible to the battery input connection.
10
BAT
Ground pin of the IC. For thermal consideration, it is recommended to solder the exposed metal pad on the
backside of the package to ground.
Enable logic input. Connect the EN pin to LOW to disable the charger or leave it floating to enable the charger.
Charge current output. A minimum 4.7 mF capacitor is needed for stability when the battery is not attached.
http://onsemi.com
2
NCP1835
VCC
BAT
Startup,
Control
& Clamp
V2P8
Temp
ISEL
IREF
V2P8
CC
Control
VCC
Resistor Bias Circuits
Dividers
Vbat
Resistor
Dividers
CV
VSNS
VREF
VREF
Recharge
Comp
CFLG
VREF
LOGIC
Precharge
Comp
FAULT
VREF
TIMER
Timer
Comp
Chip
Enable
EN
VREF
TIMER
GND
Figure 2. Detailed Block Diagram
MAXIMUM RATINGS
Rating
Supply Voltage
Symbol
Value
Unit
VCC
7.0
V
VFAULT, VCFLG
7.0
V
Voltage Range for Other Pins
Vio
5.5
V
Current Out from BAT Pin
IO
1.2
A
Thermal Characteristics
Thermal Resistance, Junction−to−Air (Note 3)
Power Dissipation, TA = 25°C (Note 3)
RqJA
PD
68.5
1.09
°C/W
W
Moisture Sensitivity (Note 4)
MSL
Level 1
Operating Ambient Temperature
TA
−20 to 70
°C
Storage Temperature
Tstg
−55 to 125
°C
ESD
Human Body Model
Machine Model
HBM
MM
2000
200
V
V
Status Flag Output Pins
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and is tested per the following standards:
Human Body Model (HBM) per JEDEC standard: JESD22−A114.
Machine Model (MM) per JEDEC standard: JESD22−A115.
2. Latchup Current Maximum Rating: 150 mA per JEDEC standard: JESD78.
3. Measure on 1 inch sq. of 1 oz. copper area. RqJA is highly dependent on the PCB heatsink area. For example, RqJA can be 38°C/W on 1 inch
sq. of 1 oz. copper area on 4 layer PCB that has 1 single signal layer with the additional 3 solid ground or power planes. The maximum package
power dissipation limit must not be exceeded:
PD +
TJ(max) * TA
RqJA
with RqJA = 68.5°C/W, TJ(max) = 100°C, PD = 1.09 W.
4. Moisture Sensitivity Level per IPC/JEDEC standard: J−STD−020A.
http://onsemi.com
3
NCP1835
ELECTRICAL CHARACTERISTICS (Typical values are tested at VCC = 5.0 V and room temperature, maximum and minimum values
are guaranteed over 0°C to 70°C with a supply voltage in the range of 4.3 V to 6.5 V, unless otherwise noted.)
Symbol
Min
Typ
Max
Unit
VCC
2.8
−
6.5
V
Rising VCC Threshold
VRISE
3.0
3.4
3.95
V
Falling VCC Lockout Threshold
VFALL
2.0
2.4
2.8
V
Quiescent VCC Pin Supply Current
Shutdown (EN = Low)
Normal Operation (EN = High)
IVCC
IVCC
−
−
30
1.0
−
−
mA
mA
IBMS
−
−
3.0
mA
4.158
4.200
4.200
4.242
4.242
4.284
Characteristic
VCC SUPPLY
Operating Supply Range
Battery Drain Current
Manual Shutdown (VCC = 5.0 V, VSNS = 4.0 V, EN = Low)
CHARGING PERFORMANCE
VREG
Regulated Output Voltage in Constant Voltage (CV) Mode
4.2 V Version, ICHG = 10 mA
4.242 V Version, ICHG = 10 mA
Dropout Voltage (VBAT = 3.7 V, ICHG = 0.5 A)
V
−
−
200
300
mV
Pre−Charge Threshold Voltage
VPC
2.52
2.8
3.08
V
Pre−Charge Current (RISEL = 80 kW, VBAT = 2.0 V)
IPC
78
100
122
mA
Recommended Full Charge Current
IFCHG
300
−
1000
mA
Full−Charge Current in Constant Current (CC) Mode (RISEL = 80 kW, VBAT = 3.7 V)
IFCHG
0.9
1.0
1.1
A
End−of−Charge Threshold (RISEL = 80 kW, VBAT = VREG)
IEOC
78
100
122
mA
VRECH
3.9
4.03
4.155
V
TLIM
−
100
−
°C
TOSC
2.4
3.0
3.6
ms
CFLG Pin Recommended Maximum Operating Voltage
VCFLG
−
−
6.5
V
FAULT Pin Recommended Maximum Operating Voltage
VFAULT
−
−
6.5
V
CFLG Pin Sink Current (VCFLG = 0.8 V)
ICFLG
5.0
−
−
mA
FAULT Pin Sink Current (VFAULT = 0.8 V)
IFAULT
5.0
−
−
mA
Recharge Voltage Threshold
Thermal Foldback Limit (Junction Temperature) (Note 5)
OSCILLATOR
Oscillation Period (CTIME = 15 nF)
STATUS FLAGS
5. Guaranteed by design. Not tested in production.
http://onsemi.com
4
NCP1835
4.30
VREG, REGULATED OUTPUT VOLTAGE (V)
VREG, REGULATED OUTPUT VOLTAGE (V)
TYPICAL OPERATING CHARACTERISTICS
4.242 V
4.25
4.20
4.2 V
4.15
4.10
VCC = 5 V
RISEL = 80 k
4.05
4.00
0
0.2
0.4
0.6
0.8
1
4.30
4.242 V
4.25
4.20
4.2 V
4.15
4.10
4.05
RISEL = 80 k
4.00
4.5
5
ICHG, CHARGE CURRENT (A)
Figure 3. Regulated Output Voltage vs. Charge
Current
6
6.5
Figure 4. Regulated Output Voltage (floating) vs.
Input Voltage
0.80
4.30
4.242 V
VISEL, ISEL VOLTAGE (V)
4.25
4.20
4.2 V
4.15
4.10
4.05
4.00
−50
VCC = 5 V
VBAT floating
−25
0
25
50
75
100
0.78
4.242 V
0.76
0.74
0.72
4.2 V
VBAT = 3.7 V
RISEL = 80 k
0.70
4.5
125
5.0
TA, AMBIENT TEMPERATURE (°C)
5.5
Figure 6. ISEL Voltage vs. Input Voltage
3.00
2.95
VBAT floating
RISEL = 80 k
IV2P8 = 0
4.242 V
2.90
2.85
4.2 V
2.80
2.75
2.70
4.5
6.0
VCC, INPUT VOLTAGE (V)
Figure 5. Regulated Output Voltage vs.
Temperature
V2P8, V2P8 VOLTAGE (V)
VREG, REGULATED OUTPUT VOLTAGE (V)
5.5
VCC, INPUT VOLTAGE (V)
5.0
5.5
6.0
VCC, INPUT VOLTAGE (V)
Figure 7. V2P8 Voltage vs. Input Voltage
http://onsemi.com
5
6.5
6.5
NCP1835
TYPICAL OPERATING CHARACTERISTICS
IPC, TRICKLE CHARGE CURRENT (mA)
V2P8, V2P8 VOLTAGE (V)
3.0
2.5
2.0
1.5
1.0
VBAT = 3.7 V
RISEL = 80 k
0.5
0.0
3.7
3.9
4.1
4.3
4.5
4.7
4.9
5.1
5.3
5.5
120
110
100
90
VBAT = 2.0 V
RISEL = 80 k
80
4.5
5.0
VCC, INPUT VOLTAGE (V)
IFCHG, FULL CHARGE CURRENT (mA)
IPC, TRICKLE CHARGE CURRENT (mA)
110
100
90
80
VCC = 5 V
VBAT = 2.0 V
−25
0
25
50
75
100
1200
1100
1000
900
VBAT = 3.7 V
RISEL = 80 k
800
4.5
125
TA, AMBIENT TEMPERATURE (°C)
5.0
5.5
6.0
6.5
VCC, INPUT VOLTAGE (V)
Figure 10. Trickle Charge Current vs. Temperature
Figure 11. Full Charge Current vs. Input Voltage
4.10
1000
ICHG, CHARGE CURRENT (mA)
VRECH, RECHARGE VOLTAGE (V)
6.5
Figure 9. Trickle Charge Current vs. Input Voltage
120
60
−50
6.0
VCC, INPUT VOLTAGE (V)
Figure 8. V2P8 Voltage vs. Input Voltage
70
5.5
4.05
4.00
3.95
RISEL = 80 k
3.90
4.5
5.0
5.5
6.0
4.2 V
800
600
400
200
VCC = 5 V
0
2.5
6.5
4.242 V
VCC, INPUT VOLTAGE (V)
3.0
3.5
4.0
VBAT, BATTERY VOLTAGE (V)
Figure 13. Charge Current vs. Battery Voltage
Figure 12. Recharge Voltage vs. Input Voltage
http://onsemi.com
6
4.5
NCP1835
DETAILED OPERATING DESCRIPTION
Overview
recognizes the battery as severely discharged. In this state,
the NCP1835 pre−conditions (trickle charges) the battery
by charging it at 10% of the full charge rate (IPC). This slow
charge prevents the battery from being damaged from high
fast charge currents when it is in a deeply discharged state.
The battery voltage should be trickle charged up to 2.8 V
before 1/8 of the preset end−of−charge time is expired. If
it cannot reach this voltage, than the battery is possibly
shorted or damaged. Therefore, the NCP1835 stops
charging and the pre−charge timeout signal asserts the
FAULT flag.
Once the cell voltage crosses the pre−charge threshold,
the device will transition to normal (full−rate) charging at
100% of the programmed full rate charge current (IFCHG).
As the NCP1835 charges the battery, the cell voltage rises
until it reaches the VREG threshold, (4.2 or 4.242 V). At the
maximum charge rate, it normally takes about 1 hour to
reach this point from a fully discharged state, and the
battery will be approximately 70−80% recharged. At this
point, the charge transitions to constant voltage mode
where the IC forces the battery to remain at a constant
voltage, VREG. During this constant voltage state, the
current required to maintain VREG steadily decreases as the
battery approaches full charge. Charge current eventually
falls to a very low value as the battery approaches a fully
charged condition.
The NCP1835 monitors the current into the battery until
it drops to 10% of the full charge rate. This is the
End−of−Charge (EOC) threshold. Normally it takes
1.5−2.5 hours to reach this point. Once the NCP1835
reaches end−of−charge it opens the CFLG pin and enters
the EOC state. The IC continues to charge the battery until
it reaches TIMEOUT. At that point, the NCP1835 stops
charging. If the system does not reach EOC during the
TIMEOUT period, the NCP1835 views this as a system
fault and asserts the FAULT flag. If the battery voltage
drops below the recharge threshold (which can occur if the
battery is loaded), the IC reinitializes the charging
sequence and begins a new charge cycle. The recharge
voltage threshold, VRECH, is nominally 4.03 V.
In the inhibit state, the NCP1835 continues to monitor
the battery voltage, but does not charge the battery. Again,
if the battery voltage drops below the recharge threshold
the IC reinitializes the charging sequence and begins a new
charge cycle.
Rechargeable Li−Ion/Polymer batteries are normally
charged with a constant current (CC) until the terminal
voltage reaches a fixed voltage threshold, at which point a
constant voltage (CV) is applied and the current drawn by
the battery decays. The charging rate is determined by the
specific rating of the battery. For example, if the battery is
rated at 800 mA−hours, then the recommended maximum
charge rate is 800 mA. For a severely discharged cell, it
takes approximately 2.5−3.5 hours to recharge the battery
at the maximum rate. So, when one charges at less than the
maximum charge rate, the recharge time increases. Also,
the battery should not be continuously charged or the
battery could age faster than necessary. Because of this,
Li−Ion charging systems need to stop charging within a
prescribed time limit regardless of the charge rate.
The NCP1835 is a fully integrated, stand−alone 1−cell
Li−Ion charger which performs the primary battery
charging functions and includes a timer which will
terminate charging if the battery has not completed
charging within a prescribed time period. The charging rate
is user programmable up to 1.0 A and the end−of−charge
timer is also programmable. The NCP1835 has a thermal
foldback loop which reduces the charge rate if the junction
temperature is exceeded. The device also includes several
outputs which can be used to drive LED indicators or
interface to a microprocessor to provide status information.
The adapter providing power to the charger can be a
standard fixed output voltage such as a 5.0 V wall adapter
or it can be a simple current limited adapter.
The NCP1835 comes in two versions with output voltage
regulation thresholds of 4.2 or 4.242 V depending on the
requirements of the specific battery pack being used. The
user determines the charge current by selecting the resistor
RISEL and determines the length of the end−of−charge
timeout timer by selecting the capacitor, CTIME.
Charging Operation
Figure 13 outlines the charging algorithm of the
NCP1835 and Figure 14 graphically illustrates this. When
the charger is powered up and the input voltage rises above
the power−on, rising threshold (nominally 3.4 V), the
charger initiates the charging cycle.
The NCP1835 first determines the cell voltage. If it is
less than the pre−charge threshold (2.8 V), the IC
http://onsemi.com
7
NCP1835
Charging Flow Chart
Power Up
VCC > VPOR?
N
Y
POR
Initialization
Reset Counter
CC
Charge
Trickle
Charge
CV
Charge
VSNS ≥ VREG?
VSNS > VPC?
Ich < IEOC?
Y
Y
Y
N
N
N
N
N
TIMEOUT?
N
TIMEOUT?
1/8 TIMEOUT?
Y
Constant
Current
Charge
Y
Trickle
Charge
Constant
Voltage
Charge
EOC Indication;
Set CFLG High
Keep FAULT High
Y
Charger Inhibited
Reset Counter
Set FAULT Low
Latch Up Charger
Y
VSNS < VRECH?
VSNS
<
VRECH?
N
N
EN Toggled?
Y
TIMEOUT?
Y
Y
End−of−Charge
or FAULT
Start Recharge
N
Inhibit
Figure 14. Charging Flow Chart
http://onsemi.com
8
N
NCP1835
Trickle
Charge
CC
Charge
CV
Charge
End of
Charge Inhibit
Recharging
Vin
VRISE
Time
VREG
VBAT
VREG
VRECH
VPC
Time
ICHG
Icharge
ICHG
IEOC
IPC
Time
CFLG
Time
FAULT
Time
2.8 V
V2P8
Time
0
Figure 15. Typical Charging Diagram
Table 1. Charge Status
Condition
CFLG
FAULT
Trickle, Constant Current and Constant Voltage Charge
Low
High
End−of−Charge or Shutdown Mode
High
High
Timeout Fault, VISEL < 0.35 V or VISEL > 1.4 V
High
Low
http://onsemi.com
9
NCP1835
Charge Status Indicator (CFLG)
Enable/Disable (EN)
CFLG is an open−drain output that indicates battery
charging or End−of−Charge (EOC) status. It is pulled low
when charging in constant current mode and constant
voltage mode. It will be forced to a high impedance state
when the charge current drops to IEOC. When the charger
is in shutdown mode, CFLG will also stay in the high
impedance state.
Pulling the EN pin to GND disables the NCP1835. In
shutdown mode, the internal reference, oscillator, and
control circuits are all turned off. This reduces the battery
drain current to less than 3.0 mA and the input supply
current to 30 mA. Floating the EN pin enables the charger.
Thermal Foldback
An internal thermal foldback loop reduces the
programmed charge current proportionally if the die
temperature rises above the preset thermal limit (nominally
100°C). This feature provides the charger protection from
over heating or thermal damage. Figure 16 shows the full
charge current reduction due to die temperature increase
across the thermal foldback limit. For a charger with a
1.0 A constant charge current, the charge current starts
decreasing when the die temperature hits 100°C and is
reduced to zero when the die temperature rises to 110°C.
Fault Indicator (FAULT)
ICHG, CHARGE CURRENT
FAULT is an open−drain output that indicates that a
charge fault has occurred. It has two states: low or high
impedance. In a normal charge cycle, it stays in a high
impedance state. At fault conditions, it will be pulled low
and terminate the charge cycle. A timeout fault occurs
when the full charge or pre−charge timeouts are violated,
or if the voltage on ISEL is greater than 1.4 V or lower than
0.35 V. There are two ways to get the charger out of a fault
condition and back to a normal charge cycle. One can either
toggle the EN pin from GND to a floating state or reset the
input power supply.
Adapter Present Indicator (V2P8)
V2P8 is an input power supply presence indicator. When
the input voltage, VCC, is above the power on threshold
(VRISE, nominally 3.4 V) and is also 100 mV above the
battery voltage, it provides a 2.8 V reference voltage that
can source up to 2.0 mA. This voltage can also be used to
power a microprocessor I/O.
IFCHG
X−100 mA/C
100°C
TJ, JUNCTION TEMPERATURE
Figure 16. Full Charge Current vs. Junction
Temperature
http://onsemi.com
10
NCP1835
APPLICATION INFORMATION
0.18
Input and Output Capacitor Selection
A 4.7 mF or higher value ceramic capacitor is
recommended for the input bypass capacitor. For the output
capacitor, when there is no battery inserted and the
NCP1835 is used as an LDO with 4.2 V or 4.242 V output
voltage, a 4.7 mF or higher value tantalum capacitor is
recommended for stability. With the battery attached, the
output capacitor can be any type with the value higher than
0.1 mF.
0.16
0.14
IPCHG (A)
0.12
0.04
0.02
A single resistor, RISEL, between the ISEL pin and
ground programs the pre−charge current, full charge
current, and end−of−charge detection threshold. The
nominal voltage of ISEL is 0.8 V. The charge current out
of BAT pin is 100,000 times the current out of ISEL pin.
Therefore, the full charge current (IFCHG) is:
0.8 (A)
RISEL
0.00
80
300
30
267
500
50
160
600
60
133.3
700
70
114.3
800
80
100
900
90
88.9
1000
100
80
TOSC + 2
180
200
CTIME dVc
+ 0.2
IC
10 6
CTIME (sec)
(eq. 2)
A 22−binary counter counts every oscillator period until
it reaches the maximum number corresponding to
end−of−charge time, TIMEOUT.
TIMEOUT + 2 22
TOSC + 14
CTIME
(minute)
1 nF
(eq. 3)
1.4
The NCP1835 will terminate charging and give a timeout
signal if the battery has not completed charging within the
TIMEOUT period. The timeout signal then forces the
FAULT pin low.
1.2
IFCHG (A)
160
The NCP1835 offers an end−of−charge timeout timer to
prevent the battery from continuously charging which can
cause premature aging or safety issues. The timing
capacitor between TIMER pin and ground, CTIME, sets the
end−of−charge time, TIMEOUT, and the pre−charge
timeout. This capacitor is required for proper device
operation.
The internal oscillator charges CTIME to 1.2 V and then
discharges it to 0.6 V with 6 mA current in one period.
Therefore, the period of the oscillator is:
1.6
1.0
0.8
0.6
0.4
0.2
0.0
80
140
CTIME Selection for Programming Charge Time
Table 2. Charge Current vs. RISEL
RISEL (kW)
120
Figure 18. Pre−Charge Current (IPCHG) vs.
Current Select Resistor (RISEL)
IPC and IEOC are 10% of the value programmed above
with the RISEL resistor.
The following table and curves show the selection of the
resistance value for desired currents.
IPC / IEOC (mA)
100
RISEL (kW)
(eq. 1)
IFCHG (mA)
0.08
0.06
RISEL Resistor Selection for Programming Charge
Current
IFCHG + 100, 000
0.10
100
120
140
160
180
200
RISEL (kW)
Figure 17. Full−Charge Current (IFCHG) vs.
Current Select Resistor (RISEL)
http://onsemi.com
11
NCP1835
The following Table 3 shows the desired TIMEOUT vs.
CTIME sizes. The CTIME is required for proper device
operation.
the linear charger powered with a standard constant voltage
adapter. The power dissipation in the linear charger is:
Table 3. TIMEOUT vs. CTIME Size
The maximum power dissipation P1 happens at the
beginning of a full current charge, since this is the point that
the power supply and the battery voltage have the largest
difference. As the battery voltage rises during charging, the
power dissipation drops. After entering the constant
voltage mode, the power dissipation drops further due to
the decreasing charge current. The maximum power that
the linear charger can dissipate is dependent on the thermal
resistance of the device. In case the device can not handle
the maximum power P1, the thermal foldback loop reduces
the charge current which limits the power dissipation to the
sustained level P2. Figure 19 shows this.
Using the adapter’s current limit can provide better
thermal performance than the above example. A current
limited adapter operates as a constant voltage adapter
before the charge current reaches the current limit. ILIM
must be less than the programmed full charge current
IFCHG. Once the current limit is reached, the adapter will
source the current limit ILIM while its output voltage will
drop to follow the battery voltage. If the application uses
the adapter to power its systems while the battery is being
charged, this drooping voltage can be an issue.
The worst case power dissipation with a current limited
adapter occurs at the beginning of the constant voltage
mode, which is shown at point P3 in Figure 20. If P3 is
higher than P2, the maximum power dissipation that the
charger can handle, then the thermal foldback function will
be activated.
CTIME (nF)
TIMEOUT (minute)
0.47
6.6
1
14
5.6
78
8.2
115
10
140
15
210
33
462
56
784
Pdis + (VCC * VBAT)
Thermal Considerations
The NCP1835 is housed in a thermally enhanced
3x3 mm DFN package. In order to deliver the maximum
power dissipation under all conditions, it is very important
that the user solders exposed metal pad under the package
to the ground copper area and then connect this area to a
ground plane through thermal vias. This can greatly reduce
the thermal impedance of the device and further enhance
its power dissipation capability and thus its output current
capability.
Charging with Constant Voltage Adapters or Current
Limited Adapters
The NCP1835 can be powered from two types of
regulated adapters: a traditional constant voltage type or a
current limited type. Figure 19 illustrates the operation of
Trickle
Charge
CC
Charge
CV
Charge
Trickle
Charge
Inhibit
CC
Charge
CV
Charge
ICHG
(eq. 4)
Inhibit
Vin
Vin
VREG
VBAT
Time
VREG
VBAT
VPC
VPC
Time
Icharge
Time
Time
Icharge
IFCHG
IFCHG
ILIM
IPC
IPC
Pdis
Time
P2
0
Time
Pdis
P1
P3
Time
0
Figure 19. Typical Charge Curves with a Constant
Voltage Adapter
Time
Figure 20. Typical Charge Curves with a Current
Limited Adapter
http://onsemi.com
12
NCP1835
PCB Layout Recommendations
The recommended footprint for the 3x3 mm DFN
package is included on the Package Dimension page. It is
critical that the exposed metal pad is properly soldered to
the ground copper area and then connected to a ground
plane through thermal vias. The maximum recommended
thermal via diameter is 12 mils (0.305 mm). Limited by the
size of the pad, six thermal vias should allow for proper
thermal regulation without sacrificing too much copper
area within the pad. The copper pad is the primary heatsink
and should be connected to as much top layer metal as
possible to minimize the thermal impedance. Figure 21
illustrates graphically the recommended connection for the
exposed pad with vias.
GND
Figure 21. Recommended Footprint
The following is a NCP1835 Demo Board Schematic, Layout, and suggested Bill of Materials.
VBAT
(T1)
NCP1835
VCC
(T8)
VCC
D1
D2
TIMER
(T10)
CFLG
ISEL
TIMER
V2P8
GND
FAULT
(T5)
VSNS
(T7)
V2P8
(T4)
EN
R1
+
D3
−
R2
C4
VCC
C1
C3
R3
CFLG
(T6)
R8
JP1
1
JP2
1
GND
(T9)
R9
Figure 22. Demo Board Schematic
http://onsemi.com
13
Li−Ion
Battery
C2
2
C5
R5
VSNS
2
R4
BAT
FAULT
GND
(T2)
NCP1835
Figure 23. Silkscreen Layer
Figure 24. Top Layer
Figure 25. Bottom Layer
http://onsemi.com
14
NCP1835
Table 4. Bill of Materials
Item
Qty.
Designators
Suppliers
1
1
NCP1835 Integrated Li−Ion Charger (DFN−10)
Part Description
U1
ON Semiconductor
Part Number
2
1
Chip Resistor "1% 0 W (0603)
R1
Vishay
CRCW06030R00F
3
2
Chip Resistor "1% 160 kW (0603)
R2, R9
Vishay
CRCW06031603F
4
1
Chip Resistor "1% 100 kW (0603)
R3
Vishay
CRCW06031003F
5
2
Chip Resistor "1% 1.0 kW (0603)
R4, R5
Vishay
CRCW06031001F
6
1
Chip Resistor "1% 432 W (0603)
R8
Vishay
CRCW06034320F
8
1
Chip Capacitor 1.0 mF/16 V, "20% (0805)
C1
Panasonic
ECJGVB1C105M
9
1
Chip Capacitor 4.7 mF/10 V, "20% (3528−21)
C2
Kemet
T491B475K010AS
10
1
Chip Capacitor 0.1 mF/10 V, "10% (0402)
C3
Panasonic
ECJ0EB1A104K
11
1
Chip Capacitor 15 nF/16 V, "10% (0402)
C4
Panasonic
ECJ0EB1C153K
12
1
Chip Capacitor 4.7 mF/25 V, "20% (0805)
C5
Panasonic
ECJ2FB1E475M
13
1
SMT Chip LED Red
D1
Agilent
HSMH−C150
14
1
SMT Chip LED Green
D2
Agilent
HSMG−C150
15
1
SMT Chip LED Yellow
D4
Agilent
HSMY−C150
16
5
Test Pin
T1, T2, T7,
T8, T9, T10
AMP/Tyco
4−103747−0
17
2
Header Pin Pinch = 2.54 mm
JP1, JP2
AMP/Tyco
4−103747−0
NCP1835
ORDERING INFORMATION
Voltage Option
Package
Shipping†
NCP1835MN20R2
4.2 V
DFN−10
3000 / Tape & Reel
NCP1835MN20R2G
4.2 V
DFN−10
(Pb−Free)
3000 / Tape & Reel
NCP1835MN24T2
4.242 V
DFN−10
3000 / Tape & Reel
NCP1835MN24T2G
4.242 V
DFN−10
(Pb−Free)
3000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
15
NCP1835
PACKAGE DIMENSIONS
DFN10, 3 x 3mm, 0.5mm Pitch
CASE 485C−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. TERMINAL b MAY HAVE MOLD COMPOUND
MATERIAL ALONG SIDE EDGE. MOLD
FLASHING MAY NOT EXCEED 30 MICRONS
ONTO BOTTOM SURFACE OF TERMINAL b.
6. DETAILS A AND B SHOW OPTIONAL VIEWS
FOR END OF TERMINAL LEAD AT EDGE OF
PACKAGE.
EDGE OF PACKAGE
D
A
B
L1
PIN 1
REFERENCE
ÇÇÇ
ÇÇÇ
ÇÇÇ
DETAIL A
Bottom View
(Optional)
E
0.15 C
2X
0.15 C
2X
EXPOSED Cu
TOP VIEW
(A3)
DETAIL B
0.10 C
ÉÉ
ÉÉ
MOLD CMPD
A1
A
10X
0.08 C
SIDE VIEW
D2
10X
DETAIL B
Side View
(Optional)
SEATING
PLANE
A1
A3
C
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
L1
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20 REF
0.18
0.30
3.00 BSC
2.45
2.55
3.00 BSC
1.75
1.85
0.50 BSC
0.19 TYP
0.35
0.45
0.00
0.03
SOLDERING FOOTPRINT*
DETAIL A
e
L
1
5
2.6016
E2
10X
K
2.1746
10
10X
3.3048
b
0.10 C A B
0.05 C
1.8508
6
BOTTOM VIEW
NOTE 3
10X
0.5651
10X
0.3008
0.5000 PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,
or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
16
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCP1835/D