Fairchild FQD1N80 800v n-channel mosfet Datasheet

QFET
®
FQD1N80 / FQU1N80
800V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply.
•
•
•
•
•
•
1.0A, 800V, RDS(on) = 20Ω @VGS = 10 V
Low gate charge ( typical 5.5nC)
Low Crss ( typical 2.7pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
FQD1N80 / FQU1N80
January 2009
• RoHS Compliant
D
D
!
"
G
S
D-PAK
FQD Series
G D S
Absolute Maximum Ratings
Symbol
VDSS
ID
! "
G!
I-PAK
"
"
FQU Series
!
S
TC = 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
FQD1N80 / FQU1N80
800
Units
V
1.0
A
- Continuous (TC = 100°C)
0.63
A
4.0
A
IDM
Drain Current
VGSS
Gate-Source Voltage
± 30
V
EAS
Single Pulsed Avalanche Energy
(Note 2)
90
mJ
IAR
Avalanche Current
(Note 1)
1.0
A
EAR
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C) *
(Note 1)
4.5
4.0
2.5
mJ
V/ns
W
45
0.36
-55 to +150
W
W/°C
°C
300
°C
dv/dt
PD
TJ, TSTG
TL
- Pulsed
(Note 1)
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
Parameter
Thermal Resistance, Junction-to-Case
Typ
--
Max
2.78
Units
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient *
--
50
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient
--
110
°C/W
* When mounted on the minimum pad size recommended (PCB Mount)
©2009 Fairchild Semiconductor Corporation
Rev. A3. October 2009
Symbol
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Units
800
--
--
V
--
V/°C
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
∆BVDSS
/
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, Referenced to 25°C
--
1.0
IDSS
IGSSF
IGSSR
VDS = 800 V, VGS = 0 V
--
--
10
µA
VDS = 640 V, TC = 125°C
--
--
100
µA
Gate-Body Leakage Current, Forward
VGS = 30 V, VDS = 0 V
--
--
100
nA
Gate-Body Leakage Current, Reverse
VGS = -30 V, VDS = 0 V
--
--
-100
nA
3.0
--
5.0
V
Zero Gate Voltage Drain Current
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static Drain-Source
On-Resistance
VGS = 10 V, ID = 0.5 A
--
15.5
20
Ω
gFS
Forward Transconductance
VDS = 50 V, ID = 0.5 A
--
0.75
--
S
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
--
150
195
pF
--
20
26
pF
--
2.7
3.5
pF
FQD1N80 / FQU1N80
Electrical Characteristics
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = 400 V, ID = 1.0 A,
RG = 25 Ω
VDS = 640 V, ID = 1.0 A,
VGS = 10 V
--
10
30
ns
--
25
60
ns
--
15
40
ns
--
25
60
ns
--
5.5
7.2
nC
--
1.1
--
nC
--
3.3
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
1.0
A
ISM
--
--
4.0
A
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = 1.0 A
Drain-Source Diode Forward Voltage
--
--
1.4
V
trr
Reverse Recovery Time
--
300
--
ns
Qrr
Reverse Recovery Charge
--
0.6
--
µC
VGS = 0 V, IS = 1.0 A,
dIF / dt = 100 A/µs
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 170mH, IAS = 1.0A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 1.0A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2009 Fairchild Semiconductor Corporation
Rev. A3. January 2009
FQD1N80 / FQU1N80
Typical Characteristics
VGS
15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom : 5.5 V
Top :
ID, Drain Current [A]
0
ID, Drain Current [A]
0
10
-1
10
10
o
150 C
o
25 C
o
-55 C
※ Notes :
1. 250μ s Pulse Test
2. TC = 25℃
-2
10
※ Notes :
1. VDS = 50V
2. 250μ s Pulse Test
-1
-1
0
10
10
1
10
10
2
4
6
8
10
VGS, Gate-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
50
IDR , Reverse Drain Current [A]
RDS(ON) [Ω ],
Drain-Source On-Resistance
40
VGS = 10V
30
VGS = 20V
20
10
※ Note : TJ = 25℃
0
10
150℃
25℃
※ Notes :
1. VGS = 0V
2. 250μ s Pulse Test
-1
0.0
0.2
0.4
0.6
0.8
1.0
1.4
1.6
1.8
2.0
10
0.2
0.4
0.6
0.8
1.0
1.2
ID, Drain Current [A]
VSD, Source-Drain voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
250
12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
Ciss
150
Coss
100
※ Notes :
1. VGS = 0 V
2. f = 1 MHz
Crss
50
VDS = 160V
10
VGS, Gate-Source Voltage [V]
200
Capacitance [pF]
1.2
VDS = 400V
VDS = 640V
8
6
4
2
※ Note : ID = 1.0 A
0
-1
10
0
10
1
10
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2009 Fairchild Semiconductor Corporation
0
0
1
2
3
4
5
6
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. A3. January 2009
FQD1N80 / FQU1N80
Typical Characteristics
(Continued)
3.0
1.2
RDS(ON) , (Normalized)
Drain-Source On-Resistance
BV DSS , (Normalized)
Drain-Source Breakdown Voltage
2.5
1.1
1.0
※ Notes :
1. VGS = 0 V
2. ID = 250 μ A
0.9
0.8
-100
-50
0
50
100
150
2.0
1.5
1.0
※ Notes :
1. VGS = 10 V
2. ID = 0.5 A
0.5
0.0
-100
200
-50
o
0
50
100
150
200
o
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
1.2
1
Operation in This Area
is Limited by R DS(on)
10
1.0
1 ms
0
10
ID, Drain Current [A]
ID, Drain Current [A]
100μ s
10 ms
DC
-1
10
0.8
0.6
0.4
※ Notes :
0.2
o
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
-2
10
0
10
1
2
10
0.0
25
3
10
10
50
Figure 9. Maximum Safe Operating Area
100
125
150
Figure 10. Maximum Drain Current
vs. Case Temperature
D = 0 .5
10
0
※ N o te s :
1 . Z θ J C ( t) = 2 .7 8 ℃ /W M a x .
2 . D u ty F a c to r , D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C ( t)
0 .2
0 .1
0 .0 5
10
PDM
0 .0 2
-1
0 .0 1
θ JC
( t) , T h e r m a l R e s p o n s e
75
TC, Case Temperature [℃]
VDS, Drain-Source Voltage [V]
t1
Z
s i n g l e p u ls e
10
-5
10
-4
10
-3
10
-2
10
-1
t2
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
Figure 11. Transient Thermal Response Curve
©2009 Fairchild Semiconductor Corporation
Rev. A3. January 2009
FQD1N80 / FQU1N80
Gate Charge Test Circuit & Waveform
50KΩ
200nF
12V
VGS
Same Type
as DUT
Qg
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RG
RL
VDS
90%
VDD
VGS
VGS
DUT
10V
10%
td(on)
tr
td(off)
t on
t off
tf
Unclamped Inductive Switching Test Circuit & Waveforms
VDS
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
BVDSS
IAS
ID
RG
VDD
DUT
10V
tp
©2009 Fairchild Semiconductor Corporation
ID (t)
VDS (t)
VDD
tp
Time
Rev. A3. January 2009
FQD1N80 / FQU1N80
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
I SD
( DUT )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
©2009 Fairchild Semiconductor Corporation
Rev. A3. January 2009
TO-252 (DPAK) (FS PKG Code 36)
FQD1N80 / FQU1N80
Mechanical Dimensions
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
millimeters
Part Weight per unit (gram): 0.33
©2009 Fairchild Semiconductor Corporation
Rev. A3. January 2009
FQD1N80 / FQU1N80
Mechanical Dimensions
I - PAK
Dimensions in Millimeters
©2009 Fairchild Semiconductor Corporation
Rev. A3. January 2009
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Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
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No Identification Needed
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Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
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Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I37
©2009 Fairchild Semiconductor Corporation
Rev. A3. January 2009
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