Maxim MAX3532EAX Upstream catv driver amplifier Datasheet

19-1331; Rev 1; 6/98
KIT
ATION
EVALU
E
L
B
A
IL
AVA
Upstream CATV Driver Amplifier
____________________________Features
The MAX3532 is a programmable power amplifier for
use in upstream cable applications. The device outputs
up to 62dBmV (continuous wave) through a 1:2 (voltage
ratio) transformer when driven with 36dBmV at its input.
It features variable gain, which is controlled via a 3-wire
digital serial bus and available in 1dB steps. The operating frequency ranges from 5MHz to 42MHz.
The MAX3532 offers three operating modes: high power,
low noise, and transmit disable. High-power mode
achieves the highest output levels, while low-noise mode
achieves the lowest output noise when driving lower output levels. Transmit disable mode places the device in a
high-isolation state with minimum output noise, for use
between bursts in TDMA systems.
♦ Single +5V Supply
Two power-down modes are also available. Software shutdown mode permits power-down of all analog circuitry while
maintaining the programmed gain setting. Shutdown mode
disables all circuitry and reduces current consumption
below 10µA.
The MAX3532 comes in a 36-pin SSOP package screened
for the extended-industrial temperature range (-40°C to
+85°C).
________________________Applications
Cable Modems
CATV Set-Top Box
Telephony over Cable
__________Typical Operating Circuit
36
VOUT-
SHDN
34
8.0Ω
1–10, 12, 13, 15–17,
21–25, 32
TXEN
VOUT+
OUTPUT
INPUT
0.001µF
28
27
VEE2
VCC2
VIN-
VCC
VCC
0.1µF
11 V 1
EE
SDA
CS
PART
MAX3532EAX
TEMP. RANGE
PIN-PACKAGE
-40°C to +85°C
36 SSOP
___________________Pin Configuration
TOP VIEW
GND 1
36 SHDN
GND 2
35 TXEN
GND 3
34 VOUT-
GND 4
33 VOUT+
32 GND
GND 5
MAX3532
31 VEE2
30 VCC2
GND 7
GND 10
27 VIN-
VEE1 11
26 VEE
GND 12
25 GND
GND 13
24 GND
VCC1 14
23 GND
GND 15
22 GND
26
GND 16
21 GND
20
GND 17
20 SCLK
33
8.0Ω
31
30
VCC
VCC
0.1µF
SCLK
_______________Ordering Information
29 VCC
29
VEE
♦ Two Shutdown Modes
28 VIN+
0.001µF
14 V 1
CC
♦ Transmit-Disable Mode
GND 9
0.1µF
VIN+
♦ 350mW Typical Power Dissipation
GND 8
GND
MAX3532
♦ Gain Programmable in 1dB Steps
GND 6
1:2
CONTROL
LOGIC
35
♦ Output Level Ranges from Less than 8dBmV
to 62dBmV, in 1dB Steps
19
18
CONTROL
LOGIC
19 SDA
CS 18
SSOP
† Protected under U.S. Patent 5,748,027
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 408-737-7600 ext. 3468.
MAX3532 †
________________General Description
MAX3532 †
Upstream CATV Driver Amplifier
ABSOLUTE MAXIMUM RATINGS
VCC ........................................................................-0.5V to +7.0V
Input Voltage Levels (all inputs) .................-0.3V to (VCC + 0.3V)
Continuous RMS Input Voltage (VIN+, VIN-) ..................60dBmV
Continuous Current (VOUT+, VOUT-)...............................100mA
Continuous Power Dissipation (TA = +70°C)
36-Pin SSOP (denote at 11mW/°C above +70°C) ........900mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +165°C
Lead Temperature (soldering, 10sec) .............................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = +4.75V to +5.25V, no RF applied, TA = -40°C to +85°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
4.75
MAX
UNITS
Supply Voltage
VCC
5.25
V
Supply Current
ICC
TXEN = 1, SHDN = 1, D7 and D6 = 1X or 01
75
95
mA RMS
Software Shutdown Current
ICC
TXEN = X, SHDN = 1, D7 and D6 = 00
1.5
2
mA
Shutdown Current
ICC
TXEN = X, SHDN = 0, D7 and D6 = XX
0.1
10
µA
Digital Input High Voltage
VIH
CS, SDA, SCLK, TXEN, SHDN
Digital Input Low Voltage
VIL
CS, SDA, SCLK, TXEN, SHDN
0.8
V
Digital Input High Current
IIH
CS, SDA, SCLK, TXEN, SHDN
100
µA
Digital Input Low Current
IIL
CS, SDA, SCLK, TXEN, SHDN
2.4
V
-100
µA
AC ELECTRICAL CHARACTERISTICS
(VCC = +5V, VIN = 36dBmV, SHDN = TXEN = 1, fIN = 20MHz, ZLOAD = 75Ω through a 1:2 transformer with two precision 8.0Ω backtermination resistors, TA = -40°C to +85°C, unless otherwise noted. Typical values are measured at TA = +25°C.)
PARAMETER
Output Signal Swing
Voltage Gain
SYMBOL
CONDITIONS
MIN
VTXOUT
AV
Two-Tone Third-Order
Distortion (Note 1)
IMR3
Second Harmonic Distortion
(Note 1)
HD2
Third Harmonic Distortion
(Note 1)
HD3
MAX
3.6
High power, D7–D0 = 11111101
24
UNITS
Vp-p
26
-28
dB
Low noise, D7–D0 = 1001000
-32
1
dB
TXEN = 0, fIN = 42MHz, VOUT = 58dBmV
36
dB
Two input tones at 40MHz and 40.25MHz, both at
30dBmV; VOUT = 52dBmV per tone
-43
-37.5
fIN = 20MHz, VOUT = 52dBmV
-59
-55
fIN = 20MHz, VOUT = 58dBmV
-46
-40
fIN = 14MHz, VOUT = 52dBmV
-67
-58
fIN = 14MHz, VOUT = 58dBmV
-57
-48
Output Step Size
Isolation in Standby Mode
TYP
dBc
dBc
dBc
AM to AM
AMAM
VIN = 36dBmV to 40dBmV, AV = 22dB
0.1
dB
AM to PM
AMPM
VIN = 36dBmV to 40dBmV, AV = 22dB
1
degrees
Output Noise
(High-Power Mode) (Note 1)
2
D7 and D6 = 11, BW = 160kHz,
VOUT = 46dBmV to 62dBmV, f = 5MHz to 42MHz
-80
_______________________________________________________________________________________
-79
dBc
Upstream CATV Driver Amplifier
(VCC = +5V, VIN = 36dBmV, SHDN = TXEN = 1, fIN = 20MHz, ZLOAD = 75Ω through a 1:2 transformer with two precision 8.0Ω backtermination resistors, TA = -40°C to +85°C, unless otherwise noted. Typical values are measured at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
TYP
MAX
UNITS
D7 and D6 = 10, VOUT > 27dBmV,
BW = 160kHz, f = 5MHz to 42MHz
-75
-73
dBc
D7 and D6 = 10, VOUT ≤ 27dBmV,
BW = 160kHz, f = 5MHz to 42MHz
-47
-45
dBmV
Output Noise
(Standby Mode) (Note 1)
TXEN = 0, BW = 160kHz,
f = 5MHz to 42MHz
-47
-45
dBmV
Output Return Loss (Note 1)
fIN = 5MHz to 42MHz
TXEN Transient Duration
TXEN rise/fall time < 100ns, TA = +25°C (Note 1)
3
7
µs
TXEN Transient Step Size
TA = +25°C, AV = 22dB (Note 1)
25
100
mV
Power-Enable Transient
Duration (Note 1)
TA = +25°C
1
2.5
5
µs
Output Noise
(Low-Power Mode)
Output
(Note 1)Noise
(Standby Mode) (Note 1)
MIN
12
dB
SERIAL INTERFACE
CS to SCLK Setup Time
tCSS
(Note 1)
20
ns
CS to SCLK Hold Time
tCSH
(Note 1)
20
ns
SDA to SCLK Setup Time
tSDAS
(Note 1)
20
ns
SDA to SCLK Hold Time
tSDAH
(Note 1)
20
ns
SCLK Pulse Width High
tSCLKH
(Note 1)
50
ns
SCLK Pulse Width Low
tSCLKL
(Note 1)
50
ns
Note 1: Guaranteed by design and characterization.
__________________________________________Typical Operating Characteristics
(VCC = 5.0V, VIN = 36dBmV, fIN = 20MHz, SHDN = TXEN = 1, ZLOAD = 75Ω through a 1:2 transformer with two precision 8.0Ω backtermination resistors, TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
70
TA = +25°C
TA = 0°C
70
65
60
-40
-20
0
25
TEMPERATURE (°C)
50
85
85
80
75
65
VCC = 4.75V
60
90
70
TA = -40°C
VCC = 5.0V
65
80
75
95
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
75
TA = +85°C
85
SUPPLY CURRENT vs. OUTPUT LEVEL
100
MAX3532toc02
MAX3532toc01
VCC = 5.25V
80
SUPPLY CURRENT (mA)
90
MAX3532toc03
SUPPLY CURRENT vs. TEMPERATURE
85
60
4.75
5
SUPPLY VOLTAGE (V)
5.25
12 16 21 26 31 36 41 45 50 55 59 64
OUTPUT LEVEL (dBmV)
_______________________________________________________________________________________
3
MAX3532 †
AC ELECTRICAL CHARACTERISTICS (continued)
_____________________________Typical Operating Characteristics (continued)
(VCC = +5V, VIN = 36dBmV, SHDN = TXEN = 1, fIN = 20MHz, ZLOAD = 75Ω through a 1:2 transformer with two precision 8.0Ω backtermination resistors, TA = -40°C to +85°C, unless otherwise noted. Typical values are measured at TA = +25°C.)
10
0
-10
-20
24
-30
-15
-20
-25
-30
LOW-NOISE MODE
-45
-40
20
40
60
80
100 120 140
40
30
20
LOW-NOISE MODE
0
-50
0
HIGH-POWER MODE
50
10
-40
HIGH-POWER MODE
LOW-NOISE MODE
18
HIGH-POWER MODE
-35
60
OUTPUT LEVEL (dBmV)
54
48
60
54
48
42
36
30
70
MAX3532toc05
GAIN STATE 60
OUTPUT NOISE IN 160kHz (dBmV)
20
MAX3532toc04
57
30
OUTPUT LEVEL vs. GAIN STATE
OUTPUT NOISE vs. GAIN STATE
-10
-10
5 10 15 20 25 30 35 40 45 50 55 60
FREQUENCY (MHz)
0
5 10 15 20 25 30 35 40 45 50 55 60
GAIN STATE
GAIN STATE
REAL AND IMAGINARY INPUT
IMPEDANCE vs. FREQUENCY
REAL AND IMAGINARY OUTPUT
IMPEDANCE vs. FREQUENCY
10,000
MAX3532toc08
120
MAX3532toc07
12,000
100
8000
IMPEDANCE (Ω)
IMPEDANCE (Ω)
6000
4000
2000
REAL
0
-2000
IMAGINARY
80
REAL
60
40
20
-4000
IMAGINARY
0
-6000
0
20
40
60
80
20
30
40
50
75
SECOND HARMONIC DISTORTION vs.
INPUT FREQUENCY
THIRD HARMONIC DISTORTION vs.
INPUT FREQUENCY
-40
VOUT = 55dBmV
-45
-50
-55
-60
VOUT = 25dBmV
-65
100
MAX3532toc10
-30
-35
HARMONIC DISTORTION (dBc)
MAX3532toc09
HARMONIC DISTORTION (dBc)
10
FREQUENCY (MHz)
-35
-40
VOUT = 55dBmV
-45
VOUT = 52dBmV
-50
-55
-60
VOUT = 40dBmV
-65
VOUT = 25dBmV
-70
VOUT = 40dBmV
-70
10
15
20
25
30
35
-75
40
INPUT FREQUENCY (MHz)
4
5
100
FREQUENCY (MHz)
-30
45
MAX3532toc06
GAIN vs. FREQUENCY
40
GAIN (dB)
MAX3532 †
Upstream CATV Driver Amplifier
50
10
15
20
25
30
35
40
INPUT FREQUENCY (MHz)
_______________________________________________________________________________________
45
50
Upstream CATV Driver Amplifier
PIN
NAME
FUNCTION
1–10, 12, 13,
15, 16, 17,
21–25, 32
GND
Ground Pins
11
VEE1
Serial Data Interface Ground. As with all grounds, maintain the shortest possible
(low-inductance) connections to the ground plane.
14
VCC1
Serial Data Interface +5V Supply. Bypass this pin with a 0.1µF decoupling capacitor as close to the
part as possible.
18
CS
19
SDA
Serial-Interface Data. TTL-compatible input. See Serial Interface section.
20
SCLK
Serial-Interface Clock. TTL-compatible input. See Serial Interface section.
26
VEE
Programmable Gain Amplifier (PGA) Ground. As with all grounds, maintain the shortest possible
(low-inductance) connection to the ground plane.
27
VIN-
Negative Input. When not used, this port must be AC coupled to ground. Along with VIN+, this port
forms a high-impedance differential input to the PGA. Driving this port differentially will increase the
rejection of second-order distortion.
28
VIN+
Positive Input. Along with VIN-, this port forms a high-impedance differential input to the PGA. Driving
this port differentially will increase the rejection of second-order distortion. AC couple to this pin.
29
VCC
PGA +5V Supply. Bypass this pin with a decoupling capacitor as close to the part as possible.
30
VCC2
Power Amplifier +5V Supply. Bypass this pin with a decoupling capacitor as close to the part as
possible.
31
VEE2
Power Amplifier Ground. As with all grounds, connections maintain the shortest possible (low-inductance) length to the ground plane.
33
VOUT+
Positive Output. Along with VOUT-, this pin forms a low-impedance output. Typically this port drives
a 1:2 transformer through 8Ω series resistors.
34
VOUT-
Negative Output. Along with VOUT+, this pin forms a low-impedance output. Typically this port
drives a 1:2 transformer through 8Ω series resistors.
35
TXEN
Transmit Amplifier Enable. Setting this pin low places the transmitter in a high-isolation state (transmit
disable mode). In this mode, however, significant common-mode voltage swings exist. It is, therefore, important to maintain good balance of the differential output through to the transformer primary.
36
SHDN
Shutdown. When this pin is set low, all functions (including the serial interface) are disabled, leaving
only leakage currents to flow.
Serial-Interface Enable. TTL-compatible input. See Serial Interface section.
_______________________________________________________________________________________
5
MAX3532 †
______________________________________________________________Pin Description
Upstream CATV Driver Amplifier
MAX3532 †
Shutdown Mode
SHDN
BIAS
MAX3532
VOUT-
PGA
VIN+
In normal operation the shutdown pin (SHDN) is driven
high. When SHDN is asserted low, all circuits within the
IC are disabled. Only leakage currents flow in this
state. Data stored within the serial-data interface latches will be lost upon shutting down the part.
TXEN
Transmit-Disable Mode
VINVOUT+
SERIAL-DATA INTERFACE
CS
SDA
SCLK
When the TXEN pin is asserted high, the device is in
transmit mode. When TXEN is driven low, the transmit
amplifier switches to common-mode operation and the
output signal appears at the output pins VOUT+ and
VOUT- with the same phase. These identical signals
cancel within the output transformer core, providing
high isolation from input to output. Optimum isolation is
achieved in low-noise mode with a low gain setting.
Figure 1. Functional Diagram
Serial Interface
_______________Detailed Description
The following sections describe the blocks shown in the
Functional Diagram (Figure 1).
Programmable-Gain Amplifier
The MAX3532’s processing path is made up of the programmable-gain amplifier (PGA) and the transmit
power amplifier, which together provide better than
64dB of output level control in 1dB steps.
The PGA is implemented as a programmable Gilbert
cell attenuator. It uses a differential architecture to
achieve maximum linearity. When it is driven single
ended, specified performance is achieved given that
the unused input is decoupled to ground. The gain of
the PGA is determined by the serial-data interface. See
Table 2.
Transmit Power Amplifier
The transmit power amp is capable of driving +8dBmV
to +62dBmV differentially when driven with +36dBmV. To
achieve the necessary swing from a single +5V supply,
an external 1:2 transformer must be used. The output of
the transmit power amplifier is a very low-impedance
emitter follower, which requires two 8Ω series termination
resistors to achieve adequate output return loss.
The power amplifier’s gain is set via the serial-data
interface. The transmit power amplifier has a switchable
+16dB or +0dB gain to achieve high linearity or low
noise, respectively. High-gain mode sets the power
amp’s gain to +16dB, allowing for the highest output
signal swings. Low-noise mode sets the gain to 0dB,
which achieves the lowest output noise.
6
The serial interface has an active-low enable (CS) to
bracket the data, with data clocked in MSB first on the
rising edge of SCLK. Data is stored in the storage latch
on the rising edge of CS. The serial interface controls
the state of the PGA and output amplifier. The register
format is shown in Tables 1 and 2. Serial-interface timing is shown in Figure 2.
Transmit Modes
The hardware TXEN line is ANDed with software bit D7,
so both TXEN and D7 must be high to transmit. Bit D6
governs whether the device is set to high-gain mode (D6
= 1) or to low-noise mode (D6 = 0). High-power mode
should be used for output levels above 45dBmV. This
transition point optimizes the MAX3532’s distortion performance, but either mode may be used throughout the full
complement of programmed gain states. Bits D5–D0
define 64 PGA gain states, nominally 1dB each.
Table 1. Serial-Interface Control Words
BIT
MNEMONIC
DESCRIPTION
MSB 7
D7
Chip-State Control MSB
6
D6
Chip-State Control LSB
5
D5
Gain Control, Bit 5
4
D4
Gain Control, Bit 4
3
D3
Gain Control, Bit 3
2
D2
Gain Control, Bit 2
1
D1
Gain Control, Bit 1
LSB 0
D0
Gain Control, Bit 0
_______________________________________________________________________________________
Upstream CATV Driver Amplifier
MAX3532 †
Table 2. Chip-State Control Bits
TXEN
D7
D6
D5
D4
D3
D2
D1
D0
STATE
1
1
1
X
X
X
X
X
X
High-power transmit
1
1
0
X
X
X
X
X
X
Low-noise transmit; subtract 16dB from VOUT
X
X
X
X
X
X
Transmit disabled
X
0
1
0*
X
X
X
0
0
X
X
X
X
X
X
All analog circuitry off
1
1
0
0
0
1
1
0
1
VOUT = +8dBmV
1
1
0
0
0
1
1
1
0
VOUT = +9dBmV
—
1
—
—
—
—
—
—
—
—
1
1
1
1
1
0
1
0
1
VOUT = +56dBmV
1
1
1
1
1
0
1
1
0
VOUT = +57dBmV
*Except state 000XXXXXX, which is software shutdown.
A
D7
B
D6
A: tCSS
B: tSDAS
D5
C
D4
D3
D
D2
C: tSDAH
D: tSCKL
E
D1
F
D0
E: tSCKH
F: tCSH
Figure 2. Serial-Interface Timing Diagram
Software Shutdown Mode
Software-shutdown mode is enabled when both D7 and
D6 are low (D7, D6 = 00). This mode minimizes current
consumption while maintaining the programmed gain
state stored in the serial data-interface’s latch. All analog functions are disabled in this mode.
__________Applications Information
Output Match
The MAX3532’s output circuit is a differential emitter follower that has a near-zero impedance over the operating frequency range. In order to match to a singleended impedance, a transformer and back-termination
resistors are required. Furthermore, operation from a
single +5V supply requires that the output signal swing
be stepped up to achieve the rated output levels.
These are described in the next two sections.
Transformer
To achieve the rated output levels, a 1:2 (voltage ratio)
transformer is required. This transformer must have
adequate bandwidth to cover the intended application.
Note that most RF transformers specify a bandwidth
with a 50Ω load on the primary and a matching resistance on the secondary winding. The much lower
(approximately 16Ω due to the back-termination resistors) impedance of the MAX3532’s output will tend to
shift the low-frequency edge of the bandwidth specification down by a factor of three or more due to primary
inductance. Keep this in mind when specifying a transformer.
RF transformer cores are inherently nonlinear devices,
which must be operated in their linear region if distortion is a critical consideration. In general, the size of the
transformer core used and the number of turns will govern the distortion performance of the transformer for a
given output level. Therefore a transformer of adequate
size must be used to minimize its contribution to the
overall distortion budget.
Back-Termination Resistors
The value of the back-termination resistors depends on
two parameters: the ultimate output impedance (as
referred through the output transformer), and the quality of the output match desired. The output impedance
depends on the value of the termination resistors by the
following formula:
ZOUT = 4 x [ 2 x (Rterm + RP)]
where Rterm is the value of one termination resistor and
RP is parasitic resistance.
_______________________________________________________________________________________
7
Some allowance must be made for parasitic inductance
in the transformer as well as on the printed circuit
board. Therefore, choose a resistance value lower than
a perfect match. Two 8.0Ω resistors will provide a nearoptimum match.
If the output match is less than critical, the back-termination resistors can be set to a lower value. This will extend
the upper limit of the output level range (by dropping less
voltage across the resistors and more across the load),
and may improve distortion performance for a given output level.
Layout Issues
A well designed printed circuit board is an essential
part of an RF circuit. For best performance pay attention to power-supply layout issues, as well the output
circuit layout.
Output Circuit Layout
The differential implementation of the MAX3532’s output has the benefit of significantly reducing even-order
distortion, the most significant of which is second-harmonic distortion. The degree of distortion cancellation
depends on the amplitude and phase balance of the
overall circuit. It is critical that the traces leading from
the output pins be exactly the same length.
Since the MAX3532 has a low-impedance output, the
output traces must also be kept as short as possible,
as small amounts of inductance can have an impact at
higher frequencies. The back-termination resistors
should be kept as close to the device as possible.
Power-Supply Layout
For minimal coupling between different sections of the
IC, the ideal power-supply layout is a star configuration.
This configuration has a large valued decoupling
capacitor at the central V CC node. The V CC traces
branch out from this node, each going to a separate
VCC node in the MAX3532 circuit. At the end of each of
these traces is a decoupling capacitor that provides a
very low impedance at the frequency of interest. This
arrangement provides local VCC decoupling at each
VCC pin.
The traces leading from the supply to VCC (pin 29) and
VCC2 (pin 30) must be made as thick as practical to
keep resistance well below 1Ω.
Ground inductance degrades distortion performance.
Therefore, ground plane connections to VEE (pin 26)
and VEE2 (pin 31) should be made with multiple vias if
possible.
Chip Information
TRANSISTOR COUNT: 1100
________________________________________________________Package Information
SSOP2.EPS
MAX3532 †
Upstream CATV Driver Amplifier
8
_______________________________________________________________________________________
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