Intersil HCTS240AD Radiation hardened octal buffer/line driver, three-state Datasheet

HCTS240AMS
Radiation Hardened
Octal Buffer/Line Driver, Three-State
September 1995
Features
Pinouts
• 3 Micron Radiation Hardened CMOS SOS
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20, LEAD FINISH C
TOP VIEW
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
1 OE
1
20 VCC
1 A0
2
19 2 OE
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
2 Y3
3
18 1 Y0
1 A1
4
17 2 A3
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
2 Y2
5
16 1 Y1
1 A2
6
15 2 A2
2 Y1
7
14 1 Y2
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/
Bit-Day (Typ)
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55oC to +125oC
1 A3
8
13 2 A1
• Significant Power Reduction Compared to LSTTL ICs
2 Y0
9
12 1 Y3
• DC Operating Voltage Range: 4.5V to 5.5V
GND 10
11 2 A0
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20, LEAD FINISH C
TOP VIEW
• Input Current Levels Ii ≤ 5µA at VOL, VOH
1 OE
1
20
VCC
Description
1 A0
2
19
2 OE
2 Y3
3
18
1 Y0
The Intersil HCTS240AMS is a Radiation Hardened inverting
octal buffer/line driver, three-state, with two active low output
enables (1OE, 2OE). 1OE controls outputs 1Yn, 2OE
controls outputs 2Yn.
1 A1
4
17
2 A3
The HCTS240AMS utilizes advanced CMOS/SOS
technology to achieve high-speed operation. This device is a
member of radiation hardened, high-speed, CMOS/SOS
Logic Family .
2 Y2
5
16
1 Y1
1 A2
6
15
2 A2
2 Y1
7
14
1 Y2
1 A3
8
13
2 A1
2 Y0
9
12
1 Y3
GND
10
11
2 A0
The HCTS240AMS is supplied in a 20 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
HCTS240ADMSR
-55oC to +125oC
Intersil Class S Equivalent
20 Lead SBDIP
HCTS240AKMSR
-55oC to +125oC
Intersil Class S Equivalent
20 Lead Ceramic Flatpack
HCTS240AD/Sample
+25oC
Sample
20 Lead SBDIP
HCTS240AK/Sample
+25oC
Sample
20 Lead Ceramic Flatpack
HCTS240AHMSR
+25oC
Die
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
Spec Number
File Number
518889
2105.2
HCTS240AMS
Functional Diagram
1Y0
1Y1
18
N
1
1OE
P
N
2
1A0
1Y2
16
P
N
P
4
1A1
1Y3
14
2Y0
12
N
6
P
P
8
1A2
2Y1
9
N
11
1A3
2A0
2Y2
7
P
N
P
13
2A1
2Y3
5
N
15
2A2
3
P
N
17
2A3
19
2OE
TRUTH TABLE
INPUTS
OUTPUT
1OE, 2OE
A
Y
L
L
H
L
H
L
H
X
Z
H = High Voltage Level
L = Low Voltage Level
X = Immaterial
Z = High Impedance
Spec Number
2
518889
Specifications HCTS240AMS
Absolute Maximum Ratings
Reliability Information
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±35mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance
θJA
θJC
SBDIP Package. . . . . . . . . . . . . . . . . . . .
72oC/W
24oC/W
Ceramic Flatpack Package . . . . . . . . . . . 107oC/W 28oC/W
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.69W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.47W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.9mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 9.3mW/oC
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . .100ns Max
Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . VCC to VCC/2V
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Supply Current
Output Current
(Sink)
Output Current
(Source)
Output Voltage Low
Output Voltage High
Input Leakage
Current
Three-State Output
Leakage Current
Noise Immunity
Functional Test
GROUP
A SUBGROUPS
TEMPERATURE
MIN
MAX
UNITS
1
+25oC
-
40
µA
2, 3
+125oC, -55oC
-
750
µA
1
+25oC
7.2
-
mA
2, 3
+125oC, -55oC
6.0
-
mA
1
+25oC
-7.2
-
mA
2, 3
+125oC, -55oC
-6.0
-
mA
VCC = 4.5V, VIH = 2.25V,
IOL = 50µA, VIL = 0.8V
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
VCC = 5.5V, VIH = 2.75V,
IOL = 50µA, VIL = 0.8V
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
VCC = 4.5V, VIH = 2.25V,
IOH = -50µA, VIL = 0.8V
1, 2, 3
+25oC, +125oC, -55oC
VCC
-0.1
-
V
VCC = 5.5V, VIH = 2.75V,
IOH = -50µA, VIL = 0.8V
1, 2, 3
+25oC, +125oC, -55oC
VCC
-0.1
-
V
VCC = 5.5V, VIN = VCC or
GND
1
+25oC
-
±0.5
µA
2, 3
+125oC, -55oC
-
±5.0
µA
1
+25oC
-
±1
µA
2, 3
+125oC, -55oC
-
±50
µA
7, 8A, 8B
+25oC, +125oC, -55oC
-
-
V
(NOTE 1)
CONDITIONS
SYMBOL
ICC
IOL
IOH
VOL
VOH
IIN
IOZ
FN
VCC = 5.5V,
VIN = VCC or GND
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V,
(Note 2)
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC - 0.4V,
VIL = 0V, (Note 2)
VCC = 5.5V,
Applied Voltage = 0V or
VCC
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V (Note 3)
LIMITS
NOTES:
1. All voltages referenced to device GND.
2. Force/measure functions may be interchanged.
3. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
4. Due to tester noise at -55oC VIH is increased 200mV.
Spec Number
3
518889
Specifications HCTS240AMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
(NOTES 1, 2)
CONDITIONS
SYMBOL
Propagation Delay
Input to Output
TPHL
MIN
MAX
UNITS
9
+25oC
2
22
ns
10, 11
+125oC, -55oC
2
25
ns
9
+25oC
2
20
ns
10, 11
+125oC, -55oC
2
23
ns
9
+25oC
2
30
ns
10, 11
+125oC, -55oC
2
35
ns
9
+25oC
2
22
ns
10, 11
+125oC, -55oC
2
25
ns
9
+25oC
2
23
ns
10, 11
+125oC, -55oC
2
26
ns
9
+25oC
2
21
ns
10, 11
+125oC, -55oC
2
23
ns
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
TPZL
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
TPZH
Propagation Delay
Disable to Output
TEMPERATURE
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
TPLH
Propagation Delay
Enable to Output
GROUP
A SUBGROUPS
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
TPLZ
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
TPHZ
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
LIMITS
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input tr = tf = 3ns, VIL = GND, VIH = 3V.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
Capacitance Power Dissipation
Input Capacitance
CPD
CIN
Output Capacitance
COUT
(NOTE 1)
CONDITIONS
VCC = 5.0V, VIH = 5.0V,
VIL = 0V, f = 1MHz
VCC = 5.0V, VIH = 5.0V,
VIL = 0V, f = 1MHz
VCC = 5.0V, VIH = 5.0V,
VIL = 0V, f = 1MHz
LIMITS
TEMPERATURE
MIN
MAX
UNITS
+25oC
-
135
pF
150
pF
+125oC, -55oC
+25oC
-
10
pF
+125oC, -55oC
-
10
pF
+25oC
-
20
pF
+125oC, -55oC
-
20
pF
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Supply Current
Output Current (Sink)
Output Current
(Source)
SYMBOL
ICC
IOL
IOH
(NOTE 1)
CONDITIONS
200K RAD
LIMITS
TEMPERATURE
MIN
MAX
UNITS
VCC = 5.5V, VIN = VCC or GND
+25oC
-
0.75
mA
VCC = VIH = 4.5V, VOUT = 0.4V, VIL = 0V
+25oC
6.0
-
mA
VCC = VIH = 4.5V, VOUT = VCC -0.4V,
VIL = 0V
+25oC
-6.0
-
mA
Spec Number
4
518889
Specifications HCTS240AMS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER
(NOTE 1)
CONDITIONS
SYMBOL
Output Voltage Low
VOL
Output Voltage High
VOH
Input Leakage Current
IIN
200K RAD
LIMITS
TEMPERATURE
MIN
MAX
UNITS
VCC = 4.5V, VIH = 2.25V, VIL = 0.8V ,
IOL = 50µA
+25oC
-
0.1
V
VCC = 5.5V, VIH = 2.75V, VIL = 0.8V ,
IOL = 50µA
+25oC
-
0.1
V
VCC = 4.5V, VIH = 2.25V, VIL = 0.8V,
IOH = -50µA
+25oC
VCC
-0.1
-
V
VCC = 5.5V, VIH = 2.75V, VIL = 0.8V,
IOH = -50µA
+25oC
VCC
-0.1
-
V
VCC = 5.5V, VIN = VCC or GND
+25oC
-
±5
µA
Three-State Output
Leakage Current
IOZ
VCC = 5.5V, Force Voltage = 0V or VCC
+25 C
-
±50
µA
Noise Immunity
Functional Test
FN
VCC = 4.5V, VIH = 2.25V, VIL = 0.8V,
(Note 2)
+25oC
-
-
V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
+25oC
2
25
ns
VCC = 4.5V, VIH = 3.0V, VIL = 0V
+25oC
2
23
ns
VCC = 4.5V, VIH = 3.0V, VIL = 0V
+25oC
2
35
ns
VCC = 4.5V, VIH = 3.0V, VIL = 0V
+25oC
2
25
ns
VCC = 4.5V, VIH = 3.0V, VIL = 0V
+25oC
2
26
ns
VCC = 4.5V, VIH = 3.0V, VIL = 0V
+25oC
2
23
ns
Propagation Delay
Input to Output
TPHL
TPLH
Propagation Delay
Enable to Output
TPZL
TPZH
Propagation Delay
Disable to Output
TPLZ
TPHZ
o
NOTES:
1. All voltages referenced to device GND.
2. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
TABLE 5. DELTA PARAMETERS (+25oC)
GROUP B
SUBGROUP
DELTA LIMIT
ICC
5
12µA
IOZ
5
±200nA
IOL/IOH
5
-15% of 0 Hour
PARAMETER
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
METHOD
GROUP A SUBGROUPS
Initial Test (Preburn-In)
100%/5004
1, 7, 9
ICC, IOL/H, IOZL/H
Interim Test I (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H, IOZL/H
Interim Test II (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H, IOZL/H
PDA
100%/5004
1, 7, 9, Deltas
Interim Test III (Postburn-In)
100%/5004
1, 7, 9
PDA
100%/5004
1, 7, 9, Deltas
Final Test
100%/5004
2, 3, 8A, 8B, 10, 11
Sample/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group A (Note 1)
READ AND RECORD
ICC, IOL/H, IOZL/H
Spec Number
5
518889
Specifications HCTS240AMS
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
Group B
METHOD
GROUP A SUBGROUPS
Subgroup B-5
Sample/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample/5005
1, 7, 9
Sample/5005
1, 7, 9
Group D
READ AND RECORD
Subgroups 1, 2, 3, 9, 10, 11
NOTE:
1. Alternate group A inspection in accordance with Method 5005 of MIL-STD-883 may be exercised.
TABLE 7. TOTAL DOSE IRRADIATION
CONFORMANCE
GROUPS
Group E Subgroup 2
TEST
READ AND RECORD
METHOD
PRE RAD
POST RAD
PRE RAD
POST RAD
5005
1, 7, 9
Table 4
1, 9
Table 4 (Note 1)
NOTE:
1. Except FN test which will be performed 100% Go/No-Go.
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS
OSCILLATOR
OPEN
1/2 VCC = 3V ± 0.5V
GROUND
VCC = 6V ± 0.5V
50kHz
25kHz
-
20
-
-
-
1, 2, 4, 6, 8, 11, 13,
15, 17, 19, 20
-
-
3, 5, 7, 9, 12,
14, 16, 18
20
2, 4, 6, 8, 11,
13, 15, 17
-
STATIC BURN-IN I TEST CONNECTIONS (Note 1)
3, 5, 7, 9, 12, 14, 16, 18
1, 2, 4, 6, 8, 10, 11,
13, 15, 17, 19
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
3, 5, 7, 9, 12, 14, 16, 18
10
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2)
-
1, 10, 19
NOTES:
1. Each pin except VCC and GND will have a resistor of 10KΩ ± 5% for static burn-in
2. Each pin except VCC and GND will have a resistor of 680Ω ± 5% for dynamic burn-in
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
GROUND
VCC = 5V ± 0.5V
3, 5, 7, 9, 12, 14, 16, 18
10
1, 2, 4, 6, 8, 11, 13, 15, 17, 19, 20
NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing. Group
E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number
6
518889
HCTS240AMS
Intersil Space Level Product Flow - ‘MS’
Wafer Lot Acceptance (All Lots) Method 5007
(Includes SEM)
100% Interim Electrical Test 1 (T1)
GAMMA Radiation Verification (Each Wafer) Method 1019,
4 Samples/Wafer, 0 Rejects
100% Static Burn-In 2, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
100% Nondestructive Bond Pull, Method 2023
100% Interim Electrical Test 2 (T2)
Sample - Wire Bond Pull Monitor, Method 2011
100% Delta Calculation (T0-T2)
Sample - Die Shear Monitor, Method 2019 or 2027
100% PDA 1, Method 5004 (Notes 1and 2)
100% Internal Visual Inspection, Method 2010, Condition A
100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or
Equivalent, Method 1015
100% Delta Calculation (T0-T1)
100% Temperature Cycle, Method 1010, Condition C,
10 Cycles
100% Interim Electrical Test 3 (T3)
100% Constant Acceleration, Method 2001, Condition per
Method 5004
100% Delta Calculation (T0-T3)
100% PDA 2, Method 5004 (Note 2)
100% PIND, Method 2020, Condition A
100% Final Electrical Test
100% External Visual
100% Fine/Gross Leak, Method 1014
100% Serialization
100% Radiographic, Method 2012 (Note 3)
100% Initial Electrical Test (T0)
100% External Visual, Method 2009
100% Static Burn-In 1, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
Sample - Group A, Method 5005 (Note 4)
100% Data Package Generation (Note 5)
NOTES:
1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1.
2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the
failures from subgroup 7.
3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.
4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.
5. Data Package Contents:
• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number,
Quantity).
• Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage.
• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test
equipment, etc. Radiation Read and Record data on file at Intersil.
• X-Ray report and film. Includes penetrometer measurements.
• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).
• Lot Serial Number Sheet (Good units serial number and lot number).
• Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test.
• The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed
by an authorized Quality Representative.
Spec Number
7
518889
HCTS240AMS
Propagation Delay Timing Diagrams
Propagation Delay Load Circuit
DUT
TEST
POINT
VIH
VS
INPUT
CL
VSS
RL
TPLH
TPHL
VOH
CL = 50pF
VS
OUTPUT
RL = 500Ω
VOL
VOLTAGE LEVELS
PARAMETER
HCTS
UNITS
VCC
4.50
V
VIH
3.00
V
VS
1.30
V
VIL
0
V
GND
0
V
Three-State Low Timing Diagrams
Three-State Low Load Circuit
VCC
VIH
VS
INPUT
RL
VSS
TPZL
TEST
POINT
DUT
TPLZ
VOZ
CL
VT
VW
OUTPUT
VOL
CL = 50pF
RL = 500Ω
THREE-STATE LOW VOLTAGE LEVELS
PARAMETER
HCTS
UNITS
VCC
4.50
V
VIH
3.00
V
VS
1.30
V
VT
1.30
V
VW
0.90
V
0
V
GND
Spec Number
8
518889
HCTS240AMS
Three-State High Timing Diagrams
Three-State High Load Circuit
VIH
DUT
VS
TEST
POINT
INPUT
SS
CL
TPZH
RL
TPHZ
VOH
VT
VW
OUTPUT
CL = 50pF
VOZ
RL = 500Ω
THREE-STATE HIGH VOLTAGE LEVELS
PARAMETER
HCTS
UNITS
VCC
4.50
V
VIH
3.00
V
VS
1.30
V
VT
1.30
V
VW
3.60
V
0
V
GND
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
Spec Number
9
518889
HCTS240AMS
Die Characteristics
DIE DIMENSIONS:
106mils x 108mils
2.68mm x 2.74mm
METALLIZATION:
Type: SiAl
Metal Thickness: 11kÅ ± 1kÅ
GLASSIVATION:
Type: SiO2
Thickness: 13kÅ ± 2.6kÅ
WORST CASE CURRENT DENSITY:
<2.0 x 105A/cm2
BOND PAD SIZE:
100µm x 100µm
4 mils x 4 mils
Metallization Mask Layout
(20) VCC
(1) 1 OE
(2) 1 A0
(3) 2 Y3
(19) 2 OE
HCTS240AMS
(18) 1 Y0
1 A1 (4)
(17) 2 A3
2 Y2 (5)
(16) 1 Y1
1 A2 (6)
(15) 2 A2
2 Y1 (7)
2 A1 (13)
1 Y3 (12)
2 A0 (11)
GND (10)
2 Y0 (9)
1 A3 (8)
(14) 1 Y2
NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location.
The mask series for the HCTS240A is TA14400B.
Spec Number
10
518889
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