Intersil ICL232CBEZ 5v powered, dual rs-232 transmitter/receiver Datasheet

ICL232
®
Datasheet
July 28, 2005
FN3020.7
+5V Powered, Dual RS-232
Transmitter/Receiver
Features
The ICL232 is a dual RS-232 transmitter/receiver interface
circuit that meets all ElA RS-232C and V.28 specifications. It
requires a single +5V power supply, and features two
onboard charge pump voltage converters which generate
+10V and -10V supplies from the 5V supply.
• Requires Only Single +5V Power Supply
• Meets All RS-232C and V.28 Specifications
The drivers feature true TTL/CMOS input compatibility, slewrate-limited output, and 300Ω power-off source impedance.
The receivers can handle up to +30V, and have a 3kΩ to
7kΩ input impedance. The receivers also have hysteresis to
improve noise rejection.
Ordering Information
PART NUMBER
TEMP.
RANGE (oC)
PACKAGE
PKG.
DWG. #
ICL232CPE
0 to 70
16 Ld PDIP
E16.3
ICL232CBE
0 to 70
16 Ld SOIC
M16.3
16 Ld SOIC Tape and Reel
M16.3
ICL232CBET
ICL232CBEZ
(See Note)
ICL232CBEZT
(See Note)
0 to 70
16 Ld SOIC
(Pb-free)
M16.3
16 Ld SOIC Tape and Reel
(Pb-free)
M16.3
• Onboard Voltage Doubler/Inverter
• Low Power Consumption
• 2 Drivers
- ±9V Output Swing for +5V lnput
- 300Ω Power-off Source Impedance
- Output Current Limiting
- TTL/CMOS Compatible
- 30V/µs Maximum Slew Rate
• 2 Receivers
- ±30V Input Voltage Range
- 3kΩ to 7kΩ Input Impedance
- 0.5V Hysteresis to Improve Noise Rejection
• All Critical Parameters are Guaranteed Over the Entire
Commercial, Industrial and Military Temperature Ranges
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
ICL232lPE
-40 to 85
16 Ld PDIP
E16.3
ICL232lBE
-40 to 85
16 Ld SOIC
M16.3
16 Ld SOIC Tape and Reel
M16.3
• Any System Requiring RS-232 Communications Port
- Computer - Portable and Mainframe
- Peripheral - Printers and Terminals
- Portable Instrumentation
- Modems
F16.3
• Dataloggers
ICL232lBET
ICL232MJE
-55 to 125
16 Ld CERDIP
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Pinout
ICL232 (PDIP, CERDIP, SOIC)
TOP VIEW
C1+ 1
16 VCC
V+ 2
15 GND
C1- 3
14 T1OUT
C2+ 4
13 R1IN
C2- 5
12 R1OUT
V- 6
11 T1IN
T2OUT 7
10 T2IN
R2IN 8
1
9
R2OUT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2001, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ICL232
Functional Diagram
+5V
+
1.0µF
1
1µF
+
3
4
1µF
T1IN
T2IN
R1OUT
R2OUT
+
5
C1+
C1C2+
C2-
16
VCC
2
+5V TO 10V
VOLTAGE INVERTER V+
+10V TO -10V
VOLTAGE INVERTER
11
+5V
400kΩ
T1
10
+5V
400kΩ
T2
+
V- 6
+
14
7
12
13
R1
5kΩ
R2
5kΩ
9
1µF
8
1µF
T1OUT
T2OUT
R1IN
R2IN
15
2
FN3020.7
July 28, 2005
ICL232
Absolute Maximum Ratings
Thermal Information
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . (GND -0.3V) < VCC < 6V
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . (VCC -0.3V) < V+ < 12V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . -12V < V- < (GND +0.3V)
Input Voltages
T1IN , T2IN . . . . . . . . . . . . . . . . . . . .(V- -0.3V) < VIN < (V+ +0.3V)
R1IN , R2IN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30V
Output Voltages
T1OUT, T2OUT . . . . . . . . . . . . . (V- -0.3V) < VTXOUT < (V+ +0.3V)
R1OUT, R2OUT. . . . . . . . . (GND -0.3V) < VRXOUT < (VCC +0.3V)
Short Circuit Duration
T1OUT, T2OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
R1OUT, R2OUT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Thermal Resistance (Typical, Note 1)
θJA (oC/W) θJC (oC/W)
CERDIP Package . . . . . . . . . . . . . . . . .
80
18
PDIP Package. . . . . . . . . . . . . . . . . . . .
100
N/A
SOIC Package . . . . . . . . . . . . . . . . . . .
100
N/A
Maximum Junction Temperature
Plastic Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC
Ceramic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Ranges
ICL232C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
ICL232I. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
ICL232M. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Test Conditions: VCC = +5V
Otherwise Specified
Electrical Specifications
PARAMETER
±10%, TA = Operating Temperature Range. Test Circuit as in Figure 8 Unless
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Transmitter Output Voltage Swing, TOUT
T1OUT and T2OUT Loaded with 3kΩ to
Ground
±5
±9
±10
V
Power Supply Current, ICC
Outputs Unloaded, TA = 25oC
-
5
10
mA
TIN , Input Logic Low, VlL
-
-
0.8
V
TIN , Input Logic High, VlH
2.0
-
-
V
-
15
200
µA
-30
-
+30
V
Logic Pullup Current, IP
T1IN , T2IN = 0V
RS-232 Input Voltage Range, VIN
Receiver Input Impedance, RIN
VIN = ±3V
3.0
5.0
7.0
kΩ
Receiver Input Low Threshold, VlN (H-L)
VCC = 5V, TA = 25oC
VCC = 5V, TA = 25oC
0.8
1.2
-
V
-
1.7
2.4
V
0.2
0.5
1.0
V
Receiver Input High Threshold, VIN (L-H)
Receiver Input Hysteresis, VHYST
TTL/CMOS Receiver Output Voltage Low, VOL
IOUT = 3.2mA
-
0.1
0.4
V
TTL/CMOS Receiver Output Voltage High, VOH
IOUT = -1.0mA
3.5
4.6
-
V
Propagation Delay, tPD
RS-232 to TTL
-
0.5
-
µs
Instantaneous Slew Rate, SR
CL = 10pF, RL = 3kΩ, TA = 25oC
-
-
30
V/µs
Transition Region Slew Rate, SRT
RL = 3kΩ, CL = 2500pF Measured
from +3V to -3V or -3V to +3V
-
3
-
V/µs
Output Resistance, ROUT
VCC = V+ = V- = 0V, VOUT = ±2V
300
-
-
Ω
RS-232 Output Short Circuit Current, ISC
T1OUT or T2OUT Shorted to GND
-
±10
-
mA
(Notes 2, 3)
NOTES:
2. Guaranteed by design.
3. See Figure 4 for definition.
3
FN3020.7
July 28, 2005
ICL232
Test Circuits
-
1µF
C3
1µF
C1
+4.5V TO
+5.5V INPUT
+
+
-
1
C1+
VCC 16
2
V+
GND 15
3
1µF +
C2 -
3kΩ
T1OUT 14
C1-
T1 OUTPUT
RS-232
±30V INPUT
TTL/CMOS
OUTPUT
4
C2+
R1IN 13
5
C2-
R1OUT 12
6
V-
T1IN 11
TTL/CMOS
INPUT
7
T2OUT
T2IN 10
TTL/CMOS
INPUT
8
R2IN
9
TTL/CMOS
OUTPUT
1µF C4
-
+
3kΩ
T2 OUTPUT
RS-232
±30V INPUT
R2OUT
1
C1+
VCC 16
2
V+
GND 15
3
C1-
T1OUT 14
4
C2+
R1IN 13
5
C2-
R1OUT 12
6
V-
T1IN 11
7
T2OUT
T2IN 10
8
R2IN
R2OUT
ROUT = VIN/I
VIN = ±2V
9
T2OUT
A
T1OUT
FIGURE 1. GENERAL TEST CIRCUIT
FIGURE 2. POWER-OFF SOURCE RESISTANCE
CONFIGURATION
Typical Performance Curves
10
500
9
o
450 TA = 25 C
EXTERNAL SUPPLY LOAD
400 1kΩ BETWEEN V+ + GND
OR V- + GND
350 TRANSMITTER OUTPUT
V- SUPPLY
OUTPUT VOLTAGE (|V|)
V+, V- SUPPLY IMPEDANCES (Ω)
550
OPEN CIRCUIT
300
250
GUARANTEED
OPERATING
RANGE
V+ SUPPLY
V+ (VCC = 4.5V)
7
6
3
4
5
6
5
TA = 25oC
3
TRANSMITTER OUTPUTS
OPEN CIRCUIT
0
1
2
3
INPUT SUPPLY VOLTAGE VCC (V)
FIGURE 3. V+, V- OUTPUT IMPEDANCES vs VCC
V- (VCC = 5V)
V- (VCC = 4.5V)
4
200
150
V+ (VCC = 5V)
8
4
5
6
7
8
9
10
|ILOAD| (mA)
FIGURE 4. V+, V- OUTPUT VOLTAGES vs LOAD CURRENT
Pin Descriptions
PDIP, CERDIP
SOIC
PIN NAME
1
1
C1+
2
2
V+
Internally generated +10V (typical) supply.
3
3
C1-
External capacitor “-” for internal voltage doubler.
4
4
C2+
External capacitor “+” internal voltage inverter.
5
5
C2-
External capacitor “-” internal voltage inverter.
6
6
V-
7
7
T2OUT
8
8
R2IN
4
DESCRIPTION
External capacitor “+” for internal voltage doubler.
Internally generated -10V (typical) supply.
RS-232 Transmitter 2 output ±10V (typical).
RS-232 Receiver 2 input, with internal 5K pulldown resistor to GND.
FN3020.7
July 28, 2005
ICL232
Pin Descriptions
(Continued)
PDIP, CERDIP
SOIC
PIN NAME
DESCRIPTION
9
9
R2out
10
10
T2IN
Transmitter 2 TTL/CMOS input, with internal 400K pullup resistor to VCC .
11
11
T1IN
Transmitter 1 TTL/CMOS input, with internal 400K pullup resistor to VCC .
12
12
R1OUT
13
13
R1IN
14
14
T1OUT
15
15
GND
Supply Ground.
16
16
VCC
Positive Power Supply +5V ±10%
Receiver 2 TTL/CMOS output.
Receiver 1 TTL/CMOS output.
RS-232 Receiver 1 input, with internal 5K pulldown resistor to GND.
RS-232 Transmitter 1 output ±10V (typical).
VOLTAGE DOUBLER
C1+
S1
VOLTAGE INVERTER
S2
V+ = 2VCC
VCC
+
GND
C1-
S3
+
C1
S4
C2+
S5
GND
+
C3
VCC
S6
+
C2
-
C4
GND
C2-
S7
V- = -(V+)
S8
RC
OSCILLATOR
FIGURE 5. DUAL CHARGE PUMP
Detailed Description
The ICL232 is a dual RS-232 transmitter/receiver powered by
a single +5V power supply which meets all ElA RS232C
specifications and features low power consumption. The
functional diagram illustrates the major elements of the
ICL232. The circuit is divided into three sections: a voltage
doubler/inverter, dual transmitters, and dual receivers Voltage
Converter.
An equivalent circuit of the dual charge pump is illustrated in
Figure 5.
The voltage quadrupler contains two charge pumps which use
two phases of an internally generated clock to generate +10V
and -10V. The nominal clock frequency is 16kHz. During
phase one of the clock, capacitor C1 is charged to VCC .
During phase two, the voltage on C1 is added to VCC ,
producing a signal across C2 equal to twice VCC . At the same
time, C3 is also charged to 2VCC , and then during phase one,
it is inverted with respect to ground to produce a signal across
C4 equal to -2VCC . The voltage converter accepts input
voltages up to 5.5V. The output impedance of the doubler (V+)
is approximately 200Ω, and the output impedance of the
inverter (V-) is approximately 450Ω. Typical graphs are
presented which show the voltage converters output vs input
voltage and output voltages vs load characteristics. The test
circuit (Figure 3) uses 1µF capacitors for C1-C4, however, the
value is not critical. Increasing the values of C1 and C2 will
lower the output impedance of the voltage doubler and
inverter, and increasing the values of the reservoir capacitors,
C3 and C4, lowers the ripple on the V+ and V- supplies.
5
T1IN, T2IN
90%
10%
T1OUT, T2OUT
tf
VOH
tr
VOL
(0.8) (VOH - VOL)
(0.8) (VOL - VOH)
Instantaneous
=
or
Slew Rate (SR)
tr
tf
FIGURE 6. SLEW RATE DEFINITION
Transmitters
The transmitters are TTL/CMOS compatible inverters which
translate the inputs to RS-232 outputs. The input logic
threshold is about 26% of VCC , or 1.3V for VCC = 5V. A logic
1 at the input results in a voltage of between -5V and V- at the
output, and a logic 0 results in a voltage between +5V and (V+
- 0.6V). Each transmitter input has an internal 400kΩ pullup
resistor so any unused input can be left unconnected and its
output remains in its low state. The output voltage swing
meets the RS-232C specification of ±5V minimum with the
worst case conditions of: both transmitters driving 3kΩ
minimum load impedance, VCC = 4.5V, and maximum
allowable operating temperature. The transmitters have an
internally limited output slew rate which is less than 30V/µs.
The outputs are short circuit protected and can be shorted to
ground indefinitely. The powered down output impedance is a
FN3020.7
July 28, 2005
ICL232
minimum of 300Ω with ±2V applied to the outputs and VCC =
0V.
is generated by driving them through a 5kΩ resistor
connected to V+.
+5V
V+
VCC
400kΩ
300Ω
C1 +
1µF -
TXIN
TOUT
GND < TXIN < VCC
V- < VTOUT < V+
V-
FIGURE 7. TRANSMITTER
C2 +
1µF TD
Receivers
16
1
5kΩ
3
ICL232
6
4
5
T1
11
VCC
RXIN
-30V < RXIN < +30V
ROUT
5kΩ
GND < VROUT < VCC
GND
FIGURE 8. RECEIVER
INPUTS
RTS
OUTPUTS
12
TTL/CMOS RD
CTS
9
+
14
T2
10
The receiver inputs accept up to ±30V while presenting the
required 3kΩ to 7kΩ input impedance even it the power is off
(VCC = 0V). The receivers have a typical input threshold of
1.3V which is within the ±3V limits, known as the transition
region, of the RS-232 specification. The receiver output is
0V to VCC . The output will be low whenever the input is
greater than 2.4V and high whenever the input is floating or
driven between +0.8V and -30V. The receivers feature 0.5V
hysteresis to improve noise rejection.
- C3
+ 1µF
5kΩ
2
7
13
R2
R1
15
8
CTR (20) DATA
TERMINAL READY
DSRS (24) DATA
SIGNALING RATE
SELECT
C4
1µF RS-232
INPUTS AND OUTPUTS
TD (2) TRANSMIT DATA
RTS (4) REQUEST TO SEND
RD (3) RECEIVE DATA
CTS (5) CLEAR TO SEND
SIGNAL GROUND (7)
FIGURE 10. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS
HANDSHAKING
In applications requiring four RS-232 inputs and outputs
(Figure 11), note that each circuit requires two charge pump
capacitors (C1 and C2) but can share common reservoir
capacitors (C3 and C4). The benefit of sharing common
reservoir capacitors is the elimination of two capacitors and
the reduction of the charge pump source impedance which
effectively increases the output swing of the transmitters.
T1IN, T2IN
OR
R1IN, R2IN
T1OUT, T2OUT
OR
R1OUT, R2OUT
VOH
VOL
tPHL
tPLH
Average Propagation Delay =
tPHL + tPLH
2
FIGURE 9. PROPAGATION DELAY DEFINITION
Applications
The ICL232 may be used for all RS-232 data terminal and
communication links. It is particularly useful in applications
where ±12V power supplies are not available for
conventional RS-232 interface circuits. The applications
presented represent typical interface configurations.
A simple duplex RS-232 port with CTS/RTS handshaking is
illustrated in Figure 10. Fixed output signals such as DTR
(data terminal ready) and DSRS (data signaling rate select)
6
FN3020.7
July 28, 2005
ICL232
1
C1 +
1µF TD
INPUTS
OUTPUTS
TTL/CMOS
RTS
4
ICL232
3
T1
11
-
14
T2
10
+ C2
1µF
5
TD (2) TRANSMIT DATA
7
RTS (4) REQUEST TO SEND
13
12
RD (3) RECEIVE DATA
RD
9
CTS
R2
R1
8
CTS (5) CLEAR TO SEND
15
6
-
2
C3
+
+
C4
V- V+
2µF
6
-
2 µF
2
16
+5V
RS-232
INPUTS AND
OUTPUTS
ICL232
C1 +
1µF DTR
INPUTS
OUTPUTS
TTL/CMOS
DSRS
1
4
3
5
T1
11
14
T2
10
12
7
13
DCD
R1
9
R2
R1
15
8
+ C2
1µF
-
DTR (20) DATA TERMINAL
READY
DSRS (24) DATA SIGNALING
RATE SELECT
DCD (8) DATA CARRIER
DETECT
R1 (22) RING INDICATOR
SIGNAL GROUND (7)
FIGURE 11. COMBINING TWO ICL232s FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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7
FN3020.7
July 28, 2005
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