Revised February 2005 74ACTQ14 Quiet Series¥ Hex Inverter with Schmitt Trigger Input General Description Features The ACTQ14 contains six inverter gates each with a Schmitt trigger input. They are capable of transforming slowly changing input signals into sharply defined, jitterfree output signals. In addition, they have a greater noise margin than conventional inverters. ■ ICC reduced by 50% The ACTQ14 utilizes Fairchild Quiet Series¥ Technology to guarantee quiet output switching and improve dynamic threshold performance. FACT Quiet Series¥ features GTO¥ output control and undershoot corrector in addition to a split ground bus for superior performance. The ACTQ14 has hysteresis between the positive-going and negative-going input thresholds (typically 1.0V) which is determined internally by transistor ratios and is essentially insensitive to temperature and supply voltage variations. ■ Guaranteed pin-to-pin skew AC performance ■ Guaranteed simultaneous switching noise level and dynamic threshold performance ■ Improved latch-up immunity ■ Outputs source/sink 24 mA Ordering Code: Order Number Package Number 74ACTQ14SC 74ACTQ14MTC M14A MTC14 74ACTQ14PC Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Logic Symbol IEEE/IEC Function Table Pin Descriptions Pin Names Input Output A O L H H L Description In Inputs On Outputs Quiet Series¥, FACT Quiet Series¥ and GTO¥ are trademarks of Fairchild Semiconductor Corporation. © 2005 Fairchild Semiconductor Corporation DS010911 www.fairchildsemi.com 74ACTQ14 Quiet Series¥ Hex Inverter with Schmitt Trigger Input March 1991 74ACTQ14 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions 0.5V to 7.0V Supply Voltage (VCC ) DC Input Diode Current (IIK) VI VI 0.5V VCC 0.5V Supply Voltage (VCC) 20 mA 20 mA 0.5V to VCC 0.5V DC Input Voltage (VI) 4.5V to 5.5 Input Voltage (VI) 0V to VCC Output Voltage (VO) 0V to VCC 40qC to 85qC Operating Temperature (TA) DC Output Diode Current (IOK) VO VO 0.5V VCC 0.5V DC Output Voltage (VO) 20 mA 20 mA 0.5V to VCC 0.5V DC Output Source r 50 mA or Sink Current (IO) DC VCC or Ground Current per Output Pin (ICC or IGND ) Storage Temperature (TSTG) r 50 mA 65qC to 150qC Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside of databook specifications. DC Latch-Up Source r 300 mA or Sink Current Junction Temperature (TJ) 140qC PDIP DC Electrical Characteristics Symbol VIH VIL VOH VOL Parameter VCC TA 4.5 1.5 2.0 2.0 Input Voltage 5.5 1.5 2.0 2.0 Maximum LOW Level 4.5 1.5 0.8 0.8 Input Voltage 5.5 1.5 0.8 0.8 Guaranteed Limits Minimum HIGH Level 4.5 4.49 4.4 4.4 Output Voltage 5.5 5.49 5.4 5.4 V VOUT IOUT 50 PA VIN VIL or VIH 3.76 IOH 24 mA 4.76 IOH 24 mA (Note 2) IOUT 0.1 Output Voltage 5.5 0.001 0.1 0.1 0.36 0.44 5.5 0.36 0.44 5.5 r 0.1 r 1.0 4.5 1.4 1.4 5.5 1.6 1.6 4.5 0.4 0.4 5.5 0.5 0.5 Maximum Positive 4.5 2.0 2.0 Threshold 5.5 2.0 2.0 Minimum Negative 4.5 0.8 0.8 Threshold 5.5 0.8 0.8 V 50 PA VIN VIL or VIH V IOL 24 mA PA VI VCC, GND TA Worst Case TA Worst Case TA Worst Case TA Worst Case VCC 2.1V 24 mA (Note 2) IOL V V V V ICCT Maximum ICC/Input 5.5 1.5 mA VI Minimum Dynamic 5.5 75 mA VOLD IOHD Output Current (Note 3) 5.5 75 mA VOHD ICC Maximum Quiescent Supply Current 5.5 20.0 PA VIN Quiet Output Maximum Dynamic VOL VOLV Quiet Output Minimum Dynamic VOL www.fairchildsemi.com 0.6 V IOLD VOLP 0.1V or VCC 0.1V 4.86 0.1 Minimum Hysteresis V 0.1V or VCC 0.1V 3.86 0.001 Maximum Hysteresis V Conditions VOUT 5.5 4.5 Vh(max) Units 4.5 Maximum LOW Level Maximum Input Leakage Current Vt 40qC to 85qC Minimum HIGH Level IIN Vt TA Typ 4.5 Vh(min) 25qC (V) 2.0 5.0 1.1 1.5 V 5.0 0.6 1.2 V 2 1.65V Max 3.85V Min VCC or GND Figure 1, Figure 2 (Note 4)(Note 5) Figure 1, Figure 2 (Note 4)(Note 5) Symbol Parameter (Continued) VCC (V) TA 25qC TA Typ 40qC to 85qC Units Conditions Guaranteed Limits VIHD Minimum HIGH Level Dynamic Input Voltage 5.0 1.9 2.2 V (Note 4)(Note 6) VILD Maximum LOW Level Dynamic Input Voltage 5.0 1.2 0.8 V (Note 4)(Note 6) Note 2: All outputs loaded; thresholds on input associated with output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time. Note 4: DIP package. Note 5: Max number of outputs defined as (n). Data inputs are 0V to 3V. One output @ GND. Note 6: Max number of data inputs (n) switching. (n1) inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (VILD), 0V to threshold (VIHD), f 1 MHz. AC Electrical Characteristics Symbol tPLH Parameter Propagation Delay Data to Output tPHL Propagation Delay Data to Output tOSHL Output to Output tOSLH Skew (Note 8) VCC TA 25qC (V) CL 50 pF TA 40qC to 85qC CL 50 pF Units (Note 7) Min Typ Max Min Max 5.0 3.0 8.0 10.0 3.0 11.0 ns 5.0 3.0 8.0 10.0 3.0 11.0 ns 0.5 1.0 1.0 ns 5.0 Note 7: Voltage Range 5.0 is 5.0V r 0.5V. Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design. Capacitance Typ Units CIN Symbol Input Capacitance Parameter 4.5 pF VCC OPEN CPD Power Dissipation Capacitance 80 pF VCC 5.0V 3 Conditions www.fairchildsemi.com 74ACTQ14 DC Electrical Characteristics 74ACTQ14 FACT Noise Characteristics VOLP/VOLV and VOHP/VOHV: The setup of a noise characteristics measurement is critical to the accuracy and repeatability of the tests. The following is a brief description of the setup used to measure the noise characteristics of FACT. • Determine the quiet output pin that demonstrates the greatest noise levels. The worst case pin will usually be the furthest from the ground pin. Monitor the output voltages using a 50: coaxial cable plugged into a standard SMB type connector on the test fixture. Do not use an active FET probe. Equipment: Hewlett Packard Model 8180A Word Generator PC-163A Test Fixture • Measure VOLP and VOLV on the quiet output during the worst case transition for active and enable. Measure VOHP and VOHV on the quiet output during the worst case active and enable transition. • Verify that the GND reference recorded on the oscilloscope has not drifted to ensure the accuracy and repeatability of the measurements. VILD and VIHD: Tektronics Model 7854 Oscilloscope Procedure: 1. Verify Test Fixture Loading: Standard Load 50 pF, 500:. 2. Deskew the HFS generator so that no two channels have greater than 150 ps skew between them. This requires that the oscilloscope be deskewed first. It is important to deskew the HFS generator channels before testing. This will ensure that the outputs switch simultaneously. • Monitor one of the switching outputs using a 50: coaxial cable plugged into a standard SMB type connector on the test fixture. Do not use an active FET probe. 3. Terminate all inputs and outputs to ensure proper loading of the outputs and that the input levels are at the correct voltage. • First increase the input LOW voltage level, VIL, until the output begins to oscillate or steps out a min of 2 ns. Oscillation is defined as noise on the output LOW level that exceeds VIL limits, or on output HIGH levels that exceed VIH limits. The input LOW voltage level at which oscillation occurs is defined as VILD. 4. Set the HFS generator to toggle all but one output at a frequency of 1 MHz. Greater frequencies will increase DUT heating and effect the results of the measurement. • Next decrease the input HIGH voltage level, VIH, until the output begins to oscillate or steps out a min of 2 ns. Oscillation is defined as noise on the output LOW level that exceeds VIL limits, or on output HIGH levels that exceed VIH limits. The input HIGH voltage level at which oscillation occurs is defined as VIHD. • Verify that the GND reference recorded on the oscilloscope has not drifted to ensure the accuracy and repeatability of the measurements. VOHV and VOLP are measured with respect to ground reference. Input pulses have the following characteristics: f 3 ns, skew 150 ps. 1 MHz, tr 3 ns, tf FIGURE 1. Quiet Output Noise Voltage Waveforms 5. Set the HFS generator input levels at 0V LOW and 3V HIGH for ACT devices and 0V LOW and 5V HIGH for AC devices. Verify levels with an oscilloscope. FIGURE 2. Simultaneous Switching Test Circuit www.fairchildsemi.com 4 74ACTQ14 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A 5 www.fairchildsemi.com 74ACTQ14 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 www.fairchildsemi.com 6 74ACTQ14 Quiet Series¥ Hex Inverter with Schmitt Trigger Input Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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