TI BQ29400PWR Voltage protection for 2-, 3-, or 4-cell lion battery Datasheet

bq29400, bq29400A
bq29401, bq29405
www.ti.com
SLUS568B – JULY 2003 – REVISED NOVEMBER 2004
VOLTAGE PROTECTION ND
FOR 2-, 3-, OR 4-CELL Lion BATTERIES
(2 PROTECTION)
FEATURES
•
•
•
•
•
•
•
FUNCTION
2-, 3-, or 4-Cell Secondary Protection
Low Power Consumption ICC < 2 µA
[VCELL(ALL) < V(PROTECT)]
High Accuracy Over Sense Voltage:
– bq29400: 4.35 V ±25 mV
– bq29400A: 4.40 V ±25 mV
– bq29401: 4.45 V ±25 mV
– bq29405: 4.65 V ±25 mV
Prefixed Protection Threshold Voltage
Programmable Delay Time
High Power Supply Ripple Rejection
Stable During Pulse Charge Operation
Each cell in a multiple cell pack is compared to an
internal reference voltage. If one cell reaches an
overvoltage condition, the protection sequence begins. The bq2940x device starts charging an external
capacitor through the CD pin. When the CD pin
voltage reaches 1.2 V, the OUT pin changes from a
low level to a high level.
PW PACKAGE
(TOP VIEW)
1
2
3
4
VC1
VC2
VC3
GND
APPLICATIONS
•
8
7
6
5
OUT
VDD
CD
VC4
DCT PACKAGE
(TOP VIEW)
2nd Level Protection in Lion Battery Packs in
– Notebook PCs
– Portable Instrumentation
– Medical and Test Equipment
OUT
VDD
CD
1
8
2
7
3
6
VC1
VC2
VC3
VC4
4
5
GND
DESCRIPTION
The bq29400, bq29400A, bq29401, and bq29405 are
BiCMOS secondary protection ICs for 2-, 3-, or 4-cell
Lithium-Ion battery packs that incorporate a
high-accuracy precision over voltage detection circuit.
They include a programmable delay circuit for over
voltage detection time.
ORDERING INFORMATION
TA
–25°C to 85°C
(1)
V(PROTECT)
PACKAGE
MSOP (DTC)
SYMBOL
TSSOP (PW) (1)
SYMBOL
4.35 V
bq29400DCT3
CIQ
bq29400PW
2400
4.40 V
bq29400ADCT3
CIT
Not Available
-
4.45 V
bq29401DCT3
CIR
bq29401PW
2401
4.65 V
bq29405DCT3
CIS
Not Available
-
The bq29400, bq29400A, bq29401, and bq29405 are available taped and reeled. Add an R suffix to the device type (e.g.,
bq29400PWR) to order tape and reel version.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2004, Texas Instruments Incorporated
bq29400, bq29400A
bq29401, bq29405
www.ti.com
SLUS568B – JULY 2003 – REVISED NOVEMBER 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted (1) (2)
UNIT
Supply voltage range
Input voltage range
Output voltage range
(VDD)
-0.3 V to 28 V
(VC1, VC2, VC3, VC4)
-0.3 V to 28 V
(VC1 to VC2, VC2 to VC3, VC3 to VC4, VC4 to GND)
-0.3 V to 8 V
(OUT)
-0.3 V to 28 V
(CD)
-0.3 V to 28 V
Continuous total power dissipation
See Dissipation Rating Table
Storage temperature range, Tstg
-65°C to 150°C
Lead temperature (soldering, 10 sec)
(1)
300°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to ground of this device except the differential voltage of VC1-VC2, VC2-VC3, VC3-VC4 and VC4-GND.
(2)
PACKAGE DISSIPATION RATINGS
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
DCT
412 mW
3.3 mW/°C
264 mW
214 mW
PW
525 mW
4.2 mW/°C
336 mW
273 mW
RECOMMENDED OPERATING CONDITIONS
MIN
VDD
Supply Voltage
NOM MAX UNIT
4.0
25
VC1, VC2, VC3, VC4
0
VDD
VCn – VC(n+1), (n=1, 2, 3 ), VC4-GND
0
5.0
V
VI
Input voltage range
td(CD)
Delay time capacitance
RIN
Voltage-monitor filter resistance
100
1k
Ω
CIN
Voltage-monitor filter capacitance
0.01
0.1
µF
RVD
Supply-voltage filter resistance
CVD
Supply-voltage filter capacitance
TA
Operating ambient temperature range
2
0.22
0
µF
100
0.1
-25
V
Ω
µF
85
°C
bq29400, bq29400A
bq29401, bq29405
www.ti.com
SLUS568B – JULY 2003 – REVISED NOVEMBER 2004
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range, TA = 25°C (unless otherwise noted) (1)
PARAMETER
V(OA)
TEST CONDITION
Over voltage detection accuracy
TA = –20°C to 85°C
NOM MAX
25
35
25
50
bq29400
4.35
bq2940A
4.40
bq29401
4.45
bq29405
4.65
V(PROTECT)
Over voltage detection
voltage (1)
Vhys
Over voltage detection hysteresis (1)
II
Input current
V2, V3 , VC4 inputVC1 = VC2 = VC3 = VC4 = 3.5 V
(see Figure 1)
tD1
Over voltage detection delay time
CD = 0.22 µF
I(CD_dis)
CD GND clamp current
CD = 1 V
ICC
Supply current
V(OUT)
OUT pin drive voltage
VC1 = VC2 = VC3 = VC4 = 4.7 V, IOH = 0 mA
IOH
High-level output current
OUT = 3V, VC1 = VC2 = VC3 = VC4 = 4.7 V
IOL
Low-level output current
OUT = 0.1 V VC1 = VC3 = VC4 = 3.5 V
(1)
MIN
mV
±0.3
1.5
5
12
2.0
µA
S
µA
VC1 = VC2 = VC3 = VC4 = 3.5 V (see Figure 1)
2.0
3.0
VC1 = VC2 = VC3 = VC4 = 2.3 V (see Figure 1)
1.5
2.5
7
mV
V
300
1.0
UNIT
µA
V
–1
mA
5
µA
Levels of the over-voltage detection and the hysteresis can be adjusted. For assistance contact Texas Instruments sales representative.
ICC
IIN
IIN
1 VC1
OUT 8
2
VDD 7
3
4
VC2
VC3
CD
GND
VC4
6
5
IIN
Figure 1. ICC, IIN Measurement (TSSOP Package)
Terminal Functions
TERMINAL No.
DESCRIPTION
MSOP
(DTC)
TSSOP
(PW)
NAME
8
1
VC1
Sense voltage input for most positive cell
7
2
VC2
Sense voltage input for second most positive cell
6
3
VC3
Sense voltage input for third most positive cell
5
4
GND
Ground pin
4
5
VC4
Sense voltage input for least positive cell
3
6
CD
An external capacitor is connected to determine the programmable delay time
2
7
VDD
Power supply
1
8
OUT
Output
3
bq29400, bq29400A
bq29401, bq29405
www.ti.com
SLUS568B – JULY 2003 – REVISED NOVEMBER 2004
FUNCTIONAL BLOCK DIAGRAM
RVD
CVD
VDD
VC1
RIN
ICD = 0.18 µA (TYP)
CIN
RIN
VC2
CIN
OUT
VC3
RIN
CIN
1.2 V (TYP)
RIN
VC4
CIN
GND
CD
CDELAY
OVERVOLTAGE PROTECTION
When one of the cell voltages exceeds V(PROTECT), an internal current source begins to charge the capacitor,
C(DELAY), connected to the CD pin. If the voltage at the CD pin, VCD, reaches 1.2 V, the OUT pin is activated and
transitions high. An externally connected NCH FET is activiated and blows the external fuse in the positive
battery rail, see Figure 1.
If all cell voltages fall below V(PROTECT) before the voltage at pin CD reaches 1.2 V, the delay time does not run
out. An internal switch clamps the CD pin to GND and discharges the capacitor, C(DELAY), and secures the full
delay time for the next occurring overvoltage event.
Once the pin OUT is activated, it transitions back from high to low after all battery cells reach V(PROTECT) - Vhys.
DELAY TIME CALCULATION
The delay time is calculated as follows:
t d
C
1.2 V C(DELAY)
(DELAY)
I
CD
td ICD
1.2 V
Where I(CD) = CD current source = 0.18 µA
4
bq29400, bq29400A
bq29401, bq29405
www.ti.com
SLUS568B – JULY 2003 – REVISED NOVEMBER 2004
V(PROTECT)
V(PROTECT) - Vhys
Cell Voltage
(VCn - VC(n-1),
VC4 - GND)
1.2 V
CD
tDELAY
OUT
td = (1.2 V x CDELAY)/ICD
Figure 2. Timing for Overvoltage Sensing
5
bq29400, bq29400A
bq29401, bq29405
www.ti.com
SLUS568B – JULY 2003 – REVISED NOVEMBER 2004
APPLICATION INFORMATION
BATTERY CONNECTIONS
The following diagrams show the TSSOP package device in different cell configurations.
1 VC1
OUT 8
1 VC1
OUT 8
2 VC2
VDD 7
2 VC2
VDD 7
3 VC3
CD 6
3 VC3
CD 6
4 GND
VC4 5
4 GND
VC4 5
CDELAY
Figure 3. 4-Series Cell Configuration
Figure 4. 3-Series Cell Configuration
(Connect together VC1 and VC2)
1 VC1
OUT 8
2 VC2
VDD 7
3 VC3
CD 6
4 GND
VC4 5
CDELAY
Figure 5. 2-Series Cell Configuration (Connect together VC1, VC2, and VC3)
CELL CONNECTIONS
To prevent incorrect output activation the following connection sequences must be used.
4-Series Cell Configuration
• VC1(=VDD) → VC2 → VC3 → VC4 → GND or
• GND → VC4 → VC3 → VC2 → VC1(=VDD)
3-Series Cell Configuration
• VC1(=VC2=VDD) → VC3 → VC4 → GND or
• GND → VC4 → VC3 → VC1(=VC2=VDD)
2-Series Cell Configuration
• VC1(=VC2=VC3=VDD) → VC4 → GND or
• GND → VC4 → VC1(=VC2=VC3=VDD)
6
CDELAY
PACKAGE OPTION ADDENDUM
www.ti.com
18-Mar-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
BQ29400ADCT3
ACTIVE
SM8
DCT
8
3000
Pb-Free
(RoHS)
BQ29400ADCT3R
ACTIVE
SM8
DCT
8
3000
TBD
Call TI
BQ29400PW
ACTIVE
TSSOP
PW
8
150
TBD
CU NIPDAU
Level-1-220C-UNLIM
BQ29400PWR
ACTIVE
TSSOP
PW
8
2000
TBD
CU NIPDAU
Level-1-220C-UNLIM
Lead/Ball Finish
CU SNBI
MSL Peak Temp (3)
Level-1-250C-UNLIM
Call TI
BQ29401DCT
PREVIEW
SM8
DCT
8
TBD
Call TI
Call TI
BQ29401DCTR
PREVIEW
SM8
DCT
8
3000
TBD
Call TI
Call TI
BQ29401PW
ACTIVE
TSSOP
PW
8
150
TBD
CU NIPDAU
Level-1-220C-UNLIM
BQ29401PWR
ACTIVE
TSSOP
PW
8
2000
TBD
CU NIPDAU
Level-1-220C-UNLIM
BQ29405DCT3
ACTIVE
SM8
DCT
8
3000
Pb-Free
(RoHS)
CU SNBI
Level-1-250C-UNLIM
BQ29405DCT3R
PREVIEW
SM8
DCT
8
3000
TBD
Call TI
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
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Addendum-Page 1
MECHANICAL DATA
MPDS049B – MAY 1999 – REVISED OCTOBER 2002
DCT (R-PDSO-G8)
PLASTIC SMALL-OUTLINE PACKAGE
0,30
0,15
0,65
8
0,13 M
5
0,15 NOM
ÇÇÇÇÇ
ÇÇÇÇÇ
ÇÇÇÇÇ
ÇÇÇÇÇ
2,90
2,70
4,25
3,75
Gage Plane
PIN 1
INDEX AREA
1
0,25
4
0° – 8°
3,15
2,75
0,60
0,20
1,30 MAX
Seating Plane
0,10
0,10
0,00
NOTES: A.
B.
C.
D.
4188781/C 09/02
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion
Falls within JEDEC MO-187 variation DA.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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