LD39100 1 A, low quiescent current, low-noise voltage regulator Datasheet - production data Applications DFN6 (3x3 mm) Printers Game consoles Computer Consumer applications Automotive post regulation Features Description The LD39100 provides 1 A maximum current with an input voltage range from 1.5 V to 5.5 V and a typical dropout voltage of 200 mV. The device is stable with ceramic capacitors on the input and output. The ultra low drop voltage, low quiescent current and low-noise features make it suitable for low power battery-powered applications. Power supply rejection is 70 dB at low frequency and starts to roll off at 10 kHz. Enable logic control function puts the LD39100 in shutdown mode, allowing a total current consumption lower than 1 µA. The device also includes short-circuit constant current limiting and thermal protection. LD39100 is available also in AEC-Q100 qualified version, in the DFN6 (3x3 mm) with wettable flank package. Industrial & Automotive grade (AEC-Q100) Input voltage from 1.5 to 5.5 V Ultra low-dropout voltage (200 mV typ. at 1 A load) Very low quiescent current (20 µA typ. at no load, 200 µA typ. at 1 A load, 1 µA max. in off mode) Very low-noise with no bypass capacitor (30 µ VRMS at VOUT = 0.8 V) Output voltage tolerance: ± 2.0% @ 25 °C 1 A guaranteed output current Wide range of output voltages available on request: 0.8 V to 4.5 V with 100 mV step and adjustable from 0.8 V Logic-controlled electronic shutdown Stable with ceramic capacitors COUT = 1 µF Internal current and thermal limit DFN6 (3x3 mm) package Temperature range: - 40 °C to 125 °C June 2016 DocID15676 Rev 6 This is information on a product in full production. 1/27 www.st.com Contents LD39100 Contents 1 Circuit schematics........................................................................... 3 2 Pin configuration ............................................................................. 4 3 Maximum ratings ............................................................................. 5 4 5 Electrical characteristics ................................................................ 6 Typical performance characteristics ........................................... 10 6 Application information ................................................................ 15 7 6.1 Power dissipation ............................................................................ 16 6.2 Enable function ............................................................................... 17 6.3 Power Good function ....................................................................... 17 Package information ..................................................................... 18 7.1 DFN6 (3x3 mm) package information ............................................. 19 7.2 DFN6 (3x3 mm) package information (automotive-grade) .............. 21 7.3 DFN6 (3x3 mm) packing information ............................................... 23 8 Ordering information..................................................................... 25 9 Revision history ............................................................................ 26 2/27 DocID15676 Rev 6 LD39100 1 Circuit schematics Circuit schematics Figure 1: LD39100 schematic diagram (adjustable version) IN PG Power-good signal IN BandGap reference Current limit OpAmp OUT Thermal protection ADJ EN Internal enable GND GIPD010920151332MT Figure 2: LD39100 schematic diagram (fixed version) IN PG Power-good signal IN BandGap reference Current limit OpAmp OUT Thermal protection R1 NC EN R2 Internal enable GND GIPD010920151333MT DocID15676 Rev 6 3/27 Pin configuration 2 LD39100 Pin configuration Figure 3: Pin connection (top view) EN 1 6 VIN EN 1 6 VIN GND 2 5 NC GND 2 5 ADJ PG 3 4 VOUT PG 3 4 VOUT LD39100 (fixed version) LD39100 (adjustable version) GIPD010920151334MT Table 1: Pin description Pin Symbol LD39100 (adjustable version) (fixed version) EN 1 1 Enable pin logic input: low = shutdown, high = active GND 2 2 Common ground PG 3 3 Power Good VOUT 4 4 Output voltage ADJ 5 - Adjust pin VIN 6 6 LDO input voltage NC - 5 Not connected GND 4/27 Function LD39100 Exposed pad DocID15676 Rev 6 Exposed pad has to be connected to GND LD39100 3 Maximum ratings Maximum ratings Table 2: Absolute maximum ratings Symbol Parameter VIN DC input voltage Value Unit -0.3 to 7 V DC output voltage -0.3 to VIN + 0.3 (7 V max.) V EN Enable pin -0.3 to VIN + 0.3 (7 V max.) V PG Power Good pin -0.3 to 7 V ADJ Adjust pin 4 V IOUT Output current Internally limited PD Power dissipation Internally limited VOUT TSTG Storage temperature range - 65 to 150 °C TOP Operating junction temperature range - 40 to 125 °C Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All values are referred to GND. Table 3: Thermal data Symbol Parameter Value Unit RthJA Thermal resistance junction-ambient 55 °C/W RthJC Thermal resistance junction-case 10 °C/W Test conditions Value Unit HBM 4 kV MM 0.4 kV Table 4: ESD performance Symbol ESD Parameter ESD protection voltage DocID15676 Rev 6 5/27 Electrical characteristics 4 LD39100 Electrical characteristics TJ = 25 °C, VIN = 1.8 V, CIN = COUT = 1 µF, IOUT = 100 mA, VEN = VIN, unless otherwise specified. Table 5: LD39100 electrical characteristics (adjustable version) Symbol VIN VADJ IADJ ∆VOUT ∆VOUT ∆VOUT ∆VOUT VDROP eN SVR 6/27 Parameter Test conditions Operating input voltage VADJ accuracy Min. Typ. 1.5 Transient line regulation (1) Static load regulation V 800 816 IOUT = 10 mA -40 °C < TJ < 125 °C 776 800 824 mV 1 VOUT + 1 V ≤ VIN ≤ 5.5 V IOUT = 100 mA 0.01 ∆VIN = 500 mV IOUT = 100 mA tR = 5 µs 10 ∆VIN = 500 mV IOUT = 100 mA tF = 5 µs 10 IOUT = 10 mA to 1 A tR = 5 µs 40 IOUT = 1 A to 10 mA tF = 5 µs 40 Dropout voltage (2) IOUT = 1 A VO fixed to 1.5 V -40 °C < TJ < 125 °C 200 Output noise voltage 10 Hz to 100 kHz IOUT = 100 mA VOUT = 0.8 V 30 VIN = 1.8 V+/-VRIPPLE VRIPPLE = 0.25 V frequency = 1 kHz IOUT = 10 mA 70 VIN = 1.8 V+/-VRIPPLE VRIPPLE = 0.25 V frequency = 10 kHz IOUT = 100 mA 65 DocID15676 Rev 6 µA %/V mVpp 0.002 Supply voltage rejection VO = 0.8 V 5.5 784 IOUT = 10 mA to 1 A Transient load regulation (1) Unit IOUT = 10 mA TJ = 25 °C Adjust pin current Static line regulation Max. %/mA mVpp 400 mV µVRMS dB LD39100 Electrical characteristics Symbol Parameter Test conditions Min. IOUT = 0 mA Typ. Quiescent current 50 IOUT = 0 to 1 A 200 IOUT = 0 to 1 A -40 °C < TJ < 125 °C PG ISC Rising edge 0.92* VOUT Falling edge 0.8* VOUT Power good output threshold Short-circuit current RL = 0 Enable input logic low VEN 0.001 Isink = 6 mA open drain output Enable input logic high VIN = 1.5 V to 5.5 V -40 °C < TJ< 125 °C 0.9 30 Thermal shutdown 160 Hysteresis 20 Capacitance (see Section 5: "Typical performance characteristics") 0.1 1 V V Turn-on time (4) VEN = VIN V A 0.4 tON Output capacitor V 1.5 Enable pin input current COUT 1 0.4 IEN TSHDN µA 300 VIN input current in off mode: VEN = GND (3) Power good output voltage low Unit 20 IOUT = 0 mA -40 °C < TJ < 125 °C IQ Max. 100 nA µs °C µF Notes: (1)All transient values are guaranteed by design, not tested in production. (2)Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value. This specification does not apply to output voltages below 1.5 V. (3)PG pin floating. (4)Turn-on time is time measured between the enable input just exceeding V EN high value and the output voltage just reaching 95% of its nominal value. DocID15676 Rev 6 7/27 Electrical characteristics LD39100 TJ = 25 °C, VIN = VOUT(NOM) + 1 V, CIN = COUT = 1 µF, IOUT = 100 mA, VEN = VIN, unless otherwise specified. Table 6: LD39100 electrical characteristics (fixed version) Symbol VI VOUT Parameter Test conditions Max. Unit 1.5 5.5 V VOUT >1.5 V, IOUT = 10 mA TJ = 25 °C -2.0 2.0 VOUT > 1.5 V, IOUT = 10 mA -40 °C < TJ < 125 °C -3.0 Operating input voltage VOUT accuracy VOUT ≤ 1.5 V IOUT = 10 mA ∆VOUT ∆VOUT ∆VOUT ∆VOUT VDROP eN SVR 8/27 Static line regulation Transient line regulation (1) Static load regulation Min. Typ. % 3.0 ±20 VOUT ≤ 1.5 V IOUT = 10 mA -40 °C < TJ < 125 °C ±30 VOUT + 1 V ≤ VIN ≤ 5.5 V IOUT = 100 mA 0.01 mV ∆VIN = 500 mV IOUT = 100 mA tR = 5 µs 10 ∆VIN = 500 mV IOUT = 100 mA tF = 5 µs 10 mVpp IOUT = 10 mA to 1 A 0.002 IOUT = 10 mA to 1 A tR = 5 µs 40 IOUT = 1 A to 10 mA tF = 5 µs 40 Dropout voltage (2) IOUT = 1 A VOUT > 1.5 V -40 °C < TJ < 125 °C 200 Output noise voltage 10 Hz to 100 kHz IOUT = 100 mA VOUT = 2.5 V 85 VIN = VOUT(NOM)+0.5 V+/-VRIPPLE VRIPPLE = 0.1 V frequency = 1 kHz IOUT = 10 mA 65 VIN = VOUT(NOM)+0.5 V+/-VRIPPLE VRIPPLE = 0.1 V frequency = 10 kHz IOUT = 100 mA 62 Transient load regulation (1) Supply voltage rejection VOUT = 1.5 V DocID15676 Rev 6 %/V %/mA mVpp 400 mV µVRMS dB LD39100 Electrical characteristics Symbol Parameter Test conditions Min. IOUT = 0 mA Typ. Quiescent current 50 IOUT = 0 to 1 A 200 IOUT = 0 to 1 A -40 °C < TJ < 125 °C PG ISC VEN Power good output threshold 0.001 Rising edge 0.92* VOUT Falling edge 0.8* VOUT Isink = 6 mA open drain output Short-circuit current RL = 0 Enable input logic low Enable input logic high VIN = 1.5 V to 5.5 V -40 °C < TJ < 125 °C 0.9 30 Thermal shutdown 160 Hysteresis 20 Capacitance (see Section 5: "Typical performance characteristics") 0.1 1 V V Turn-on time (4) VEN = VIN V A 0.4 TON Output capacitor V 1.5 Enable pin input current COUT 1 0.4 IEN TSHDN µA 300 VIN input current in OFF mode: (3) VEN = GND Power good output voltage low Unit 20 IOUT = 0 mA -40 °C < TJ < 125 °C IQ Max. 100 nA µs °C µF Notes: (1)All transient values are guaranteed by design, not tested in production. (2)Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value. This specification does not apply to output voltages below 1.5 V. (3)PG pin floating. (4)Turn-on time is time measured between the enable input just exceeding VEN high value and the output voltage just reaching 95% of its nominal value. DocID15676 Rev 6 9/27 Typical performance characteristics 5 LD39100 Typical performance characteristics CIN = COUT = 1 µF 10/27 Figure 4: VADJ accuracy Figure 5: VOUT accuracy Figure 6: Dropout voltage vs. temperature (VOUT = 2.5 V) Figure 7: Dropout voltage vs. temperature (VOUT = 1.5 V) Figure 8: Dropout voltage vs. output current Figure 9: Short-circuit current vs. drop voltage DocID15676 Rev 6 LD39100 Typical performance characteristics Figure 10: Output voltage vs. input voltage (VOUT = 0.8 V) Figure 11: Output voltage vs. input voltage (VOUT = 2.5 V) 1.2 3 VIN from 0 to 5.5 V, VEN to VIN, VOUT = 0.8 V, IOUT = 1 A VIN from 0 to 5V, VEN to VIN, VOUT = 2.5 V, IOUT = 1A 2.5 0.8 125°C 2 V O UT [V] VOUT [V] 1 125°C 85°C 55°C 25°C 0°C -25°C -40°C 0.6 0.4 0.2 85°C 1.5 55°C 25°C 1 0°C -25°C 0.5 -40°C 0 0 0 0.5 1 1.5 2 2.5 3 3.5 VIN [V] 4 4.5 5 5.5 6 0 0.5 1 1.5 2 2.5 3 3.5 Figure 12: Quiescent current vs. temperature 5.5 6 0 .6 120 V IN = 3.5 V , V E N to G N D , V O U T = 2.5 V 0 .5 100 80 No Load 60 IOUT = 1 A 0 .4 Iq [µA] Iq [µA] 5 Figure 13: VIN input current in off mode vs. temperature 140 VIN = 1.8 V, VEN to VIN, VOUT = 2.5 V 0 -50 0 .3 0 .2 20 0 .1 -25 0 25 50 75 100 125 0 150 -5 0 T [°C] -2 5 0 25 50 10 0 125 15 0 GIPD020920151109MT Figure 14: Load regulation Figure 15: Line regulation VOUT = 0.8 V 0.015 V IN = 3.5 V, IOUT = from 10 mA to 1 A, V EN=V IN, V OUT = 2.5 V 0.01 0.04 0.03 0.02 0.01 0 -0.01 -0.02 -0.03 -0.04 -50 V IN = from 1.8 V to 5.5 V, IOUT = 100 m A, V EN = V IN , V OUT = 0.8 V Line [%/V] 0.005 0 -0.005 -0.01 -0.015 -50 75 T [°C ] GIPD020920151108MT Load [%/mA] 4.5 GIPD020920151107MT GIPD020920151106MT 40 4 VIN [V] -25 0 25 50 75 100 125 150 T [°C] -25 0 25 50 75 100 125 150 T [°C] GIPD020920151110MT DocID15676 Rev 6 GIPD020920151111MT 11/27 Typical performance characteristics 12/27 LD39100 Figure 16: Line regulation VOUT = 2.5 V Figure 17: Supply voltage rejection vs. temperature (VOUT = 0.8 V) Figure 18: Supply voltage rejection vs. temperature (VOUT = 2.5 V) Figure 19: Supply voltage rejection vs. frequency (VOUT = 0.8 V) Figure 20: Supply voltage rejection vs. frequency (VOUT = 2.5 V) Figure 21: Output noise voltage vs. frequency DocID15676 Rev 6 LD39100 Typical performance characteristics Figure 22: Enable voltage vs. temperature Figure 23: Load transient (IOUT = from 10 mA to 1 A) Figure 24: Load transient (VOUT = 0.8 V) Figure 25: Load transient (VOUT = 2.5 V) Figure 26: Load transient (IOUT = from 100 mA to 1 A) Figure 27: Line regulation transient DocID15676 Rev 6 13/27 Typical performance characteristics 14/27 LD39100 Figure 28: Start-up transient Figure 29: Enable transient Figure 30: ESR required for stability with ceramic capacitors (VOUT = 0.8 V) Figure 31: ESR required for stability with ceramic capacitors (VOUT = 2.5 V) DocID15676 Rev 6 LD39100 6 Application information Application information The LD39100 is an ultra low-dropout linear regulator. It provides up to 1 A with a low 200 mV dropout. The input voltage range is from 1.5 V to 5.5 V. The device is available in fixed and adjustable output versions. The regulator is equipped with internal protection circuitry, such as short-circuit current limiting and thermal protection. The regulator is stable with ceramic capacitors on the input and the output. Recommended values of the input and output ceramic capacitors are from 1 µF to 22 µF with 1 µF typical. The input capacitor has to be connected within 1 cm from VIN terminal. The output capacitor has also to be connected within 1 cm from output pin. There isn’t any upper limit to the value of the input capacitor. Figure 32: "Typical application circuit for fixed output version" and Figure 33: "Typical application circuit for adjustable version" illustrate the typical application schematics: Figure 32: Typical application circuit for fixed output version Figure 33: Typical application circuit for adjustable version DocID15676 Rev 6 15/27 Application information LD39100 Regarding the adjustable version, the output voltage can be adjusted from 0.8 V up to the input voltage, minus the voltage drop across the pass element (dropout voltage), by connecting a resistor divider between ADJ pin and the output, thus allowing remote voltage sensing. The resistor divider should be selected as follows: Equation 1 VOUT = VADJ (1 + R1 / R2) with VADJ = 0.8 V (typ.) Resistors should be used with values in the range from 10 kΩ to 50 kΩ. Lower values can also be suitable, but they increase current consumption. 6.1 Power dissipation An internal thermal feedback loop disables the output voltage if the die temperature rises to approximately 160 °C. This feature protects the device from excessive temperature and allows the user to push the limits of the power handling capability of a given circuit board without the risk of damaging the device. A good PC board layout should be used to maximize power dissipation. The thermal path for the heat generated by the device is from the die to the copper lead frame, through the package leads and exposed pad, to the PC board copper. The PC board copper acts as a heatsink. The footprint copper pads should be as wide as possible to spread and dissipate the heat to the surrounding ambient. Feed-through vias to the inner or backside copper layers are also useful to improve the overall thermal performance of the device. The device power dissipation depends on the input voltage, output voltage and output current, and is given by: Equation 2 PD = (VIN -VOUT) IOUT Junction temperature of the device is: Equation 3 TJ_MAX = TA + RthJA x PD where: TJ_MAX is the maximum junction of the die,125 °C TA is the ambient temperature RthJA is the thermal resistance junction-to-ambient 16/27 DocID15676 Rev 6 LD39100 Application information Figure 34: Power dissipation vs. ambient temperature 3.5 3 PD [W] 2.5 2 1.5 1 0.5 0 -50 -30 -10 10 30 50 70 90 110 130 TA [°C] GIPD040920151415MT 6.2 Enable function The LD39100 features the enable function. When EN voltage is higher than 0.9 V, the device is ON, and if it is lower than 0.4 V, the device is OFF. In shutdown mode, consumption is lower than 1 µA. EN pin has not an internal pull-up, so it cannot be left floating if it is not used. 6.3 Power Good function Some applications require a flag showing that the output voltage is in the correct range. Power Good threshold depends on the adjust voltage. When it is higher than 0.92*V ADJ, Power Good (PG) pin goes to high impedance. If it is below 0.80*VADJ PG pin goes to low impedance. If the device works well, Power Good pin is at high impedance. If the output voltage is fixed using an external or internal resistor divider, Power Good threshold is 0.92*VOUT. If the device is disabled (EN pin low) the PG signal is set to high impedance.This is done intentionally to avoid pull down current by the PG pin in disabled mode. Power Good function requires an external pull-up resistor, which has to be connected between PG pin and VIN or VOUT. PG pin typical current capability is up to 6 mA. A pull-up resistor for PG should be in the range from 100 kΩ to 1 MΩ. If Power Good function is not used, PG pin has to remain floating. DocID15676 Rev 6 17/27 Package information 7 LD39100 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 18/27 DocID15676 Rev 6 LD39100 7.1 Package information DFN6 (3x3 mm) package information Figure 35: DFN6 (3x3 mm) package outline DocID15676 Rev 6 19/27 Package information LD39100 Table 7: DFN6 (3x3 mm) mechanical data mm Dim. Min. A 0.80 A1 0 A3 0.23 D 2.90 D2 2.23 E 2.90 E2 1.50 e 1 0.02 0.05 0.45 3 3.10 2.50 3 3.10 1.75 0.95 0.30 0.40 Figure 36: DFN6 (3x3 mm) recommended footprint 20/27 Max. 0.20 b L Typ. DocID15676 Rev 6 0.50 LD39100 7.2 Package information DFN6 (3x3 mm) package information (automotive-grade) Figure 37: DFN6 (3x3 mm) automotive-grade package outline DocID15676 Rev 6 21/27 Package information LD39100 Table 8: DFN6 (3x3 mm) automotive-grade mechanical data mm Dim. Min. Typ. Max. A 0.80 0.85 0.90 A1 0.0 b 0.20 0.25 0.30 D 2.95 3.00 3.05 D2 2.30 2.40 2.50 E 2.95 3.00 3.05 E2 1.50 1.60 1.70 L 0.30 0.40 0.50 e 0.05 0.95 Figure 38: DFN6 (3x3 mm) automotive-grade recommended footprint 22/27 DocID15676 Rev 6 LD39100 7.3 Package information DFN6 (3x3 mm) packing information Figure 39: DFN6 (3x3 mm) tape outline DocID15676 Rev 6 23/27 Package information LD39100 Figure 40: DFN6 (3x3 mm) reel outline Table 9: DFN6 (3x3 mm) tape and reel mechanical data mm Dim. 24/27 Min. Typ. Max. A0 3.20 3.30 3.40 B0 3.20 3.30 3.40 K0 1 1.10 1.20 DocID15676 Rev 6 LD39100 8 Ordering information Ordering information Table 10: Order code Order code Output voltage Industrial grade Automotive grade (1) LD39100PUR LD39100PURY Adj. from 0.8 V LD39100PU12R LD39100PU12RY 1.2 V LD39100PU18R LD39100PU18RY 1.8 V LD39100PU25R LD39100PU25RY 2.5 V LD39100PU30R LD39100PU33R 3.0 V LD39100PU33RY 3.3 V Notes: (1)According to AEC-Q 100 level 1. DocID15676 Rev 6 25/27 Revision history 9 LD39100 Revision history Table 11: Document revision history Date Revision 29-Jul-2009 1 Initial release. 16-Apr-2010 2 Modified Figure 8 on page 9. 11-Oct-2011 3 Document status promoted from preliminary data to datasheet. 24-Apr-2014 4 Part numbers LD39100xx, LD39100xx12 and LD39100xx25 changed to LD39100. Updated Table 1: Device summary. Updated the description in cover page Section 1: Circuit schematics, Section 2: Pin configuration, Section 4: Electrical characteristics, Section 5: Typical performance characteristics, Figure 32: Typical application circuit for fixed output version, Section 7: Package mechanical data. Deleted previous Section 8: Different output voltage versions of the LD39100xx available on request. Added Section 8: Packaging mechanical data. Minor text changes. 01-Sep-2015 5 Updated Figure 32: Typical application circuit for fixed output version. Minor text changes. 6 Updated features in cover page. Removed Table 1: Device summary. Updated Section 6.2: "Enable function". Added Section 8: "Ordering information" and Section 7.1: "DFN6 (3x3 mm) package information". Minor text changes. 20-Jun-2016 26/27 Changes DocID15676 Rev 6 LD39100 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved DocID15676 Rev 6 27/27