MSK MSK4351D 50 amp, 500 volt igbt plus diode fully isolated smart power 3-phase motor drive power hybrid Datasheet

ISO-9001 CERTIFIED BY DSCC
M.S.KENNEDY CORP.
50 AMP, 500 VOLT IGBT PLUS DIODE
FULLY ISOLATED
SMART POWER 3-PHASE MOTOR
DRIVE POWER HYBRID
4351
4707 Dey Road Liverpool, N.Y. 13088
(315) 701-6751
FEATURES:
500V, 50 Amp Capability at 110°C
Fully Isolated Bridge
Ultra Low Thermal Resistance
Integral Free Wheeling Fast Recovery Epitaxial Diode (FRED)
Self-Contained, Smart Lowside/Highside Drive Circuitry and Isolated Supply
Adjustable Deadtime
Capable of Switching Frequencies to 20KHz
Isolated Case Allows Direct Heat Sinking; On Board Temp Sensor
Case Bolt-down Design Allows Superior Heat Dissipation
MIL-PRF-38534 CERTIFIED
DESCRIPTION:
The MSK 4351 is a 50 Amp, 3 Phase Isolated Bridge Smart Power Motor Drive Hybrid with a 500 volt rating. The output
switches are Insulated Gate Bipolar Transistors (IGBT's) tailored for high switching speeds. The free-wheeling diodes are Fast
Recovery Epitaxial Diodes (FRED's) to provide matched current capabilities with the IGBT's and are specified with excellent reverse
recovery times at high current ratings. The bridge is optically isolated from the control circuitry. This new smart power motor drive
hybrid is compatible with 5v CMOS or TTL logic levels. The internal circuitry prevents simultaneous turn-on of the in-line half bridge
transistors with adjustable deadtime to prevent shoot-through. Undervoltage lockout shuts down the bridge when the supply voltage
gets to a point of incomplete turn-on of the output switches. The isolated internal high-side power supply derived from the +15 volt
supply completely eliminates the need for 3 floating independent power supplies for the high-side drive.
EQUIVALENT SCHEMATIC
PIN-OUT INFORMATION
TYPICAL APPLICATIONS
1
2
3
4
5
6
7
8
9
10
11
12
3 PHASE SIX STEP DC BRUSHLESS MOTOR DRIVE
OR 3 PHASE SINUSOIDAL INDUCTION MOTOR DRIVE
1
+15V
GND
AHI
ALO
BHI
BLO
+15V
GND
CHI
CLO
+15V
GND
13
14
15
16
17
18
19
20
21
22
23
24
RESET
R/C
+15V
N/C
OSCOUT
GND
N/C
N/C
N/C
N/C
N/C
TEMP SENSE
25
26
27
28
29
30
31
32
33
34
35
36
RKELVIN+
RKELVINRSENSERSENSERSENSE+
RSENSE+
CVCVCØ
CØ
CV+
CV+
37
38
39
40
41
42
43
44
45
46
47
48
BVBVBØ
BØ
BV+
BV+
AVAVAØ
AØ
AV+
AV+
PRELIMINARY Rev. A 11/01
ABSOLUTE MAXIMUM RATING
High Voltage Supply
Logic Supply
Continuous Output Current
Peak Output Current (1 pulse, 10µSec)
Thermal Resistance
V+
VCC
IOUT
IPK
θJC
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(Output Switches) (Junction to Case)
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500V
18V
50A
60A
0.38°C/W
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TST
TLD
TC
Storage Temperature Range -65°C to +150°C
Lead Temperature Range(10 Seconds)
300°C
Case Operating Temperature
MSK4351
-40°C to +85°C
MSK4351H/E
-55°C to +125°C
Junction Temperature
+150°C
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ELECTRICAL SPECIFICATIONS
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TJ
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All Ratings: Tc = +25°C Unless Otherwise Specified
Group A
Test Conditions
Parameters
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Subgroup
MSK 4351H/E
MSK 4351
3
2
5
Min.
Typ.
Max.
Min.
Typ.
1
-
-
2.2
-
-
2.3
V
2
-
-
2.1
-
-
-
V
3
-
-
TBD
-
-
-
V
1
-
-
1.8
-
-
1.8
V
2
-
-
1.5
-
-
-
V
3
-
-
2.5
-
-
-
V
ID=50A,di/dt=100A/uS,V r=350V
-
-
-
180
-
-
180
nS
V+=500V
1
-
-
400
-
-
400
uA
V+=400V
2
-
-
1.5
-
-
-
mA
V+=500V
3
-
-
400
-
-
-
uA
VCC=15V
1
-
-
TBD
-
-
TBD
mA
2
-
-
-
mA
3
-
-
TBD
-
-
-
mA
1,2,3
2.2
-
-
2.2
-
-
V
1,2,3
-
-
0.8
-
-
0.8
V
Turn-On Propagation Delay
4
-
-
TBD
-
-
TBD
nS
Turn-Off Propagation Delay
4
-
-
TBD
-
-
TBD
nS
Turn-On
4
-
-
45
-
-
45
nS
Turn-Off
4
-
-
350
-
-
350
nS
Turn-On Propagation Delay
4
-
-
TBD
-
-
TBD
nS
Turn-Off Propagation Delay
4
-
-
TBD
-
-
TBD
nS
Turn-On
4
-
-
45
-
-
45
nS
Turn-OffV+=270V, IC=50A
4
-
-
350
-
-
350
nS
T C=25°C
1
-
±0.5
±2.0
-
±0.5
±3.0
°C
TMIN ≤ TC ≤ TMAX
2,3
-
±1.3
±4.0
-
±1.3
±5.0
°C
Max. UNITS
OUTPUT CHARACTERISTICS
IC=50A
VC-E On Voltage (Each IGBT)
Instantaneous Forward Voltage
ID=50A
(FRED Flyback Diode)
Reverse Recovery Time
1
Leakage Current
BIAS SUPPLY CHARACTERISTICS
Quiescent Bias Current
TBD
-
-
INPUT SIGNALS CHARACTERISTICS
Positive Trigger Threshold Voltage
Negative Trigger Threshold Voltage
SWITCHING CHARACTERISTICS
1
V+=270V, IC=50A
Upper Drive:
Lower Drive:
V+=270V, IC=50A
TEMPERATURE SENSOR
Initial Accuracy
Overall Accuracy
1
NOTES:
1
2
3
4
5
Guaranteed by design but not tested. Typical parameters are representative of actual device performance but are for reference only.
Industrial grade and "E" suffix devices shall be tested to subgroups 1 and 4 unless otherwise specified.
Military grade devices ("H" suffix) shall be 100% tested to subgroups 1,2,3 and 4.
Subgroups 5 and 6 testing available upon request.
Subgroup 1,4 TA=TC=+25°C
2,5 TA=TC=+125°C
3,6 TA=TC=-55°C
2
PRELIMINARY Rev. A
11/01
APPLICATION NOTES
RSENSE+ - is the pin for connecting to the internal sense resistor.
It has a value of 0.003 ohms, 20 watts. AV-,BV- and CV- should
connect to this point for sensing the current at the bottom of the
bridge.
MSK4351 PIN DESCRIPTION
+15V - is the low voltage supply for all the internal logic and
isolated supplies which provide power to the gate drivers. A
0.1µF ceramic capacitor in parallel with a 22µF tantalum capacitor is recommended for bypassing the low voltage supply to
GND.
RSENSE- - is the pin for connecting the internal sense resistor to
the high voltage return.
GND - is the low voltage supply return for the +15V. All
bypassing of the +15V should return here. Since the output
section of the hybrid is completely isolated, there are no restrictions for potential differences between this GND and any hivoltage returns, up to 500V.
RKELVIN+ - is the pin for connecting to the sense resistor +KELVIN
connection. This is on the same side of the resistor as RSENSE+.
RKELVIN- - is the pin for connecting to the sense resistor -KELVIN
connection. This is on the same side of the resistor as RSENSE-.
AHI,BHI,CHI - are the logic inputs for controlling the switching
of the corresponding hi-side bridge outputs. A logic high will
turn on the corresponding hi-side output. The input levels are
5V CMOS or TTL compatible. If one of these inputs are active
at the same time as the corresponding low-side bridge outputs,
neither output will be allowed to turn on until one of the inputs
is switched low. There will be a deadtime inserted before the
corresponding bridge output is switched in all cases. This prevents simultaneous conduction of the output, shorting high
voltage supply and destroying the bridge.
DEADTIME SELECTION
The amount of deadtime required is based on the propagation
delay of the input to actual completion of switching of the output
transistors. Not taking all this into account can possibly allow the
opposite transistor in a half bridge to turn on before the active
transistor can turn off. Excessive current will flow through the
half bridge because this creates a momentary short across the
power supply.
Once all these factors are taken into account, the deadtime can be
determined. Allow sufficient safety factor for changes in components over temperature, and variations from system to system in
production.
ALO,BLO,CLO - are the logic inputs for controlling the switching
of the corresponding low-side bridge outputs. A logic high will
turn on the corresponding low-side output. The input levels are
5V CMOS or TTL compatible. If one of these inputs are active
at the same time as the corresponding hi-side bridge outputs,
neither output will be allowed to turn on until one of the inputs
is switched low. There will be a deadtime inserted before the
corresponding bridge output is switched in all cases. This prevents simultaneous conduction of the output, shorting the high
voltage supply and destroying the bridge.
Deadtime is exactly 8 R/C clock periods. Use the formula:
Max. Clock = 8/Min. Deadtime
RESET - is an active low logic input for causing all switching to
cease. The input level is 5V CMOS or TTL compatible. Upon
releasing RESET, the outputs will resume after the dead time.
R/C - is the input pin for setting the deadtime of the bridge.
Connecting a resistor between this input and OSC OUT, and a
capacitor to ground will create the time for an internal oscillator.
For clock operation below 1MHz:
OSC OUT - is a pin that brings the deadtime oscillator out to be
connected through the timing resistor to R/C. This is not an
output to be used externally, but just for the timing circuit.
For clock operation above 1MHz:
Clock Frequency =
Clock Frequency =
AV+,BV+,CV+ - are pins for connecting the tops of each half
bridge to the high voltage supply. Each pin must be connected
individually, as there is no internal connection across the three
half bridges. Proper power supply bypassing must be connected
to these pins and the V- pins as close to the hybrid as possible
for proper filtering.
0.95
COSC x ROSC
0.95
COSC (ROSC + 30) + 3x 10 8
As an alternative, the R/C pin can be driven directly with an HCMOS
compatible clock up to 24MHz.
AV-,BV-,CV- - are pins for connecting the bottoms of each half
bridge to the high voltage supply return. Each pin must be
connected individually, as there is no internal connection across
the three half bridges. Proper power supply bypassing must be
connected to these pins and the V+ pins as close to the hybrid
as possible for proper filtering.
AØ, BØ, CØ - are the pins connecting the 3 phase bridge switch
outputs.
TEMP SENSE - is a pin for measuring the output of a temperature sensor IC. The case temperature is depicted as a voltage
corresponding to 10mV/°C with 0 volts equating to absolute
zero, 0°K or -273°C.
3
PRELIMINARY Rev. A
11/01
TYPICAL PERFORMANCE CURVES
4
PRELIMINARY Rev. A 11/01
TYPICAL SYSTEM OPERATION
The MSK4351 is designed to be used with a +270 volt high voltage bus, +15 volt low power bus, and +5 volt logic signals.
Proper derating should be applied when designing the MSK4351 into a system. High frequency layout techniques with ground
planes on a printed circuit board is the only method that should be used for circuit construction. This will prevent pulse jitter caused
by excessive noise pickup on the current sense signal or the error amp signal.
Ground planes for the low power circuitry and high power circuitry should be kept separate. The two sections of the hybrid are
completely isolated, and can float relative to each other without referencing one to the other. An RC filter will filter out the current
spikes and keep the detected noise for that circuit down to a minimum.
The logic signals coming from the typical motor controller IC are set up for driving N channel low side and P channel high side
switches directly, and are usually 15 volt levels. Provision should be made for getting 5 volt logic signals to the MSK4351 of the
correct assertion levels. Typically, the low side signals out of the controller are high active and the high side are low active.
Inverters are shown in the system schematic for the high side controller output.
5
PRELIMINARY Rev. A
11/01
MECHANICAL SPECIFICATIONS
ALL DIMENSIONS ARE ±0.010 INCHES UNLESS OTHERWISE LABELED
ORDERING INFORMATION
MSK4351 H U
LEAD CONFIGURATION
S=STRAIGHT, U=BENT UP, D=BENT DOWN
SCREENING
BLANK=INDUSTRIAL; E=EXTENDED RELIABILITY;
H=CLASS H (MIL-PRF-38534)
GENERAL PART NUMBER
THE ABOVE EXAMPLE IS A MILITARY GRADE HYBRID WITH LEADS BENT UP.
M.S. Kennedy Corp.
4707 Dey Road Liverpool, New York 13088
Phone (315) 701-6751
FAX (315) 701-6752
www.mskennedy.com
The information contained herein is believed to be accurate at the time of printing. MSK reserves the right to make
changes to its products or specifications without notice, however, and assumes no liability for the use of its products.
Please visit our website for the most recent revision of this datasheet.
6
PRELIMINARY Rev. A
11/01
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