ONSEMI UESD6.0DT5G

ESD3.3DT5G SERIES
ESD Protection Diodes
In Ultra Small SOT−723 Package
The ESD Series is designed to protect voltage sensitive components
from ESD. Excellent clamping capability, low leakage, and fast response
time, make these parts ideal for ESD protection on designs where board
space is at a premium. Because of its small size, it is suited for use in
cellular phones, portable devices, digital cameras, power supplies and
many other portable applications.
PIN 1. CATHODE
2. CATHODE
3. ANODE
Specification Features:
• Small Body Outline Dimensions:
•
•
•
•
•
•
•
•
http://onsemi.com
0.047″ x 0.032″ (1.20 mm x 0.80 mm)
Low Body Height: 0.020″ (0.5 mm)
Stand−off Voltage: 3.3 V − 6.0 V
Low Leakage
Response Time is Typically < 1 ns
ESD Rating of Class 3 (> 16 kV) per Human Body Model
IEC61000−4−2 Level 4 ESD Protection
IEC61000−4−4 Level 4 EFT Protection
These are Pb−Free Devices
3
1
2
SOT−723
CASE 631AA
STYLE 4
Epoxy Meets UL 94 V−0
LEAD FINISH: 100% Matte Sn (Tin)
MOUNTING POSITION: Any
xx M
xx
M
= Device Code
= Date Code
ORDERING INFORMATION
Device
QUALIFIED MAX REFLOW TEMPERATURE: 260°C
ESDxxDT5G
Device Meets MSL 1 Requirements
MAXIMUM RATINGS
Rating
3
2
MARKING
DIAGRAM
Mechanical Characteristics:
CASE: Void-free, transfer-molded, thermosetting plastic
IEC 61000−4−2 (ESD)
1
Symbol
Air
Contact
Value
Unit
±30
±30
kV
Package
Shipping†
SOT−723
8000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
IEC 61000−4−4 (EFT)
40
A
DEVICE MARKING INFORMATION
ESD Voltage
16
400
kV
V
See specific marking information in the device marking
column of the table on page 2 of this data sheet.
240
1.9
525
mW
mW/°C
°C/W
Per Human Body Model
Per Machine Model

PD
Total Power Dissipation on FR−5 Board
(Note 1) @ TA = 25°C
Derate above 25°C
Thermal Resistance Junction−to−Ambient
RJA
Junction and Storage Temperature Range
TJ, Tstg
−55 to
+150
°C
TL
260
°C
Lead Solder Temperature − Maximum
(10 Second Duration)
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. FR−5 = 1.0 x 0.75 x 0.62 in.
 Semiconductor Components Industries, LLC, 2005
April, 2005 − Rev. 0
1
Publication Order Number:
ESD3.3DT5G/D
ESD3.3DT5G SERIES
ELECTRICAL CHARACTERISTICS
I
(TA = 25°C unless otherwise noted)
IPP
Maximum Reverse Peak Pulse Current
VC
Clamping Voltage @ IPP
VRWM
IR
VBR
Working Peak Reverse Voltage
VC VBR VRWM
Maximum Reverse Leakage Current @ VRWM
Test Current
IF
Forward Current
VF
Forward Voltage @ IF
Ppk
Peak Power Dissipation
V
IR VF
IT
Breakdown Voltage @ IT
IT
C
IF
Parameter
Symbol
IPP
Max. Capacitance @VR = 0 and f = 1 MHz
Uni−Directional TVS
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted, VF = 0.9 V Max. @ IF = 10 mA for all types)
Device
Marking
VRWM (V)
IR (A) @ VRWM
VBR (V) @ IT
(Note 2)
IT
C (pF)
Max
Max
Min
mA
Typ
ESD3.3DT5G
L0
3.3
1.0
5.0
1.0
47
ESD5.0DT5G
L2
5.0
0.1
6.2
1.0
38
ESD6.0DT5G
L3
6.0
0.1
7.0
1.0
34
Device*
*Other voltages available upon request.
2. VBR is measured with a pulse test current IT at an ambient temperature of 25°C.
http://onsemi.com
2
ESD3.3DT5G SERIES
7.4
20
7.3
18
7.2
16
7.1
14
ESDxxDT5G
7.0
IR (nA)
BREAKDOWN VOLTAGE (VOLTS) (VZ @ IZ)
TYPICAL CHARACTERISTICS
6.9
6.8
12
10
8
6.7
6.6
6
6.5
4
ESDxxDT5G
6.4
2
6.3
−55
0
−55
+ 150
+ 25
TEMPERATURE (°C)
Figure 1. Typical Breakdown Voltage
versus Temperature
+ 150
Figure 2. Typical Leakage Current
versus Temperature
45
PD, POWER DISSIPATION (mW)
300
40
CAPACITANCE (pF)
+ 25
TEMPERATURE (°C)
35
30
ESDxxDT5G
25
20
15
10
5
0
0
1
2
3
4
250
200
150
100
FR−5 BOARD
50
0
5
0
BIAS VOLTAGE (V)
Figure 3. Typical Capacitance versus Bias Voltage
25
50
75
100
125
TEMPERATURE (°C)
150
175
Figure 4. Steady State Power Derating Curve
http://onsemi.com
3
ESD3.3DT5G SERIES
PACKAGE DIMENSIONS
SOT−723
CASE 631AA−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
−X−
D
A
b1
−Y−
3
E
1
e
HE
L
2
b 2X
0.08 (0.0032) X Y
DIM
A
b
b1
C
D
E
e
HE
L
C
MILLIMETERS
MIN
NOM
MAX
0.45
0.50
0.55
0.15
0.20
0.27
0.25
0.3
0.35
0.07
0.12
0.17
1.15
1.20
1.25
0.75
0.80
0.85
0.40 BSC
1.15
1.20
1.25
0.15
0.20
0.25
INCHES
MIN
NOM
MAX
0.018 0.020 0.022
0.0059 0.0079 0.0106
0.010 0.012 0.014
0.0028 0.0047 0.0067
0.045 0.047 0.049
0.03 0.032 0.034
0.016 BSC
0.045 0.047 0.049
0.0059 0.0079 0.0098
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. ANODE
SOLDER FOOTPRINT*
0.40
0.0157
0.40
0.0157
1.0
0.039
0.40
0.0157
0.40
0.0157
0.40
0.0157
SCALE 20:1
mm inches
SOT−723
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
http://onsemi.com
4
For additional information, please contact your
local Sales Representative.
ESD3.3DT5G/D