AOSMD AOD606 Complementary enhancement mode field effect transistor Datasheet

AOD606
Complementary Enhancement Mode Field Effect Transistor
General Description
Features
The AOD606 uses advanced trench
technology MOSFETs to provide
excellent RDS(ON) and low gate charge.
The complementary MOSFETs may be
used in H-bridge, Inverters and other
applications.
n-channel
p-channel
-40V
VDS (V) = 40V
-8A (VGS = -10V)
ID = 8A (VGS=10V)
RDS(ON)
RDS(ON)
< 33 mΩ (VGS=10V)
< 50 mΩ (VGS = -10V)
< 47 mΩ (VGS=4.5V)
< 70 mΩ (VGS = -4.5V)
-RoHS Compliant
-Halogen Free*
Top View
100% UIS Tested!
TO-252-4L
D-PAK
Bottom View
D
D1/D2
G1
G2
S1
G2
S1 G1
S2
D1/D2
S2
n-channel
p-channel
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Max n-channel
Symbol
VDS
40
Drain-Source Voltage
VGS
Gate-Source Voltage
±20
Continuous Drain
G
Current
Pulsed Drain Current
Avalanche Current
TC=100°C
C
Repetitive avalanche energy L=0.3mH
Power Dissipation
B
Power Dissipation
A
C
TC=25°C
TC=100°C
TA=25°C
TA=70°C
±20
V
-8
ID
IDM
6.3
-6.3
30
-30
IAR
12
14
A
EAR
21.6
29.4
mJ
20
30
10
15
1.6
1.7
1
1.1
-55 to 175
-55 to 175
PD
PDSM
TJ, TSTG
Junction and Storage Temperature Range
Thermal Characteristics: n-channel and p-channel
Parameter
A
t ≤ 10s
Maximum Junction-to-Ambient
A
Steady-State
Maximum Junction-to-Ambient
Steady-State
Maximum Junction-to-Case B
A
t ≤ 10s
Maximum Junction-to-Ambient
A
Steady-State
Maximum Junction-to-Ambient
B
Steady-State
Maximum Junction-to-Case
Alpha & Omega Semiconductor, Ltd.
Units
V
8
TC=25°C
C
Max p-channel
-40
Symbol
RθJA
RθJC
RθJA
RθJC
A
W
W
°C
Device
n-ch
n-ch
n-ch
Typ
25
66
7
Max
30
80
7.5
°C/W
°C/W
°C/W
p-ch
p-ch
p-ch
17
60
4
25
75
5
°C/W
°C/W
°C/W
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AOD606
N-Channel MOSFET Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
Conditions
Min
ID=10mA, VGS=0V
IGSS
Gate-Body leakage current
VDS=0V, VGS=±20V
VGS(th)
Gate Threshold Voltage
VDS=VGS, ID=250µA
1.5
ID(ON)
On state drain current
VGS=10V, VDS=5V
30
TJ=55°C
VGS=10V, ID=8A
TJ=125°C
VGS=4.5V, ID=6A
Units
V
1
Zero Gate Voltage Drain Current
Static Drain-Source On-Resistance
Max
40
VDS=32V, VGS=0V
IDSS
RDS(ON)
Typ
5
µA
100
nA
2.3
3
V
27
33
39
52
37
47
mΩ
1
V
A
gFS
Forward Transconductance
VDS=5V, ID=8A
25
VSD
Diode Forward Voltage
IS=1A, VGS=0V
0.76
mΩ
S
IS
Maximum Body-Diode Continuous Current
8
A
ISM
Pulsed Body-Diode CurrentC
30
A
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
404
pF
VGS=0V, VDS=20V, f=1MHz
95
pF
37
pF
VGS=0V, VDS=0V, f=1MHz
2.7
Ω
9.2
nC
4.5
nC
1.6
nC
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
Qg(4.5V) Total Gate Charge
VGS=10V, VDS=20V, ID=8A
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
2.6
nC
tD(on)
Turn-On DelayTime
3.5
ns
tr
Turn-On Rise Time
6
ns
tD(off)
Turn-Off DelayTime
tf
trr
Turn-Off Fall Time
Body Diode Reverse Recovery Time
Qrr
VGS=10V, VDS=20V, RL=2.5Ω,
RGEN=3Ω
13.2
ns
3.5
ns
IF=8A, dI/dt=100A/µs
22.9
Body Diode Reverse Recovery Charge IF=8A, dI/dt=100A/µs
18.3
ns
nC
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allow s it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=175°C.
G. The maximum current rating is limited by bond-wires.
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The SOA
curve provides a single pulse rating.
*This device is guaranteed green after data code 8X11 (Sep 1ST 2008).
Rev5: Sep. 2008
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD606
N-Channel MOSFET TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
20
30
10V
5V
VDS=5V
25
4.5V
15
20
ID(A)
ID (A)
4V
15
10
125°C
10
5
VGS=3.5V
5
25°C
0
0
0
1
2
3
4
2
5
2.5
50
3.5
4
4.5
Normalized On-Resistance
1.8
45
VGS=4.5V
RDS(ON) (mΩ )
3
VGS(Volts)
Figure 2: Transfer Characteristics
VDS (Volts)
Fig 1: On-Region Characteristics
40
35
30
25
VGS=10V
VGS=10V
ID=8A
1.6
1.4
VGS=4.5V
ID=6A
1.2
1
20
0
4
8
12
16
0.8
20
0
ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage
25
50
75
100
125
150
175
Temperature (°C)
Figure 4: On-Resistance vs. Junction
Temperature
100
1.0E+01
ID=8A
90
1.0E+00
125°C
80
1.0E-01
125°C
IS (A)
RDS(ON) (mΩ )
70
60
1.0E-02
50
25°C
1.0E-03
40
30
1.0E-04
25°C
20
1.0E-05
10
0.0
2
4
6
8
10
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
Alpha & Omega Semiconductor, Ltd.
0.2
0.4
0.6
0.8
1.0
1.2
VSD (Volts)
Figure 6: Body-Diode Characteristics
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AOD606
N-Channel MOSFET TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
700
10
Capacitance (pF)
VGS (Volts)
600
VDS=20V
ID=8A
8
6
4
Ciss
500
400
300
Coss
200
Crss
2
100
0
0
2
4
6
8
0
10
0
Qg (nC)
Figure 7: Gate-Charge Characteristics
100.0
10µs
15
20
25
30
35
VDS (Volts)
Figure 8: Capacitance Characteristics
160
ID (Amps)
1ms
10ms
1.0
40
TJ(Max)=175°C
TA=25°C
100µs
Power (W)
10.0
10
200
TJ(Max)=175°C, T A=25°C
RDS(ON)
limited
5
120
80
DC
40
0
0.0001 0.001
0.1
0.1
1
10
100
VDS (Volts)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
Zθ JC Normalized Transient
Thermal Resistance
10
0.01
0.1
1
10
100
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-toCase (Note F)
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=7.5°C/W
1
PD
0.1
Ton
T
Single Pulse
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD606
N-Channel MOSFET TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
45
25
40
Power Dissipation (W)
ID(A), Peak Avalanche Current
L ⋅ ID
BV − VDD
tA =
TA=25°C
50
35
TA=150°C
30
25
20
15
10
20
15
10
5
5
0
0.000001
0
0.00001
0.0001
0
25
50
75
100
125
150
175
TCASE (°C)
Figure 13: Power De-rating (Note B)
10
50
8
40
TA=25°C
6
Power (W)
Current rating ID(A)
Time in avalanche, tA (s)
Figure 12: Single Pulse Avalanche capability
4
2
30
20
10
0
0
25
50
75
100
125
150
0
0.001
175
TCASE (°C)
Figure 14: Current De-rating (Note B)
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction-toAmbient (Note H)
Zθ JA Normalized Transient
Thermal Resistance
10
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
1
0.1
0.01
0.001
0.00001
Single Pulse
0.0001
0.001
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
RθJA=30°C/W
0.01
0.1
PD
Ton
1
T
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD606
P-Channel MOSFET Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
Conditions
Min
ID=-10mA, VGS=0V
-40
-1
Zero Gate Voltage Drain Current
IGSS
Gate-Body leakage current
VDS=0V, VGS=±20V
VGS(th)
Gate Threshold Voltage
VDS=VGS ID=-250µA
-1.5
ID(ON)
On state drain current
VGS=-10V, VDS=-5V
-30
TJ=55°C
VGS=-10V, ID=-8A
Static Drain-Source On-Resistance
TJ=125°C
VGS=-4.5V, ID=-4A
gFS
Forward Transconductance
VDS=-5V, ID=-8A
VSD
Diode Forward Voltage
IS=-1A,VGS=0V
Max
Units
V
VDS=-32V, VGS=0V
IDSS
RDS(ON)
Typ
-5
µA
±100
nA
-1.8
-3
V
35
50
A
62
55
70
16
-0.75
mΩ
mΩ
S
-1
V
IS
Maximum Body-Diode Continuous Current
-8
A
ISM
Pulsed Body-Diode CurrentC
-30
A
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
657
pF
VGS=0V, VDS=-20V, f=1MHz
143
pF
63
pF
VGS=0V, VDS=0V, f=1MHz
6.5
Ω
14.1
nC
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge (10V)
Qg(4.5V) Total Gate Charge (4.5V)
7
nC
2.2
nC
Gate Drain Charge
4.1
nC
Turn-On DelayTime
8
ns
12.2
ns
Qgs
Gate Source Charge
Qgd
tD(on)
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
trr
Turn-Off Fall Time
Body Diode Reverse Recovery Time
Qrr
VGS=-10V, VDS=-20V, ID=-8A
VGS=-10V, VDS=-20V, RL=2.5Ω,
RGEN=3Ω
24
ns
12.5
ns
IF=-8A, dI/dt=100A/µs
23.2
Body Diode Reverse Recovery Charge IF=-8A, dI/dt=100A/µs
18.2
ns
nC
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allow s it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=175°C.
G. The maximum current rating is limited by bond-wires.
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The SOA
curve provides a single pulse rating.
*This device is guaranteed green after data code 8X11 (Sep 1ST 2008).
Rev5: Sep. 2008
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD606
P-Channel MOSFET Electrical Characteristics (TJ=25°C unless otherwise noted)
30
25
-5V
-10V
-4.5V
25
VDS=-5V
ID=-10mA, VGS=0V
-6V
20
15
VGS=-4V
-ID(A)
-ID (A)
20
15
10
10
125°C
-3.5V
-3V
5
5
25°C
0
0
0
1
2
3
4
0
5
2
3
4
5
-VGS(Volts)
Figure 2: Transfer Characteristics
-VDS (Volts)
Fig 1: On-Region Characteristics
80
Normalized On-Resistance
1.80
VGS=-4.5V
70
RDS(ON) (mΩ )
1
60
50
40
30
VGS=-10V
VGS=-10V
ID=-8A
1.60
1.40
VGS=-4.5V
ID=-6A
1.20
1.00
0.80
20
0
4
8
12
16
0
20
-ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage
25
50
75
100
125
150
175
Temperature (°C)
Figure 4: On-Resistance vs. Junction
Temperature
120
1.0E+01
ID=-8A
1.0E+00
100
125°C
80
125°C
60
-IS (A)
RDS(ON) (mΩ )
1.0E-01
1.0E-02
1.0E-03
25°C
1.0E-04
40
25°C
20
2.00E+00 4.00E+00 6.00E+00 8.00E+00 1.00E+01
-VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
Alpha & Omega Semiconductor, Ltd.
1.0E-05
1.0E-06
0.0
0.2
0.4
0.6
0.8
1.0
1.2
-VSD (Volts)
Figure 6: Body-Diode Characteristics
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AOD606
P-Channel MOSFET Electrical Characteristics (TJ=25°C unless otherwise noted)
1200
10
VDS=-20V
ID=-8A
1000
ID=-10mA, VGS=0V
Capacitance (pF)
-VGS (Volts)
8
6
4
Ciss
800
600
400
Coss
2
200
Crss
0
0
0
4
8
12
-Qg (nC)
Figure 7: Gate-Charge Characteristics
0
16
100.0
5
10
15
20
25
-VDS (Volts)
Figure 8: Capacitance Characteristics
200
TJ(Max)=175°C, T A=25°C
10µs
RDS(ON)
limited
10.0
100µs
1.0
1ms
10ms
DC
Power (W)
160
-ID (Amps)
30
TJ(Max)=175°C
TA=25°C
120
80
40
0.1
0.1
1
10
100
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
Zθ JC Normalized Transient
Thermal Resistance
0.01
0.1
1
10
100
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-toCase (Note F)
-VDS (Volts)
10
0
0.0001 0.001
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=5°C/W
1
PD
0.1
Ton
T
Single Pulse
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Alpha & Omega Semiconductor, Ltd.
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AOD606
P-Channel MOSFET Electrical Characteristics (TJ=25°C unless otherwise noted)
L ⋅ ID
tA =
BV −VVGSDD
ID=-10mA,
=0V
TA=25°C
90
80
70
TA=150°C
60
50
40
30
20
60
50
Power Dissipation (W)
-ID(A), Peak Avalanche Current
100
40
30
20
10
10
0
0
0.000001
0.00001
0
0.0001
25
100
125
150
175
TA=25°C
50
8
40
Power (W)
Current rating -ID(A)
75
60
10
6
4
30
20
2
10
0
0
10
Zθ JA Normalized Transient
Thermal Resistance
50
TCASE (°C)
Figure 13: Power De-rating (Note B)
Time in avalanche, tA (s)
Figure 12: Single Pulse Avalanche capability
25
50
75
100
125
150
TCASE (°C)
Figure 14: Current De-rating (Note B)
0
0.001
175
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction-toAmbient (Note H)
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
1
0.1
0.01
0.001
0.00001
Single Pulse
0.0001
0.001
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
RθJA=25°C/W
0.01
0.1
PD
Ton
1
T
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Alpha & Omega Semiconductor, Ltd.
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AOD606 N-Channel
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+ Vds
VDC
-
Qgs
Qgd
VDC
DUT
-
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
DUT
Vgs
90%
+ Vdd
VDC
-
Rg
10%
Vgs
Vgs
td(on)
tr
td(off)
ton
tf
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
2
EAR= 1/2 LIAR
Vds
BVDSS
Vds
Id
Vgs
Vgs
+ Vdd
I AR
VDC
-
Rg
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vgs
Vds -
Isd
L
Vgs
Ig
Alpha & Omega Semiconductor, Ltd.
Isd
+ Vdd
t rr
dI/dt
I RM
Vdd
VDC
-
IF
Vds
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AOD606 P-Channel
Gate Charge Test Circuit & Waveform
Vgs
Qg
-10V
-
-
VDC
+
VDC
Qgs
Vds
Qgd
+
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
toff
ton
td(on)
Vgs
-
DUT
Vgs
td(off)
tr
tf
90%
Vdd
VDC
+
Rg
Vgs
10%
Vds
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
2
L
EAR= 1/2 LIAR
Vds
Vds
Id
-
Vgs
Vgs
VDC
+
Rg
BVDSS
Vdd
Id
I AR
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vgs
Vds Isd
L
Vgs
Ig
Alpha & Omega Semiconductor, Ltd.
-Isd
+ Vdd
t rr
dI/dt
-I RM
Vdd
VDC
-
-I F
-Vds
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