ON NLAS324US Dual spst analog switch, low voltage, single supply Datasheet

NLAS324
Dual SPST Analog Switch,
Low Voltage, Single Supply
The NLAS324 is a dual SPST (Single Pole, Single Throw) switch,
similar to 1/2 a standard 4066. The device permits the independent
s e l e c t i o n o f 2 a n a l o g / d i g i t a l s i g n a l s . Av a i l a b l e i n t h e
Ultra−Small 8 package.
The use of advanced 0.6 CMOS process, improves the RON
resistance considerably compared to older higher voltage
technologies.
http://onsemi.com
MARKING
DIAGRAM
Features
•
•
•
•
•
•
•
•
•
•
•
•
8
On Resistance is 20 Typical at 5.0 V
Matching is t Between Sections
2 − 6 V Operating Range
Ultra Low t 5 pC Charge Injection
Ultra Low Leakage t 1 nA at 5.0 V, 25°C
Wide Bandwidth u 200 MHz, −3 dB
2000 V ESD (HBM)
Ron Flatness $ 6 at 5.0 V
US8 Package
Negative Enable
Switches are Independent
Pb−Free Package is Available
NC1
COM1
IN2
GND
1
1
A7
= Device Code
M
= Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
PIN ASSIGNMENT
7
3
6
4
A7 M G
G
1
8
2
US8
US SUFFIX
CASE 493
8
5
VCC
IN1
COM2
NC2
1
NC1
2
COM1
3
IN2
4
GND
5
NC2
6
COM2
7
IN1
8
VCC
FUNCTION TABLE
On/Off
Enable Input
State of
Analog Switch
L
H
On
Off
Figure 1. Pinout
ORDERING INFORMATION
Device
NLAS324US
NLAS324USG
Package
Shipping†
US8
3,000 / Tape & Reel
US8
(Pb−Free)
3,000 / Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
April, 2006 − Rev. 7
1
Publication Order Number:
NLAS324/D
NLAS324
MAXIMUM RATINGS
Symbol
Value
Unit
DC Supply Voltage
*0.5 to )7.0
V
VI
DC Input Voltage
*0.5 to )7.0
V
VO
DC Output Voltage
*0.5 to )7.0
V
IIK
DC Input Diode Current
VI < GND
*50
mA
IOK
DC Output Diode Current
VO < GND
*50
mA
VCC
Parameter
IO
DC Output Sink Current
$50
mA
ICC
DC Supply Current per Supply Pin
$100
mA
IGND
DC Ground Current per Ground Pin
$100
mA
TSTG
Storage Temperature Range
*65 to )150
_C
260
_C
)150
_C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
TJ
Junction Temperature under Bias
JA
Thermal Resistance (Note 1)
250
_C/W
PD
Power Dissipation in Still Air at 85_C
250
mW
MSL
Moisture Sensitivity
FR
Level 1
Flammability Rating Oxygen Index: 28 to 34
VESD
ESD Withstand Voltage
UL 94 V−0 @ 0.125 in
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
> 2000
> 150
N/A
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
RECOMMENDED OPERATING CONDITIONS
Symbol
Characteristics
VCC
Positive DC Supply Voltage
Min
Max
Unit
2.0
5.5
V
VIN
Digital Input Voltage (Enable)
GND
5.5
V
VIO
Static or Dynamic Voltage Across an Off Switch
GND
VCC
V
VIS
Analog Input Voltage (NO, COM)
GND
VCC
V
TA
Operating Temperature Range, All Package Types
−55
+125
°C
tr, tf
Input Rise or Fall Time,
(Enable Input)
0
0
100
20
ns/V
Vcc = 3.3 V + 0.3 V
Vcc = 5.0 V + 0.5 V
90
419,300
47.9
100
178,700
20.4
110
79,600
9.4
120
37,000
4.2
130
17,800
2.0
140
8,900
1.0
TJ = 80_C
117.8
TJ = 90_C
1,032,200
TJ = 100_C
80
TJ = 110_C
Time, Years
TJ = 120_C
Time, Hours
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
TJ = 130_C
Junction
Temperature 5C
NORMALIZED FAILURE RATE
DEVICE JUNCTION TEMPERATURE VERSUS TIME
TO 0.1% BOND FAILURES
1
1
10
100
1000
TIME, YEARS
Figure 2. Failure Rate vs. Time Junction Temperature
http://onsemi.com
2
NLAS324
DC CHARACTERISTICS − Digital Section (Voltages Referenced to GND)
Guaranteed Max Limit
Symbol
Parameter
VIH
Condition
VCC
−55 to 255C
<855C
<1255C
Unit
Minimum High−Level Input Voltage,
Enable Inputs
2.0
3.0
4.5
5.5
1.5
2.1
3.15
3.85
1.5
2.1
3.15
3.85
1.5
2.1
3.15
3.85
V
VIL
Maximum Low−Level Input Voltage,
Enable Inputs
2.0
3.0
4.5
5.5
0.5
0.9
1.35
1.65
0.5
0.9
1.35
1.65
0.5
0.9
1.35
1.65
V
IIN
Maximum Input Leakage Current,
Enable Inputs
VIN = 5.5 V or GND
0 V to 5.5 V
+0.1
+1.0
+1.0
A
ICC
Maximum Quiescent Supply
Current (per package)
Enable and VIS = VCC or
GND
5.5
1.0
1.0
2.0
A
DC ELECTRICAL CHARACTERISTICS − Analog Section
Guaranteed Max Limit
Symbol
Parameter
Condition
VCC
−55 to 255C
<855C
<1255C
Unit
RON
Maximum ON Resistance
(Figures 8 − 12)
VIN = VIH
VIS = VCC to GND
IIsI = <10.0mA
3.0
4.5
5.5
45
30
25
50
35
30
55
40
35
RFLAT(ON)
ON Resistance Flatness
VIN = VIH
IIsI = <10.0mA
VIS = 1V, 2V, 3.5V
4.5
4
4
5
INO(OFF)
Off Leakage Current, Pin 2
(Figure 3)
VIN = VIL
VNO = 1.0 V, VCOM = 4.5 V or
VCOM = 1.0 V and VNO 4.5 V
5.5
1
10
100
nA
ICOM(OFF)
Off Leakage Current, Pin 1
(Figure 3)
VIN = VIL
VNO = 4.5 V or 1.0 V
VCOM = 1.0 V or 4.5 V
5.5
1
10
100
nA
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
Guaranteed Max Limit
VCC
Symbol
Parameter
Test Conditions
(V)
−55 to 255C
Min
Typ
Max
<855C
Min
Typ
<1255C
Max
Min
Typ
Max
Unit
tON
Turn−On Time
RL = 300 CL = 35 pF
(Figures 4, 5, and 13)
2.03.04.55.5
7.0
5.0
4.5
4.5
14
10
9
9
16
12
11
11
16
12
11
11
ns
tOFF
Turn−Off Time
RL = 300 CL = 35 pF
(Figures 4, 5, and 13)
2.03.04.5
5.5
11.0
7.0
5.0
5.0
22
14
10
10
24
16
12
12
24
16
12
12
ns
Typical @ 25, VCC = 5.0 V
CIN
CNO or CNC
CCOM(OFF)
CCOM(ON)
Maximum Input Capacitance, Select Input
Analog I/O (switch off)
Common I/O (switch off)
Feedthrough (switch on)
8
10
10
20
http://onsemi.com
3
pF
NLAS324
ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)
VCC
Limit
V
25°C
Unit
VIS = 0 dBm
VIS centered between VCC and GND
(Figures 6 and 14)
3.0
4.5
5.5
190
200
220
MHz
Maximum Feedthrough On Loss
VIS = 0 dBm @ 10 kHz
VIS centered between VCC and GND (Figure 6)
3.0
4.5
5.5
−2
−2
−2
dB
Off−Channel Isolation
f = 100 kHz; VIS = 1 V RMS
VIS centered between VCC and GND
(Figures 6 and 15)
3.0
4.5
5.5
−93
dB
Charge Injection
Enable Input to Common I/O
VIS = VCC to GND, FIS = 20 kHz
tr = tf = 3 ns
RIS = 0 , CL = 1000 pF
Q = CL * VOUT (Figures 7 and 16)
3.0
5.5
1.5
3.0
pC
Total Harmonic Distortion
THD + Noise
FIS = 20 Hz to 1 MHz, RL = Rgen = 600 , CL = 50 pF
VIS = 3.0 VPP sine wave
VIS = 5.0 VPP sine wave (Figure 17)
3.3
5.5
0.3
0.15
%
Symbol
Parameter
BW
Maximum On−Channel −3dB Bandwidth
or Minimum Frequency Response
VONL
VISO
Q
THD
Condition
1.00E+05
1.00E+04
1.00E+03
LEAKAGE (pA)
1.00E+02
1.00E+01
ICOM(ON)
1.00E+00
1.00E−01
1.00E−02
1.00E−03
ICOM(OFF)
1.00E−04
1.00E−05
INO(OFF)
1.00E−06
1.00E−07
−55 −35 −15
5
25
45
65
85
105 125 145
TEMPERATURE (°C)
Figure 3. Switch Leakage vs. Temperature
VCC
DUT
VCC
50%
Input
NO
0V
COM
VOUT
0.1 F
300
50%
VOH
35 pF
90%
90%
Output
VOL
Input
tON
Figure 4. tON/tOFF
http://onsemi.com
4
tOFF
NLAS324
VCC
VCC
50%
Input
DUT
300 NO
COM
50%
0V
VOUT
VOH
35 pF
Output
10%
10%
VOL
Input
tOFF
tON
Figure 5. tON/tOFF
DUT
Reference
COM
Transmitted
NO
50 Generator
50 Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is
the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction.
ǒVVOUT
for ǓV at 100 kHz
IN IN
VOUT
VONL = On Channel Loss = 20 Log ǒ
for ǓV at 100 kHz to 50 MHz
VIN IN
VISO = Off Channel Isolation = 20 Log
Bandwidth (BW) = the frequency 3 dB below VONL
Figure 6. Off Channel Isolation/On Channel Loss (BW)/Crosstalk
(On Channel to Off Channel)/VONL
DUT
NO
VCC
VIN
COM
GND
CL
Output
Off
VIN
Figure 7. Charge Injection: (Q)
http://onsemi.com
5
On
Off
VOUT
NLAS324
80
80
70
70
60
VCC = 2.0
50
50
RON ()
RON ()
60
40
VCC = 2.5
30
−55°C
30
25°C
VCC = 3.0
20
40
20
85°C
VCC = 4.5
10
10
0
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
125°C
0
5
0.2
0.4
0.6
0.8
1
1.2 1.4
1.6
1.8
VCOM (VOLTS)
VIS (VOLTS)
Figure 8. RON vs. VCOM and VCC (@255C)
Figure 9. RON vs. VCOM and Temperature,
VCC = 2.0 V
45
2
30
40
20
25
RON ()
RON ()
30
−55°C
20
25°C
15
10
15
125°C
25°C
85°C
10
85°C
5
125°C
5
0
−55°C
25
35
0
0.2 0.4 0.6 0.8 1
1.2 1.4 1.6 1.8
2
0
2.2 2.4
0
0.3
0.6
0.9
1.2 1.5
1.8
2.1
2.4
2.7
VCOM (VOLTS)
VCOM (VOLTS)
Figure 10. RON vs. VCOM and Temperature,
VCC = 2.5 V
Figure 11. RON vs. VCOM and Temperature,
VCC = 3.0 V
3
35.0
18
30.0
16
−55°C
25°C
25.0
12
TIME (nS)
RON ()
14
85°C
10
8
15.0
4
5.0
2
0.0
2.0
0
tON
10.0
125°C
6
20.0
tOFF
0
0.4 0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
4
4.4
3.0
4.5
5.0
5.5
VCC (V)
VCOM (VOLTS)
Figure 12. RON vs. VCOM and Temperature,
VCC = 4.5 V
Figure 13. Switching Time vs. Supply Voltage,
T = 255C
http://onsemi.com
6
NLAS324
0
0
0
BANDWIDTH (dB/Div)
Phase (Degrees)
5
VCC = 5.0 V
TA = 25°C
0.01
0.1
1
10
OFF ISOLATION (dB/Div)
10
PHASE (Degrees)
Bandwidth (On − Loss)
−50
VCC = 5.0 V
TA = 25°C
−100
100 300
0.01
0.1
FREQUENCY (MHz)
1
100 300
10
FREQUENCY (MHz)
Figure 14. ON Channel Bandwidth and Phase
Shift Over Frequency
Figure 15. Off Channel Isolation
100
1.60
1.40
VCC = 5.0 V
1.20
10
0.80
THD (%)
Q (pC)
1.00
VCC = 3.0 V
1
3.3 V
0.60
0.40
0.1
5.5 V
0.20
0.00
0.0
0.01
1.0
2.0
3.6
3.0
VCOM (V)
4.0
4.5
10
5.0
100
1000
10000
100000 1000000
FREQUENCY (Hz)
Figure 16. Charge Injection vs. VCOM
Figure 17. THD vs. Frequency
http://onsemi.com
7
NLAS324
CAVITY
TAPE
TOP TAPE
TAPE TRAILER
(Connected to Reel Hub)
NO COMPONENTS
160 mm MIN
COMPONENTS
TAPE LEADER
NO COMPONENTS
400 mm MIN
DIRECTION OF FEED
Figure 18. Tape Ends for Finished Goods
TAPE DIMENSIONS mm
4.00
Ğ1.50 TYP
4.00
2.00
1.75
3.50 $ 0.25
0.30
8.00 +
− 0.10
1
Ğ1.00 ± 0.25 TYP
DIRECTION OF FEED
Figure 19. US8 Reel Configuration/Orientation
http://onsemi.com
8
NLAS324
t MAX
1.5 mm MIN
(0.06 in)
A
13.0 mm $0.2 mm
(0.512 in $0.008 in)
50 mm MIN
(1.969 in)
20.2 mm MIN
(0.795 in)
FULL RADIUS
G
Figure 20. Reel Dimensions
REEL DIMENSIONS
Tape Size
T and R Suffix
A Max
G
t Max
8 mm
US
178 mm
(7 in)
8.4 mm, + 1.5 mm, −0.0
(0.33 in + 0.059 in, −0.00)
14.4 mm
(0.56 in)
DIRECTION OF FEED
BARCODE LABEL
POCKET
Figure 21. Reel Winding Direction
http://onsemi.com
9
HOLE
NLAS324
PACKAGE DIMENSIONS
US8
US SUFFIX
CASE 493−02
ISSUE B
−X−
A
8
J
−Y−
5
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION “A” DOES NOT INCLUDE MOLD
FLASH, PROTRUSION OR GATE BURR.
MOLD FLASH. PROTRUSION AND GATE
BURR SHALL NOT EXCEED 0.140 MM
(0.0055”) PER SIDE.
4. DIMENSION “B” DOES NOT INCLUDE
INTER−LEAD FLASH OR PROTRUSION.
INTER−LEAD FLASH AND PROTRUSION
SHALL NOT E3XCEED 0.140 (0.0055”) PER
SIDE.
5. LEAD FINISH IS SOLDER PLATING WITH
THICKNESS OF 0.0076−0.0203 MM.
(300−800 “).
6. ALL TOLERANCE UNLESS OTHERWISE
SPECIFIED ±0.0508 (0.0002 “).
DETAIL E
B
L
1
4
R
S
G
P
U
H
C
−T−
SEATING
PLANE
0.10 (0.004) T
K
D
N
R 0.10 TYP
0.10 (0.004)
M
T X Y
V
M
F
DETAIL E
DIM
A
B
C
D
F
G
H
J
K
L
M
N
P
R
S
U
V
MILLIMETERS
MIN
MAX
1.90
2.10
2.20
2.40
0.60
0.90
0.17
0.25
0.20
0.35
0.50 BSC
0.40 REF
0.10
0.18
0.00
0.10
3.00
3.20
0_
6_
5_
10 _
0.23
0.34
0.23
0.33
0.37
0.47
0.60
0.80
0.12 BSC
INCHES
MIN
MAX
0.075
0.083
0.087
0.094
0.024
0.035
0.007
0.010
0.008
0.014
0.020 BSC
0.016 REF
0.004
0.007
0.000
0.004
0.118
0.126
0_
6_
5_
10 _
0.010
0.013
0.009
0.013
0.015
0.019
0.024
0.031
0.005 BSC
SOLDERING FOOTPRINT*
3.8
0.15
0.50
0.0197
1.8
0.07
0.30
0.012
1.0
0.0394
SCALE 8:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer
purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
http://onsemi.com
10
For additional information, please contact your
local Sales Representative.
NLAS324/D
Similar pages