ONSEMI MC34280FTB

MC34280
Power Supply &
Management IC for Handheld
Electronic Products
The MC34280 is a power supply integrated circuit which provides
two boost regulated outputs and some power management supervisory
functions. Both regulators apply Pulse–Frequency–Modulation
(PFM). The main step–up regulator output can be externally adjusted
from 2.7V to 5V. An internal synchronous rectifier is used to ensure
high efficiency (achieve 87%). The auxiliary regulator with a built–in
power transistor can be configured to produce a wide range of positive
voltage (can be used for LCD contrast voltage). This voltage can be
adjusted from +5V to +25V by an external potentiometer; or by a
microprocessor, digitally through a 6–bit internal DAC.
The MC34280 has been designed for battery powered hand–held
products. With the low start–up voltage from 1V and the low quiescent
current (typical 35 µA); the MC34280 is best suited to operate from 1
to 2 AA/ AAA cell. Moreover, supervisory functions such as low
battery detection, CPU power–on reset, and back–up battery control,
are also included in the chip. It makes the MC34280 the best one–chip
power management solution for applications such as electronic
organizers and PDAs.
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32–LEAD LQFP
FTB SUFFIX
CASE 873A
MARKING DIAGRAM
MC34280F
TB
AWLYYWW
A
WL
YY
WW
= Assembly Location
= Wafer Lot
= Year
= Work Week
32
1
FEATURES:
• Low Input Voltage, 1V up
• Low Quiescent Current in Standby Mode: 35µA typical
• PFM and Synchronous Rectification to ensure high efficiency
•
•
•
•
•
•
VMAIN
VMAINSW
VMAINGND
NC
LIBAOUT
LIBATIN
VAUXEMR
VAUXSW
VMAINFB
VBAT
ENABLE
VDD
PDELAY
VREF
AGND
IREF
NC
VAUXBASE
VAUXCHG
VAUXBDV
VAUXFBN
VAUXREF
VAUXFBP
VAUXEN
MC34280
DGND
PROB
LOWBATB
LIBATON
LIBATCL
VAUXADJ
VAUXCON
•
32
1
LOWBATSEN
•
(87% @200mA Load)
Adjustable Main Output: nominal 3.3V @ 200mA max, with 1.8V
input
Auxiliary Output Voltage can be digitally controlled by
microprocessor
Auxiliary Output Voltage:
+5V @ 25mA max, with 1.8V input
+25V @ 15mA max, with 1.8V input
Current Limit Protection
Power–ON Reset Signal with Programmable Delay
Battery Low Detection
Lithium Battery Back–up
32–Pin LQFP Package
PIN CONNECTIONS
APPLICATIONS:
•
•
•
•
Digital Organizer and Dictionary
Personal Digital Assistance (PDA)
Dual Output Power Supply (For MPU, Logic, Memory, LCD)
Handheld Battery Powered Device (1–2 AA/AAA cell)
 Semiconductor Components Industries, LLC, 1999
February, 2000 – Rev. 2
1
ORDERING INFORMATION
Device
Package
Shipping
MC34280FTB
LQFP
250 Units/Tray
MC34280FTBR2
LQFP
1800 Tape & Reel
Publication Order Number:
MC34280/D
MC34280
Figure 1. Typical Application Block Diagram
Battery
Lock
Switch
CVDD
c = 20u
GND
Riref
r = 480 k
Cpor
c = 80n
VREF
GND
VBAT
Ren
r = 1000 k
GND
IREF
AGND
8
7
PDELAY
VREF
6
VDD
5
VDD
ENABLE
VBAT
VMAINFB
4
3
2
1
GND
Power
ON
Reset
LOWBATSEN
9
DGND
RLBb
r = 900 k
10 V SMT
tantalum
GND
LMAIN
L = 33u
(Rs < 60 mOhm)
10
GND
11
13
LIBATCL
s
VMAIN
d
32
d
s
Current
Limit
29
M3
s
GND
LIBATIN
27
VAUXEMR
15
16
GND
N/C
d
VAUXADJ
VAUXCON
10 V SMT
tantalum
28 LIBATOUT
14
PORB
CMAIN
c = 100u
30
Main Regulator with
Synchronous Rectifier
Lithium
Battery
Backup
1N5817
31 VMAINSW
VMAINGND
M1
Low
Battery
Detect
LOWBATB
12
Startup
Current
Bias
Voltage
Reference
LIBATON
VMAIN
Control and
Gate Drive
M2
PORB
Level
Control
Current
Limit
Control and
Base Drive
GND
26
Q1
VAUXSW
GND
25
LOWBAT
Auxiliary Regulator
LIBATON
LIBATCL
VAUXADJ
VAUXCON
CMAINbp
c = 100u
R123
r=5
VBAT
RLBa
r = 300 k
Optional
RMAINb
r = 1000 k
GND
GND
VBAT
CMAINb
c = 100p
17
18
19
VAUXEN
20
VAUXFBN
21
VBAT
22
23
24
VAUXBDV
N/C
VAUXBASE
VAUXEN
VAUXFBP
VAUXREF
(1.1 V to 2.2 V)
VAUXCHG
LAUX
L = 22u
(Rs < 60 mOhm)
VBAT
30 V SMT
tantalum
CAUXbp
c = 100u
Optional
Caux
c = 30u
Rauxb
r = 2.2 M
CAUXb
c = 2n
Rauxa
r = 200 k
CAUXa
c = 33n
GND
10 V SMT
tantalum
Optional
VAUX
1N5818
GND
GND
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2
MC34280
TIMING DIAGRAMS
VBAT
ENABLE
VMAINreg
VMAINreg – 0.15 V
T
VMAIN
POR
+
ǒ Ǔ
1.22
0.5
C por
RIref
tPORC
PORB
VAUXEN
Figure 2. Startup Timing
VBAT
LOWBAT Threshold
LOWBATB
VMAIN
VMAINreg – 0.5 V
ENABLE
PORB
Figure 3. Power Down Timing
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3
MC34280
TIMING DIAGRAMS (Con’t)
VAUXCON
Total N Pulses
Total M Pulses
VAUXADJ
DV +
N
64
DV +
@ 1.1 V
2.2 V
@
M 1.1 V
64
1.65 V
“Countup”
Flag is HIGH
“Countup”
Flag is LOW
Reset
VAUXREF
VAUXREF
1.1 V
Figure 4. Auxiliary Regulator Voltage Control
tCW
tCC
tCL
tDL
tRJL
VAUXCON
tJC
tJL
VAUXADJ
tDW
tJW
Figure 5. Auxiliary Regulator Voltage Control Timing
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4
tRW
MC34280
PIN FUNCTION DESCRIPTION
Pin
No.
Function
Type/Direction
1
VMAINFB
Analog / Input
2
VBAT
Power
3
ENABLE
CMOS / Input
4
VDD
Analog / Output
Connect to decoupling capacitor for internal logic supply
5
PDELAY
Analog / Input
Capacitor connection for defining Power–On signal delay
6
VREF
Analog / Output
7
AGND
Analog Ground
8
IREF
Analog / Input
Resistor connection for defining internal current bias and PDELAY current
9
LOWBATSEN
Analog / Input
Resistive network connection for defining low battery detect threshold
10
DGND
Digital Ground
11
PORB
CMOS / Output
Active LOW Power–On reset signal
12
LOWBATB
CMOS / Output
Active LOW low battery detect output
13
LIBATON
CMOS / Input
microprocessor control signal for Lithium battery backup switch, the switch is
ON when LIBATON=HIGH and LIBATCL=HIGH
14
LIBATCL
CMOS / Input
microprocessor control signal for Lithium battery backup switch, if it is HIGH,
the switch is controlled by LIBATON, otherwise, controlled by internal logic
15
VAUXADJ
CMOS / Input
microprocessor control signal for VAUX voltage control
16
VAUXCON
CMOS / Input
microprocessor control signal for VAUX voltage control
17
VAUXEN
CMOS / Input
VAUX enable, Active high
18
VAUXFBP
Analog / Input
Feedback pin for VAUX
19
VAUXREF
Analog / Output
20
VAUXFBN
Analog / Input
21
VAUXBDV
Power
22
VAUXCHG
Analog / Output
test pin
23
VAUXBASE
Analog / Output
test pin
24
NC
25
VAUXSW
Analog / Output
Collector output of the VAUX power BJT
26
VAUXEMR
Analog / Output
Emitter output of the VAUX power BJT
27
LIBATIN
Analog / Input
28
LIBATOUT
Analog / Output
29
NC
30
VMAINGND
Power Ground
Ground for VMAIN low side switch
31
VMAINSW
Analog / Input
VMAIN inductor connection
32
VMAIN
Analog / Output
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Description
Feedback pin for VMAIN
Main battery supply
Chip enable, Active high, ENABLE activates VMAIN after battery plug in,
ENABLE is inactive after VMAIN is on
Bandgap Reference output voltage. Nominal voltage is 1.25V
Reference Voltage for VAUX voltage level
Feedback pin for VAUX
VAUX BJT base drive circuit power supply
no connection
Lithium battery input for backup purposes
Lithium battery output
no connection
VMAIN output
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5
MC34280
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, unless otherwise noted.)
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Parameter
Power Supply Voltage
Digital Pin Voltage
General Analog Pin Voltage
Pin VAUXSW to Pin VAUXEMR Voltage (Continuous)
Pin VMAINSW to Pin VMAIN Voltage (Continuous)
Operating Junction Temperature
Ambient Operating Temperature
Storage Temperature
Symbol
Min
Max
Unit
VBAT
Vdigital
Vanalog
VAUXCE
–0.3
–0.3
–0.3
–0.3
7.0
7.0
7.0
30
Vdc
Vdc
Vdc
Vdc
Vsyn
0.3
Vdc
Tj (max)
150
°C
Ta
0
70
°C
Tstg
– 50
150
°C
STATIC ELECTRICAL CHARACTERISTICS (Circuit of Figure 1, VP = 1.8V, Iload = 0 mA, TA = 0 to 70°C unless
otherwise noted.)
Rating
Symbol
Min
Typ
Max
3.3
3.47
V
5.0
V
I3.3_1.8
200
mA
Freqmax_VM
100
kHz
1.15
A
25
V
Operating Supply Voltage1
VBAT
1.0
VMAIN output voltage
Vmain
3.13
Vmain_range
2.7
VMAIN output voltage range2
VMAIN output current3
VMAIN maximum switching frequency4
VMAIN peak coil static current limit
Unit
V
ILIM_VM
0.85
VAUX_range
5.0
VAUXREF lower level voltage
VAUXREF_L
1.0
1.1
1.2
V
VAUXREF upper level voltage
VAUXREF_H
2.0
2.2
2.4
V
VAUXREF step size
VAUXREF_S
VAUX maximum switching frequency
Freqmax_VL
VAUX output voltage range
VAUX peak coil static current limit
Quiescent Supply Current at Standby Mode5
1.0
17
mV
120
kHz
ILIM_VL
1.0
A
Iqstandby
35
60
µA
Reference Voltage @ no load
Vrefno_load
1.19
1.22
1.25
V
Battery Low Detect lower hysteresis threshold6
VLOBAT_L
0.8
0.85
0.9
V
Battery Low Detect upper hysteresis threshold
VLOBAT_H
1.05
1.1
1.15
V
PDELAY Pin output charging current
IchgPDELAY
0.8
1.0
1.2
µA
PDELAY Pin voltage threshold
VthPDELAY
1.19
1.22
1.25
V
NOTE: 1. Output current capability is reduced with supply voltage due to decreased energy transfer. The supply voltage must not be higher than
VMAIN+0.6V to ensure boost operation. Max Start–up loading is typically 1V at 400 µA, 1.8V at 4.4 mA, and 2.2V at 88 mA.
NOTE: 2. Output voltage can be adjusted by external resistor to the VMAINFB pin.
NOTE: 3. At VBAT = 1.8V, output current capability increases with VBAT.
NOTE: 4. Only when current limit is not reached.
NOTE: 5. This is average current consumed by the IC from VDD, which is low–pass filtered from VMAIN, when only VMAIN is enabled and at no loading.
NOTE: 6. This is the minimum of ”LOWBATB” threshold for battery voltage, the threshold can be increased by external resistor divider from ”VBAT” to
”LOWBATSEN”.
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6
MC34280
DYNAMIC ELECTRICAL CHARACTERISTICS (Refer to TIMING DIAGRAMS, TA = 0 to 70°C unless otherwise noted.)
Rating
Symbol
Max
Unit
tPORC
500
nS
Minimum VAUXCON pulse HIGH width
tCW
5.0
µS
Minimum VAUXCON pulse LOW width
tCC
8.0
µS
Minimum VAUXADJ to VAUXCON delay
tCL
1.0
µS
Minimum VAUXADJ pulse HIGH width
tJW
1.0
µS
Minimum VAUXADJ pulse LOW width
tJC
1.0
µS
Minimum VAUXCON LOW to VAUXADJ pulse delay1
tJL
1.0
µS
Minimum hold time of VAUXADJ for Reset VAUXREF
tRJL
500
nS
Minimum VAUXADJ pulse HIGH width for Reset VAUXREF
tRW
1.0
µS
Minimum hold time of VAUXADJ for Decrement VAUXREF
tDL
500
nS
Minimum VAUXADJ pulse HIGH width for Decrement VAUXREF
tDW
1.0
µS
Minimum PORB to Control delay
Min
Typ
NOTE: 1. For not resetting VAUXREF.
TYPICAL ELECTRICAL CHARACTERISTICS
85%
90%
Eff VMAIN , EFFICIENCY OF VMAIN (%)
Eff VMAIN , EFFICIENCY OF VMAIN (%)
90%
Figure 7. Efficiency of VMAIN versus Input
Voltage (VMAIN = 3.3 V, L1 = 33 uH, Various IOUT)
Figure 6. Efficiency of VMAIN versus Output
Current (VMAIN = 3.3 V, L = 33 uH, Various VIN)
Vin = 3V
Vin = 1.8V
Vin = 1.5V
Vin = 1V
80%
75%
70%
80%
X
75%
X
Iout = 10mA
Iout = 60mA
Iout = 100mA
Iout = 150mA
Iout = 200mA
70%
0
50
100
150
200
250
300
1
1.5
2
2.5
3
IOUT_MAIN, MAIN OUTPUT CURRENT (mA)
VIN, INPUT VOLTAGE (V)
Figure 8. Efficiency of VAUX versus Output
Current (VAUX = 25 V, L2 = 33 uH, Various VIN)
Figure 9. Efficiency of VAUX versus Input
Voltage (VAUX = 25 V, L2 = 33 uH, Various IOUT)
80%
Eff VAUX , EFFICIENCY OF VAUX (%)
80%
Eff VAUX , EFFICIENCY OF VAUX (%)
X
X
85%
75%
70%
65%
60%
Vin = 3V
Vin = 1.8V
Vin = 1.5V
Vin = 1V
55%
75%
70%
65%
60%
Iout = 1mA
Iout = 5mA
Iout = 10mA
Iout = 15mA
55%
50%
50%
1
3
5
7
9
11
13
15
1
IOUT_AUX, AUX OUTPUT CURRENT (mA)
1.5
2
VIN, INPUT VOLTAGE (V)
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2.5
3
MC34280
TYPICAL ELECTRICAL CHARACTERISTICS (Cont’d)
Figure 10. Efficiency of VAUX versus Output
Current (VAUX = 20 V, L2 = 33 uH, Various VIN)
Figure 11. Efficiency of VAUX versus Input
Voltage (VAUX = 20 V, L2 = 33 uH, Various IOUT)
80%
Eff VAUX, EFFICIENCY OF VAUX (%)
Eff VAUX, EFFICIENCY OF VAUX (%)
80%
75%
70%
65%
Vin = 3V
Vin = 1.8V
Vin = 1.5V
Vin = 1V
60%
55%
50%
70%
65%
60%
Iout = 1mA
Iout = 5mA
Iout = 10mA
Iout = 15mA
55%
50%
1
3
5
7
9
11
13
1
15
1.5
2
2.5
3
IOUT_AUX, AUX OUTPUT CURRENT (mA)
VIN, INPUT VOLTAGE (V)
Figure 12. Efficiency of VAUX versus Output
Current (VAUX = 5 V, L2 = 82 uH, Various VIN)
Figure 13. Efficiency of VAUX versus Input
Voltage (VAUX = 5 V, L2 = 82 uH, Various IOUT)
85%
Eff VAUX, EFFICIENCY OF VAUX (%)
85%
Eff VAUX, EFFICIENCY OF VAUX (%)
75%
80%
75%
70%
65%
60%
Vin = 3V
Vin = 2.4V
Vin = 1.8V
Vin = 1.5V
Vin = 1V
55%
50%
45%
40%
80%
75%
Iout = 1V
Iout = 5V
Iout = 10V
Iout = 15V
Iout = 25V
70%
65%
50%
1
5
10
15
20
25
30
35
1
IOUT_AUX, AUX OUTPUT CURRENT (mA)
1.5
2
VIN, INPUT VOLTAGE (V)
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2.5
3
MC34280
Figure 14. VMAIN Output Ripple (Medium Load)
Figure 15. VMAIN Output Ripple (Heavy Load)
20 uS / div
10 uS / div
1: VMAIN = 3.3 V (50 mV/div, AC COUPLED)
2: Voltage at VMAINSW (1 V/div)
1: VMAIN = 3.3 V (50 mV/div, AC COUPLED)
2: Voltage at VMAINSW (1 V/div)
Figure 16. VAUX Output Ripple (Medium Load)
Figure 17. VAUX Output Ripple (Heavy Load)
20 uS / div
10 uS / div
1: VAUX = 20 V (50 mV/div, AC COUPLED)
2: Voltage at VAUXSW (10 V/div)
1: VAUX = 20 V (50 mV/div, AC COUPLED)
2: Voltage at VAUXSW (10 V/div)
Figure 18. VMAIN Startup and Power–On Reset
Figure 19. VAUX Startup
50 mS / div
5 mS / div
1: VMAIN from 1 V to 3.3 V (1 V/div)
2: Voltage of PORB (2 V/div)
3: Voltage of ENABLE (2 V/div)
1: VAUX from 1.8 V to 20 V (5 V/div)
2: VAUXEN (2 V/div)
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9
MC34280
DETAILED OPERATING DESCRIPTION
General
Iref
The MC34280 is a power supply integrated circuit which
provides two boost regulated outputs and some power
management supervisory functions. Both regulators apply
Pulse–Frequency–Modulation (PFM). The main boost
regulator output can be externally adjusted from 2.7V to 5V.
An internal synchronous rectifier is used to ensure high
efficiency (achieve 87%). The auxiliary regulator with a
built–in power transistor can be configured to produce a
wide range of positive voltage (can be used to supply a LCD
contrast voltage). This voltage can be adjusted from +5V to
+25V by an external potentiometer; or by a microprocessor,
digitally through a 6–bit internal DAC.
The MC34280 has been designed for battery powered
hand–held products. With the low start–up voltage from 1V
and the low quiescent current (typical 35 µA); the MC34280
is best suited to operate from 1 to 2 AA/ AAA cell.
Moreover, supervisory functions such as low battery
detection, CPU power–on reset, and back–up battery
control, are also included in the chip. It makes the MC34280
the best one–chip power management solution for
applications such as electronic organizers and PDAs.
0.5
+ RIref
(A)
This bias current is used for all internal current bias as well
as setting VMAIN value. For the latter application, Iref is
doubled and fed as current sink at Pin 1. With external
resistor RMAINb tied from Pin1 to Pin32, a constant level
shift is generated in between the two pins. In close–loop
operation, voltage at Pin 1 (i.e. Output feedback voltage) is
needed to be regulated at the internal reference voltage level,
1.22V. Therefore, the delta voltage across Pin 1 and Pin 32
which can be adjusted by RMAINb determines the Main
Output voltage. If the feedback voltage drops below 1.22V,
internal comparator sets switching cycle to start. So, VMAIN
can be calculated as follows.
VMAIN
+ 1.22 ) RMAINb
RIref
(V)
From the above equation, although VMAIN can be
adjusted by RMAINb and RIref ratio, for setting VMAIN, it
is suggested, by changing RMAINb value with RIref kept at
480K. Since changing RIref will alter internal bias current
which will affect timing functions of Max ON time (TON1 )
and Min OFF time (TOFF1 ). Their relationships are as
follows;
Pulse Frequency Modulation (PFM)
+ 1.7
T
+ 6.4
OFF 1
Both regulators apply PFM. With this switching scheme,
every cycle is started as the feedback voltage is lower than
the internal reference. This is normally performed by
internal comparator. As cycle starts, Low–Side switch (i.e.
M1 in Figure 1) is turned ON for a fixed ON time duration
(namely, Ton) unless current limit comparator senses coil
current reaches its preset limit. In the latter case, M1 is OFF
instantly. So Ton is defined as the maximum ON time of M1.
When M1 is ON, coil current ramps up so energy is being
stored inside the coil. At the moment just after M1 is OFF,
the Synchronous Rectifier (i.e. M2 in Figure 1) or any
rectification device (such as Schottky Diode of Auxiliary
Regulator) is turned ON to direct coil current to charge up
the output bulk capacitor. Provided that coil current is not
reached, every switching cycle delivers fixed amount of
energy to the bulk capacitor. So for higher loading, larger
amount of energy (Charge) is withdrawn from the bulk
capacitor, and as output voltage is needed to regulated, larger
amount of Charge is needed to be supplied to the bulk
capacitor, that means switching frequency is needed to be
increased; and vice–versa.
T
ON 1
10 –11
10 –12
RIref (S)
RIref (S)
Continuous Conduction Mode and Discontinuous
Conduction Mode
In Figure 21, regulator is operating at Continuous
Conduction Mode. A switching cycle is started as the output
feedback voltage drops below internal voltage reference
VREF. At that instant, the coil current does not drop to zero
yet, and it starts to ramp up for the next cycle. As the coil
current ramps up, loading makes the output voltage to
decrease as the energy supply path to the output bulk
capacitor is disconnected. And after Ton elapsed, M1 is OFF,
M2 becomes ON, energy is dumped to the bulk capacitor.
Output voltage is increased as excessive charge is pumped
in, then it is decreased after the coil current drops below the
loading. Notice the abrupt spike of output voltage is due to
ESR of the bulk capacitor. Feedback voltage can be
resistor–divided down or level–shift down from the output
voltage. As this feedback voltage drops below VREF, next
switching cycle starts.
Main Regulator
Figure 20 shows the simplified block diagram of Main
Regulator. Notice that precise bias current Iref is generated
by a VI converter and external resistor RIref, where
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10
MC34280
DETAILED OPERATING DESCRIPTION (Cont’d)
VBAT
CMAINb
100 pF
2 x Iref
1
L1
33uH
RMAINb
1000 kOhm
31
VMAINFB
VMAINSW
ZLC
COMP3
M2
VMAIN
x2
32
+ve Edge Delay
0.5 V
senseFET
VDD
for Max. ON Time
Iref
IREF
R
Q
S
Qb
+
CMAIN
100 uF
M1
8
RIref
480 kOhm
VCOMP
Voltage
Reference
1.22 V
VMAINGND
DGND
30
COMP1
VDD
1–SHOT
for Min. OFF Time
R
Q
S
COMP2
AGND
Voltage Reference
& Current Bias
DGND
ILIM
Main Regulator
with Synchronous Rectifier
AGND
Figure 20. Simplified Block Diagram of Main Regulator
In Figure 22, regulator is operating at Discontinuous
Conduction Mode, waveforms are similar to those of Figure
21. However, coil current drops to zero before next
switching cycle starts.
T
SW
Ipk
To estimate conduction mode, below equation can be
used.
Iroom
+ h2
TON
L
Vin 2
Vout
+
+
*
I
1
* ILOAD
1
ǒ Ǔ
T
ON
h Vin
Vout
ǒǓ
LOAD
*
T
ON
T
SW
(S);
) Vin2
T
ON
L
(A)
For Discontinuous Conduction mode, provided that
current limit is not reached,
where, η is efficiency, refer to Figure 6
if Iroom > 0, the regulator is at Discontinuous Conduction
mode
if Iroom = 0, the regulator is at Critical Conduction mode
where coil current just drops to zero and next cycle starts.
if Iroom < 0, the regulator is at Continuous Conduction
mode
T
SW
Ipk
For Continuous Conduction mode, provided that current
limit is not reached,
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11
+
@
ǒ
2
Vin T ON
Vout
2 L I
LOAD
h Vin
@ @
+ VinL @ TON
@ @ *1
(A)
Ǔ
(S);
MC34280
Cycle Starts
VREF
Feedback Voltage
tdl
M1 ON
M1 OFF
M1 ON
M1 OFF
M1 ON
M1 OFF
M2 ON
M2 OFF
M2 ON
M2 OFF
M2 ON
tdh
M2 OFF
Ipk
TON
Loading Current, ILOAD
TSW
Coil Current
VMAIN + 1 V
VMAIN
V@SW
0V
VMAIN Zoom–In
Figure 21. Waveforms of Continuous Conduction Mode
Cycle Starts
Feedback Voltage
VREF
tdl
M1 ON
M1 OFF
M1 ON
M1 OFF
M1 ON
tdh
M2 OFF
M2 OFF
Ipk
M2 OFF
TON
Loading Current, ILOAD
Coil Current
TSW
VMAIN + 1 V
VMAIN
VIN
V@SW
0V
VMAIN Zoom–In
Figure 22. Waveforms of Discontinuous Conduction Mode
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M1 OFF
MC34280
DETAILED OPERATING DESCRIPTION (Cont’d)
Synchronous Rectification
switch OFF too early, large residue coil current flows
through the body diode of M2 and increases conduction loss.
Therefore, determination on the offset voltage is essential
for optimum performance.
A Synchronous Rectifier is used in the main regulator to
enhance efficiency. Synchronous rectifier is normally
realized by powerFET with gate control circuitry which,
however, involved relative complicated timing concerns. In
Figure 20, as main switch M1 is being turned OFF, if the
synchronous switch M2 is just turned ON with M1 not being
completed turned OFF, current will be shunt from the output
bulk capacitor through M2 and M1 to ground. This power
loss lowers overall efficiency. So a certain amount of dead
time is introduced to make sure M1 is completely OFF
before M2 is being turned ON, this timing is indicated as tdh
in Figure 21.
When the main regulator is operating in continuous mode,
as M2 is being turned OFF, and M1 is just turned ON with
M2 not being completed OFF, the above mentioned situation
will occur. So dead time is introduced to make sure M2 is
completed OFF before M1 is being turned ON, this is
indicated as tdl in Figure 21.
When the main regulator is operating in discontinuous
mode, as coil current is dropped to zero, M2 is supposed to
be OFF. Fail to do so, reverse current will flow from the
output bulk capacitor through M2 and then the inductor to
the battery input. It causes damage to the battery. So
M2–voltage–drop sensing comparator (COMP3 of Figure
20) comes with fixed offset voltage to switch M2 OFF
before any reverse current builds up. However, if M2 is
Auxiliary Regulator
The Auxiliary Regulator is a boost regulator, applies PFM
scheme to enhance high efficiency and reduce quiescent
current. An internal voltage comparator (COMP1 of Figure
23) detects when the voltage of Pin VAUXFBN drops below
that of Pin VAUXFBP. The internal power BJT is then
switched ON for a fixed–ON–time (or until the internal
current limit is reached), and coil current is allowed to build
up. As the BJT is switched OFF, coil current will flow
through the external Schottky diode to charge up the bulk
capacitor. After a fixed–mimimum–OFF time elapses, next
switching cycle will start if the output of the voltage
comparator is HIGH. Refer to Figure 23, the VAUX
regulation level is determined by the equation as follows,
VAUX
+
VAUXFBP
ǒ Ǔ
@ 1 ) RRAUXb
(V)
AUXa
Where Max ON Time, TON2, and Min OFF Time, TOFF2
can be determined by the following equations.
+ 1.7
+ 2.1
T
ON 2
T
OFF 2
10 –11
RIref (S)
10 –12
RIref (S)
VBAT
L2
33uH
RAUXa
200 kOhm
RAUXb
2200 kOhm
VBAT
VAUXREF
19
VAUXFBP
18
VAUXFBN
20
VAUXBDV
21
VAUXSW
25
+ve Edge Delay
senseBJT
for Max. ON Time
2.2 V
6–Bit
Counter
VAUXADJ
VAUXCON
VAUXEN
Q
S
Qb
CAUX
33 uF
Q1
6–Bit
6
VAUXEMR
VCOMP
1.1 V
15
16
R
26
COMP1
Input
Logic
1–SHOT
for Min. OFF Time
17
Auxiliary Level Control
+
ILIM
COMP2
AGND
Auxiliary Regulator
Figure 23. Simplified Block Diagram of Auxiliary Regulator
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MC34280
DETAILED OPERATING DESCRIPTION (Cont’d)
Auxiliary Regulator (Cont’d)
Current Limit for Both regulators
As the Auxiliary Regulator control scheme is the same as
the Main Regulator, equations for conduction mode, Tsw
and Ipk can also be applied, However, h to be used for
caculation is refered to Figure 8, 10, or 12.
If external potentiometer is used for voltage level
adjustment, internal 1.22V reference voltage can be used as
shown in the application diagram of Figure 24.
From Figure 20 and Figure 23, sense devices (senseFET
or senseBJT) are applied to sample coil current as the
low–side switch is ON. With that sample current flowing
through a sense resistor, sense–voltage is developed.
Threshold detector (COMP2 in both figures) detects
whether the sense–voltage is higher than preset level. If it
happens, detector output reset the flip–flop to switch OFF
low–side switch, and the switch can only be ON as next
cycle starts.
Cpor
c = 80n
CVDD
c = 20u
GND
GND
VBAT
CMAINb
c = 100p
Ren
r = 1000 k
GND
GND
Vref
RMAINb
r = 1000 k
Riref
r = 480 k
RLBb
r = 900 k
7
6
5
4
3
2
1
9
GND
GND
8
RLBa
r = 300 k
PORB
LOWBAT
10
32
11
31
12
30
LIBATON
LIBATCL
29
MC34280
13
GND
28
15
27
16
26
GND
25
VBAT
17
18 19 20
21 22
LMAIN
L = 33uH
VAUX
Caux
c = 30u
LAUX
L = 33uH
VBAT
GND
GND 1N5818
23 24
VAUXEN
CMAIN
c = 100u
VBAT
14
GND
GND
1N5817
GND
GND
Rauxb
r = 2.2 M
Rauxa
r = 200 k
GND
Figure 24. Application Diagram with External Potentiometer for VAUX Adjustment
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14
MC34280
DETAILED OPERATING DESCRIPTION (Cont’d)
Auxiliary voltage adjustment
auxiliary regulator. Meanwhile, the startup circuitry will be
shut down. The Power–ON Reset block also starts to charge
up the external capacitor tied from Pin PDELAY to ground
with precise constant current. As the Pin PDELAY’s voltage
reaches an internal set threshold, Pin PORB will go HIGH
to awake the microprocessor. And,
The VAUX voltage can be adjusted by the microprocessor
control signals, namely, VAUXCON and VAUXADJ. The
control signal pattern is shown in Figure 4. The input truth
table is shown in Figure 25.
When VAUXEN is LOW, the Auxiliary Regulator is shut
down, only the counter content is retained. The initial
counter content is mid–range of 6–bit.
At the rising edge of VAUXCON, if VAUXADJ is LOW
(/ HIGH), each following VAUXADJ pulse enclosed by the
VAUXCON pulse packet increments (/ decrements) the
6–bit counter. At the falling edge of VAUXCON, the counter
content is then latched to a 6–bit DAC and is converted to a
voltage level of VAUXREF between 1.1V and 2.2V.
At the falling edge of VAUXCON, if VAUXADJ is HIGH,
the counter content will be reset to mid–range (1.65V). This
is also the default setting just after power–ON reset is
removed.
The 6–bit DAC converts the counter content to voltage
level ranging from 1.1 to 2.2V, so there are altogether 64
levels, and each voltage step is 17mV. When the counter
content reaches its maximum or minimum, further pulse of
VAUXADJ will be disregarded, until counting direction is
changed.
T
POR
+
ǒ Ǔ
1.22
0.5
C por
RIref (S)
From Figure 3, if, by any chance, VMAIN is dropped
below the user–defined VMAIN output level minus 0.5V,
PORB will go LOW to indicate the OUTPUT LOW
situation. And, the IC will continue to function until the
VMAIN is dropped below 2V.
Low–Battery–Detect
The Low–Battery–Detect block is actually a voltage
comparator. Pin LOWBAT is LOW, if the voltage of external
Pin LOWBATSEN is lower than 0.85V internal reference.
The IC will neglect this warning signal. Pin LOWBAT will
become HIGH, if the voltage of external Pin LOWBATSEN
is recovered to more than 1.1V. From Figure 1, with external
resistors
RLBa
and
RLBb,
thresholds
of
Low–Battery–Detect can be adjusted based on the equations
below.
Power–ON Reset
V
LOBAThigh
The Power–ON Reset block accepts external active HIGH
ENABLE signal to activate the IC after battery is plugged in.
During the startup period (see Figure 2), the internal startup
circuitry is enabled to pump up VMAIN to a certain voltage
level, which is the user–defined VMAIN output level minus
an offset of 0.15V. The internal power–on reset signal is then
disabled to activate the main regulator and conditionally the
V
LOBATlow
+ 1.1
+ 0.85
ǒ Ǔ
ǒ Ǔ
1
) RRLBa
(V)
) RRLBa
(V)
LBb
1
LBb
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
VAUXEN
VAUXCON
VAUXADJ
0
X
X
Hold the counter content
1
0
X
Hold the counter content
1
0
Set ”countup” flag HIGH
1
1
Set ”countup” flag LOW
1
1
RESULT
Increment (/ Decrement) the counter if ”countup” flag is HIGH (/ LOW)
1
0
DAC the counter content to VAUXREF voltage level (1.1 – 2.2 V)
1
1
Reset the counter to mid–range, then convert the counter content to
VAUXREF voltage level (1.65V)
Figure 25. Auxiliary Voltage Control Input Truth Table
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15
MC34280
DETAILED OPERATING DESCRIPTION (Cont’d)
Lithium–Battery backup
feedback response, destabilizing the regulator and creating
a larger ripple at the output. From Figure 1, ripple of Main
and AUX regulator can be reduced by CMAINb, CAUXa
and CAUXb ranging from 100pF to 100nF respectively.
Reducing the ripple is also with improving efficiency,
system designers are recommended to do experiments on
capacitance values based on the PCB design.
The backup conduction path which is provided by an
internal power switch (typ. 13 Ohm) can be controlled by
internal logic or microprocessor.
If LIBATCL is LOW, the switch, which is then controlled
by internal logic, is ON when the battery is removed and
VMAIN is dropped below LIBATIN by more than 100mV,
and returns OFF when the battery is plugged back in.
If LIBATCL is HIGH, the switch is controlled by
microprocessor through LIBATON. The truth table is shown
in Figure 26.
Bypass Capacitors
If the metal leads from battery to coils are long, its stray
resistance can put additional power loss to the system as AC
current is being conducted. In that case, bypass capacitors
(CMAINbp and CAUXbp of Figure 1) are recommended to
remove AC components of coil currents to minimize that
power loss to optimize efficiency.
Efficiency and Output Ripple
For both regulators, when large values are used for
feedback resistors (> 50kOhm), stray capacitance of pin 1
(VMAINFB) and pin 20 (VAUXFBN) can add ”lag” to the
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
LIBATCL
LIBATON
0
X
The switch is ON when the battery is removed and VMAIN is dropped below LIBATIN
by more than 100mV; The switch is OFF when the battery is plugged in.
Action
1
0
The switch is OFF
1
1
The switch is ON
Figure 26. Lithium Battery Backup Control Truth Table
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16
MC34280
PACKAGE DIMENSIONS
32–LEAD LQFP
FTB SUFFIX
CASE 873A–02
A
4X
A1
AC T–U Z
25
BASE
METAL
ÉÉ
ÉÉ
ÉÉ
–U–
B
F
V
B1
DETAIL Y
17
8
9
D
J
SECTION AE–AE
4X
–Z–
9
V1
M
N
1
–T–
0.20 (0.008)
32
0.20 (0.008) AB T–U Z
0.20 (0.008) AC T–U Z
S1
–T–, –U–, –Z–
S
DETAIL AD
G
–AB–
SEATING
PLANE
–AC–
0.10 (0.004) AC
AE
8X
M_
P
R
AE
C E
W
K
X
DETAIL AD
Q_
GAUGE PLANE
H
0.250 (0.010)
DETAIL Y
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17
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DATUM PLANE –AB– IS LOCATED AT BOTTOM
OF LEAD AND IS COINCIDENT WITH THE LEAD
WHERE THE LEAD EXITS THE PLASTIC BODY AT
THE BOTTOM OF THE PARTING LINE.
4. DATUMS –T–, –U–, AND –Z– TO BE
DETERMINED AT DATUM PLANE –AB–.
5. DIMENSIONS S AND V TO BE DETERMINED AT
SEATING PLANE –AC–.
6. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION. ALLOWABLE PROTRUSION
IS 0.250 (0.010) PER SIDE. DIMENSIONS A AND B
DO INCLUDE MOLD MISMATCH AND ARE
DETERMINED AT DATUM PLANE –AB–.
7. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. DAMBAR PROTRUSION SHALL
NOT CAUSE THE D DIMENSION TO EXCEED
0.520 (0.020).
8. MINIMUM SOLDER PLATE THICKNESS SHALL
BE 0.0076 (0.0003).
9. EXACT SHAPE OF EACH CORNER MAY VARY
FROM DEPICTION.
DIM
A
A1
B
B1
C
D
E
F
G
H
J
K
M
N
P
Q
R
S
S1
V
V1
W
X
MILLIMETERS
MIN
MAX
7.000 BSC
3.500 BSC
7.000 BSC
3.500 BSC
1.400
1.600
0.300
0.450
1.350
1.450
0.300
0.400
0.800 BSC
0.050
0.150
0.090
0.200
0.500
0.700
12_ REF
0.090
0.160
0.400 BSC
1_
5_
0.150
0.250
9.000 BSC
4.500 BSC
9.000 BSC
4.500 BSC
0.200 REF
1.000 REF
INCHES
MIN
MAX
0.276 BSC
0.138 BSC
0.276 BSC
0.138 BSC
0.055
0.063
0.012
0.018
0.053
0.057
0.012
0.016
0.031 BSC
0.002
0.006
0.004
0.008
0.020
0.028
12_ REF
0.004
0.006
0.016 BSC
1_
5_
0.006
0.010
0.354 BSC
0.177 BSC
0.354 BSC
0.177 BSC
0.008 REF
0.039 REF
MC34280
Notes
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18
MC34280
Notes
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19
MC34280
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MC34280/D