ONSEMI MC10153

SEMICONDUCTOR TECHNICAL DATA
The MC10153 is a high speed, low power, MECL quad latch consisting of
four bistable latch circuits with D type inputs and gated Q outputs. Open
emitters allow a large number of outputs to be wire-ORed together. Latch
outputs are gated, allowing direct wiring to a bus. When the clock is low, outputs
will follow D inputs. Information is latched on positive going transition of the
clock. The MC10153 provides the same logic function as the MC10133, except
for inversion of the clock.
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
PD = 310 mW typ/pkg (No Load)
tpd = 4.0 ns typ
tr, tf = 2.0 ns typ (20%–80%)
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
LOGIC DIAGRAM
D0
3
Q0
G0
D1
5
7
Q1
CE
4
2
Q0
6
Q1
DIP
PIN ASSIGNMENT
CC 13
CE 12
D2 9
G1 10
Q2
D3 14
1
16
VCC2
Q0
2
15
Q3
D0
3
14
D3
CE
4
13
CC
G0
5
12
CE
Q1
6
11
Q2
D1
7
10
G1
VEE
8
9
D2
11 Q2
15 Q3
Q3
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
TRUTH TABLE
G
C
D
Qn+1
H
L
L
L
X
H
L
L
X
X
L
H
L
Qn
L
H
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
C = CC + CE
3/93
 Motorola, Inc. 1996
VCC1
3–52
REV 5
MC10153
ELECTRICAL CHARACTERISTICS
Test Limits
Characteristic
Symbol
Pin
Pi
Under
Test
IE
8
83
IinH
3
4
5
13
390
390
560
460
Power Supply Drain Current
Input Current
–30°C
Min
+25°C
Max
Min
Typ
+85°C
Max
Unit
75
83
mAdc
245
245
350
290
245
245
350
290
µAdc
Max
Min
3
0.5
Logic 1
VOH
2
2
–1.060
–1.060
–0.890
–0.890
–0.960
–0.960
–0.810
–0.810
–0.890
–0.890
–0.700
–0.700
Vdc
Output Voltage
Logic 0
VOL
2
2
2
–1.890
–1.890
–1.890
–1.675
–1.675
–1.675
–1.850
–1.850
–1.850
–1.650
–1.650
–1.650
–1.825
–1.825
–1.825
–1.615
–1.615
–1.615
Vdc
Threshold Voltage
Logic 1
VOHA
2
2
2
2[
2]
2]
2
2
–1.080
–1.080
–1.080
–1.080
–1.080
–1.080
–1.080
–1.080
Threshold Voltage
Logic 0
VOLA
2
2
2
2[
2]
2]
t3+2+
t4–2+
t5–2+
tsetup
thold
2
2
2
3
3
1.0
1.0
1.0
2.5
1.5
5.6
5.6
3.2
1.0
1.0
1.0
2.5
1.5
4.0
4.0
2.0
0.7
0.7
5.4
5.6
3.1
1.1
1.2
1.0
2.5
1.5
5.9
6.2
3.4
Switching Times
0.5
µAdc
IinL
Output Voltage
0.3
–0.980
–0.980
–0.980
–0.980
–0.980
–0.980
–0.980
–0.980
–0.910
–0.910
–0.910
–0.910
–0.910
–0.910
–0.910
–0.910
–1.655
–1.655
–1.655
–1.655
–1.655
–1.655
–1.630
–1.630
–1.630
–1.630
–1.630
–1.630
Vdc
–1.595
–1.595
–1.595
–1.595
–1.595
–1.595
(50Ω Load)
Propagation Delay
Vdc
ns
Rise Time
(20 to 80%)
t2+
2
1.0
3.6
1.1
2.0
3.5
1.1
3.8
Fall Time
(20 to 80%)
t2–
2
1.0
3.6
1.1
2.0
3.5
1.1
3.8
[ Output level to be measured after a clock pulse has been applied to the clock input (Pin 4)
VIHmax
VILmin
] Data input at proper high/low level while clock pulse is high so that device latches ar proper high/low level for test. Levels are measured after
device has latched.
* Latch set to zero state before test.
MECL Data
DL122 — Rev 6
3–53
MOTOROLA
MC10153
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts)
Characteristic
Power Supply Drain Current
Input Current
@ Test Temperature
VIHmax
VILmin
VIHAmin
VILAmax
VEE
–30°C
–0.890
–1.890
–1.205
–1.500
–5.2
+25°C
–0.810
–1.850
–1.105
–1.475
–5.2
+85°C
–0.700
–1.825
–1.035
–1.440
–5.2
Symbol
Pin
Under
Test
IE
8
IinH
3
4
5
13
IinL
3
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
VIHmax
VEE
(VCC)
Gnd
8
1, 16
8
8
8
8
1, 16
1, 16
1, 16
1, 16
3
8
1, 16
VILmin
VIHAmin
VILAmax
13
3
4
5
13
Output Voltage
Logic 1
VOH
2
2
3
3
4
13
8
8
1, 16
1, 16
Output Voltage
Logic 0
VOL
2
2
2
3,5
3,13
13
3,4
8
8
8
1, 16
1, 16
1, 16
8
8
8
8
8
8
8
8
1, 16
1, 16
1, 16
1, 16
1, 16
1, 16
1, 16
1, 16
13
8
8
8
8
8
8
1, 16
1, 16
1, 16
1, 16
1, 16
1, 16
Pulse In
Pulse Out
–3.2 V
+2.0 V
3
4
5
3
3
2
2
2
2
2
8
8
8
8
8
1, 16
1, 16
1, 16
1, 16
1, 16
Threshold Voltage
Threshold Voltage
Switching Times
Logic 1
Logic 0
VOHA
VOLA
2
2
2
2[
2]
2]
2
2
3
2
2
2
2[
2]
2]
3
(50Ω Load)
Propagation Delay
3
3
2
2
2
3
3
5
3
3
3
4
13
4
4
4
5
3
3
3
+1.11 V
t3+2+
t4–2+
t5–2+
tsetup
thold
4
4
4
3*
Rise Time
(20 to 80%)
t2+
2
3
2
8
1, 16
Fall Time
(20 to 80%)
t2–
2
3
2
8
1, 16
[ Output level to be measured after a clock pulse has been applied to the clock input (Pin 4)
VIHmax
VILmin
] Data input at proper high/low level while clock pulse is high so that device latches ar proper high/low level for test. Levels are measured after
device has latched.
* Latch set to zero state before test.
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.
MOTOROLA
3–54
MECL Data
DL122 — Rev 6
MC10153
OUTLINE DIMENSIONS
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 775–02
ISSUE C
0.007 (0.180) M T L–M
B
Y BRK
–N–
U
N
S
0.007 (0.180) M T L–M
S
S
N
S
D
–L–
–M–
Z
W
20
D
1
V
0.010 (0.250)
G1
X
S
T L–M
S
N
S
VIEW D–D
A
0.007 (0.180) M T L–M
S
N
S
R
0.007 (0.180) M T L–M
S
N
S
Z
C
H
–T–
SEATING
PLANE
F
VIEW S
G1
0.010 (0.250) S T L–M
S
0.007 (0.180)
M
T L–M
S
N
S
VIEW S
S
N
S
NOTES:
1. DATUMS –L–, –M–, AND –N– DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS PLASTIC
BODY AT MOLD PARTING LINE.
2. DIMENSION G1, TRUE POSITION TO BE
MEASURED AT DATUM –T–, SEATING PLANE.
3. DIMENSIONS R AND U DO NOT INCLUDE MOLD
FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250)
PER SIDE.
4. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN THE
PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS,
GATE BURRS AND INTERLEAD FLASH, BUT
INCLUDING ANY MISMATCH BETWEEN THE TOP
AND BOTTOM OF THE PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037 (0.940).
THE DAMBAR INTRUSION(S) SHALL NOT CAUSE
THE H DIMENSION TO BE SMALLER THAN 0.025
(0.635).
MECL Data
DL122 — Rev 6
N
K
0.004 (0.100)
J
S
K1
E
G
0.007 (0.180) M T L–M
3–55
DIM
A
B
C
E
F
G
H
J
K
R
U
V
W
X
Y
Z
G1
K1
INCHES
MIN
MAX
0.385
0.395
0.385
0.395
0.165
0.180
0.090
0.110
0.013
0.019
0.050 BSC
0.026
0.032
0.020
–––
0.025
–––
0.350
0.356
0.350
0.356
0.042
0.048
0.042
0.048
0.042
0.056
–––
0.020
2_
10 _
0.310
0.330
0.040
–––
MILLIMETERS
MIN
MAX
9.78
10.03
9.78
10.03
4.20
4.57
2.29
2.79
0.33
0.48
1.27 BSC
0.66
0.81
0.51
–––
0.64
–––
8.89
9.04
8.89
9.04
1.07
1.21
1.07
1.21
1.07
1.42
–––
0.50
2_
10 _
7.88
8.38
1.02
–––
MOTOROLA
MC10153
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE V
–A–
16
9
1
8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
–B–
C
L
DIM
A
B
C
D
E
F
G
H
K
L
M
N
–T–
K
N
SEATING
PLANE
M
E
F
J
G
D
16 PL
0.25 (0.010)
16 PL
0.25 (0.010)
M
T A
T B
M
–A–
9
1
8
B
F
C
L
S
–T–
SEATING
PLANE
K
H
G
D
M
J
16 PL
0.25 (0.010)
M
MILLIMETERS
MIN
MAX
19.05
19.93
6.10
7.49
–––
5.08
0.39
0.50
1.27 BSC
1.40
1.65
2.54 BSC
0.21
0.38
3.18
4.31
7.62 BSC
0_
15 _
0.51
1.01
S
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
16
S
INCHES
MIN
MAX
0.750
0.785
0.240
0.295
–––
0.200
0.015
0.020
0.050 BSC
0.055
0.065
0.100 BSC
0.008
0.015
0.125
0.170
0.300 BSC
0_
15 _
0.020
0.040
T A
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
DIM
A
B
C
D
F
G
H
J
K
L
M
S
INCHES
MIN
MAX
0.740
0.770
0.250
0.270
0.145
0.175
0.015
0.021
0.040
0.70
0.100 BSC
0.050 BSC
0.008
0.015
0.110
0.130
0.295
0.305
0_
10 _
0.020
0.040
MILLIMETERS
MIN
MAX
18.80
19.55
6.35
6.85
3.69
4.44
0.39
0.53
1.02
1.77
2.54 BSC
1.27 BSC
0.21
0.38
2.80
3.30
7.50
7.74
0_
10 _
0.51
1.01
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
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Opportunity/Affirmative Action Employer.
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◊
MOTOROLA
3–56
MC10153/D
MECL Data
DL122 — Rev 6