MDTIC MDT90P01 4-bit micro-controller Datasheet

MDT90P01
Sleep Mode for power saving
1. General Description
oscillator start-up time : 20ms
This EPROM-Based 4-bit micro-controller uses a fully
8 bit real time clock/counter(RTCC) with 8-bit
static CMOS technology process to achieve higher
programmable prescaler
speed
On-chip RC oscillator based Watchdog
and
smaller
size
with
the
low
power
consumption and high noise immunity. On chip
Timer(WDT)
memory includes 0.5K words of ROM, and 30 nibbles
Wake-up from sleep on pin change
of static RAM.
3. Applications
2. Features
The application areas of this MDT90P01 range
The followings are some of the features on the
from appliance motor control and high speed
hardware and software :
automotive
to
low
power
remote
transmitters/receivers, small instruments, chargers,
Fully COMS static design
toy, automobile and PC pe-ripheral … etc.
4-bit data bus
On chip EPROM size : 0.5 K words
Internal RAM size : 30 nibbles
4. Pin Assignment
(24 general purpose registers, 6 special
MDT90P01ST2611(SOT-26)
registers)
PB0 1
VSS 2
PB1 3
24 single word instructions
11-bit instructions
2-level stacks
6 PB3
5 VDD
4 PB2/RTCC
Operating voltage : 2.5 V ~ 5.5 V
Internal RC oscillator : 4MHz / 8MHz
Power-on Reset
This specification is subject to be changed without notice. Please visit our web site for the most updated information.
http://www.mdtic.com.tw
P. 1
2008/5 Ver. 1.0
MDT90P01
5. Order Information
Device
ROM
(Words)
RAM
(Nibbles)
I/O
MDT90P01ST2611
512
24
4
Timer
(8 Bit)
Package
1
SOT-26
Remark
-
6. Block Diagram
Stack Two Levels
RAM
24 x 4
ROM
512×11
9 bits
9 bits
Program Counters
11 bits
Instruction
Register
Special Register
Port B
Oscillator Circuit
(INTRC 4M / 8Mhz)
Instruction
Decoder
Port
PB0~PB3
4 bits
Control Circuit
D0~D3
Data 4-bit
Power on Reset
Power Down Reset
Working Register
Status Register
ALU
8-bit Timer /Counter
WDT/OST
Timer
Prescale
PB2(RTCC)
This specification is subject to be changed without notice. Please visit our web site for the most updated information.
http://www.mdtic.com.tw
P. 2
2008/5 Ver. 1.0
MDT90P01
7. Pin Function Description
Pin Name
I/O
PB0
I/O
Function Description
Port B, TTL input level .Can be software programmed for internal weak
pill-up and wake-up from SLEEP on pin change
PB1
I/O
Port B, TTL input level .Output is open drain type. Can be software
programmed for wake-up from SLEEP on pin change
PB2/RTCC
I/O
Real Time Clock/Counter, Schmitt Trigger input levels. .Output is open
drain type.
PB3
I/O
Port B, TTL input level . Can be software programmed for internal weak
pill-up and wake-up from SLEEP on pin change
Vdd
Power supply
Vss
Ground
8. Memory Map
(A) Register Map
Address
Description
BANK0
01
RTCCL
02
PCL
03
STATUSL
04
STATUSH
05
IODS
06
PORTB
07
RTCCH
08~1F
General purpose registers
(1) RTCCL (Real Time Counter/Counter Register) : R1
RTCCH (Real Time Counter/Counter Register) : R7
This specification is subject to be changed without notice. Please visit our web site for the most updated information.
http://www.mdtic.com.tw
P. 3
2008/5 Ver. 1.0
MDT90P01
(2) PC (Program Counter) : R2
Write PC --- unchanged
JUMP(CALL) --- from instruction word
RTWI --- from STACK
A8~A4
A3~A0
Write PC --- from ALU
JUMP( CALL) --- from instruction word
RTWI --- from STACK
(3) STATUSL (Status register) : R3
Bit
Symbol
Function
0
TF
WDT Timer overflow Flag bit
1
C
Carry bit
2
Z
Zero bit
3
PF
Power loss Flag bit
STATUSH(Status register) : R4
Bit
Symbol
Function
0
——
Unimplemented
1
——
Unimplemented
2
SCALL
0: JUMP (initial)
1: CALL (Change JUMP instruction to CALL instruction.
This bit will be clear to zero automatically after CALL
was executed)
3
PCWUF
Pin change wake up from sleep
This specification is subject to be changed without notice. Please visit our web site for the most updated information.
http://www.mdtic.com.tw
P. 4
2008/5 Ver. 1.0
MDT90P01
(4) IODS(I/O data select) : R5
Bit
Symbol
0
IODS0
Function
0: Output the PORTB0 register data to PB0(initial)
Output the PORTB3 register data to PB3(initial)
1: Output the input clock of RTCC register to PB0
Output the inverted input clock of RTCC register to PB3
1
IODS1
0: Output the PORTB1 register data to PB1(initial)
Output the PORTB2 register data to PB2(initial)
1: Output the input clock of RTCC register to PB1
Output the inverted input clock of RTCC register to PB2
2
RCOS
0: RTCC PIN can also be the clock input (initial)
1: RTCC PIN can also be the RC oscillater input
3
——
Fosc/4
Unimplemented
0
TCE
1
RTCC PIN
1
prescaler
0
Sync with
internal
clocks
RTCC reg
CPIOB0/1
ENB
1
RCOS
TCS
D
PSC
PB0/1
D
0
q
e
PORTB0/1
data
IODS
TTL
CPIOB3/2
1
D
ENB
PB3/2
D
q
0
e
PORTB3/2
data
IODS
TTL
(5) PORT B : R6
PB3~PB0, I/O Register
This specification is subject to be changed without notice. Please visit our web site for the most updated information.
http://www.mdtic.com.tw
P. 5
2008/5 Ver. 1.0
MDT90P01
(6) TMRL (Time Mode Register Low Nibble) (only write)
Bit
Symbol
Function
Prescaler Value
2—0
PS1—0
3
PSC
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Prescaler assignment bit :
0 — RTCC
1 — Watchdog Timer
RTCC rate
1:2
1:4
1:8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
WDT rate
1:1
1:2
1:4
1:8
1 : 16
1 : 32
1 : 64
1 : 128
TMRH (Time Mode Register High Nibble) (only write)
Bit
Symbol
0
TCE
1
TCS
2
PBPHB
3
PBWUB
Function
RTCC signal Edge :
0 — Increment on low-to-high transition on RTCC pin
1 — Increment on high-to-low transition on RTCC pin
RTCC signal set :
0 — Internal instruction cycle clock
1 — Transition on RTCC pin
PortB pull-high :
0 — Enable
1 — Disable
PortB wake-up :
0 — Enable
1 — Disable
(7) CPIO B (Control Port I/O Mode Register)
The CPIO register is “write-only”
=“0”, I/O pin in output mode;
=“1”, I/O pin in input mode.
(8) Configurable options for EPROM (Set by writer) :
Oscilltor Type
INTRC 4Mhz
INTRC 8Mhz
Watchdog Timer control
Watchdog timer disable all the time
Watchdog timer enable all the time
This specification is subject to be changed without notice. Please visit our web site for the most updated information.
http://www.mdtic.com.tw
P. 6
2008/5 Ver. 1.0
MDT90P01
Power Edge Detect
PED Disable
PED Enable
Security state
Security Disable
Security Enable
The default security state of EPROM is weak disable. Once the IC was set to
enable or disable, it’s forbidden to change.
(B) Program Memory
Address
Description
000-1FF
Program memory
000
The starting address of power on , pin change or WDT time-out reset.
9. Reset Condition for all Registers
Register
Address
Power-On Reset
WDT Reset
RTCCL
01h
xxxx
uuuu
PC
02h
0000
0000
STATUSL
03h
1xx1
#uu#
STATUSH
04h
0000
0000
PORT B
06h
xxxx
uuuu
RTCCH
07h
xxxx
uuuu
Note : u=unchanged, x=unknown, - =unimplemented, read as “0”
#=value depends on the condition of the following table
Condition
STATUSH: bit 3 STATUSL: bit 3
STATUSL: bit 0
WDT reset (not during SLEEP)
0
1
0
WDT reset during SLEEP
0
0
0
Wake-up from SLEEP on pin change
1
0
1
This specification is subject to be changed without notice. Please visit our web site for the most updated information.
http://www.mdtic.com.tw
P. 7
2008/5 Ver. 1.0
MDT90P01
10. Instruction Set :
Mnemonic
Operands
Instruction Code
Function
Operating
Status
100 0000 0000
NOP
No operation
None
100 0000 0001
CLRWT
Clear Watchdog timer
0→WT
TF, PF
100 0000 0010
SLEEP
Sleep mode
0→WT, stop OSC
TF, PF
100 0000 0011
TMODEL
Load W to TMRL register
W→TMRL
None
100 0000 0101
TMODEH
Load W to TMRH register
W→TMRH
None
100 1010 iiii
RTWI
Return,place immediate to W
Stack→PC , I→W
None
100 0000 0rrr
CPIO R
Control I/O port register
W→CPIO r
None
111 100r rrrr
STWR R
Store W to register
W→R
None
1t1 101r rrrr
LDR R, t
Load register
R→t
Z
100 1000 iiii
LDWI I
Load immediate to W
I→W
None
1t1 110r rrrr
ADDWR R, t
Add W and register
W + R→t
C, Z
1t1 111r rrrr
DECRSZ R, t
Decrement register, skip if zero
R ﹣1→t
None
1t1 001r rrrr
ANDWR R, t
AND W and register
R ∩ W→t
Z
100 0010 iiii
ANDWI i
AND W and immediate
i ∩ W→W
Z
1t1 011r rrrr
IORWR R, t
Inclu. OR W and register
R ∪ W→t
Z
100 0110 iiii
IORWI i
Inclu. OR W and immediate
i ∪ W→W
Z
1t1 010r rrrr
XORWR R, t
Exclu. OR W and register
R ♁ W→t
Z
100 0100 iiii
XORWI i
Exclu. OR W and immediate
i ♁ W→W
Z
1t1 000r rrrr
RRR
R, t
Rotate right register
010 0bbr rrrr
BCR
R, b
Bit clear
R(n) →R(n-1),
0→R(3), R(0)→x
0→R(b)
None
011 0bbr rrrr
BSR
R, b
Bit set
1→R(b)
None
010 1bb rrrr
BTSC R, b
Bit Test, skip if clear
Skip if R(b)=0
None
011 1bbr rrrr
BTSS R, b
Bit Test, skip if set
Skip if R(b)=1
None
00n nnnn nnnn
JUMP
JUMP(CALL) to address
n→PC
None
n
None
Note :
W
WT
TMRL
TMRH
CPIO
TF
PF
PC
OSC
Inclu.
Exclu.
AND
:
:
:
:
:
:
:
:
:
:
:
:
Working register
Watchdog timer
Time mode register low nibble
TIme mode register high nibble
Control I/O port register
Timer overflow flag
Power loss flag
Program Counter
Oscillator
Inclusive ‘∪’
Exclusive ‘♁’
Logic AND ‘∩’
b
t
:
:
Bit position
Target
0:
Working register
1:
General register
R
C
:
:
General register address
Carry flag
Z
:
Zero flag
x
i
n
:
:
:
Don’t care
Immediate data ( 4 bits )
Immediate address
This specification is subject to be changed without notice. Please visit our web site for the most updated information.
http://www.mdtic.com.tw
P. 8
2008/5 Ver. 1.0
MDT90P01
11. Oscillator start up timer condition :
Oscillator Type
Power-on reset
Subsequest resets
INTRC
20ms
20ms
12. Electrical Characteristics
(A) Operating Voltage & Frequency
Vdd ﹕2.5V ~ 5.5 V
Frequency﹕4 Hz & 8 MHz
(B) Input Voltage
@ Vdd=5.0 V, Temperature=25 ℃
Vil
Vih
Port
Min.
Max.
PB3, PB0
Vss
1.0 V
PB1
Vss
1.0V
PB2
Vss
1.2V
PB3, PB0
2.0 V
Vdd
PB1
3.6 V
Vdd
PB2
3.6 V
Vdd
*Threshold Voltage :
PB3 & PB0 Vth=1.55V
PB1 Vil=1.1 V, Vih=3.5 V (Schmitt Trigger)
PB2 Vil=1.4 V, Vih=3.4 V (Schmitt Trigger)
(C) Output Voltage﹕
@ Vdd=5.0 V, Temperature=25 ℃, the typical value as followings :
PB Port
Ioh=-20.0 mA
Voh=3.8 V
Iol=20.0 mA
Vol=0.4V
Ioh=-5.0 mA
Voh=4.5 V
Iol=5.0 mA
Vol=0.12 V
*PB1 & PB2 : Output is open drain type.
This specification is subject to be changed without notice. Please visit our web site for the most updated information.
http://www.mdtic.com.tw
P. 9
2008/5 Ver. 1.0
MDT90P01
(D) Leakage Current
@ Vdd=5.0 V, Temperature=25 ℃, the typical value as followings :
Iil
- 0.1μA (Max.)
Iih
+ 0.1μA (Max.)
(E) Sleep Current
@WDT-Disable, Temperature=25 ℃, the typical value as followings :
Vdd=2.5 V
Idd<1.0 μA
Vdd=3.0 V
Idd<1.0 μA
Vdd=4.0 V
Idd<1.0 μA
Vdd=5.0 V
Idd<1.0 μA
Vdd=5.5V
Idd<1.0 μA
@WDT-Enable, Temperature=25 ℃, the typical value as followings :
Vdd=2.5 V
Idd=1.5 μA
Vdd=3.0 V
Idd=2.5 μA
Vdd=4.0 V
Idd=5.0 μA
Vdd=5.0 V
Idd=10.0 μA
Vdd=5.5 V
Idd=15.0 μA
(F) Operating Current
Temperature=25 ℃, the typical value as followings :
(i) WDT-Enable & PED -Enable
Voltage/Frequency
4M
8M
Sleep
2.5 V
240uA
255uA
1.5 μA
3.0 V
320uA
360uA
2.5 μA
4.0 V
440uA
470uA
5.0 μA
5.0 V
565uA
610uA
10.0 μA
5.5 V
635uA
700uA
15.0 μA
This specification is subject to be changed without notice. Please visit our web site for the most updated information.
http://www.mdtic.com.tw
P. 10
2008/5 Ver. 1.0
MDT90P01
(G) The basic WDT time-out cycle time
@ Vdd=5.0v ,Temperature=25 ℃, the typical value as followings :
Voltage (V)
Basic WDT time-out cycle time (ms)
2.5
26.6
3.0
24.0
4.0
21.2
5.0
19.4
5.5
18.8
This specification is subject to be changed without notice. Please visit our web site for the most updated information.
http://www.mdtic.com.tw
P. 11
2008/5 Ver. 1.0
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