UAA2016 Zero Voltage Switch Power Controller The UAA2016 is designed to drive triacs with the Zero Voltage technique which allows RFI−free power regulation of resistive loads. Operating directly on the AC power line, its main application is the precision regulation of electrical heating systems such as panel heaters or irons. A built−in digital sawtooth waveform permits proportional temperature regulation action over a ±1°C band around the set point. For energy savings there is a programmable temperature reduction function, and for security a sensor failsafe inhibits output pulses when the sensor connection is broken. Preset temperature (i.e. defrost) application is also possible. In applications where high hysteresis is needed, its value can be adjusted up to 5°C around the set point. All these features are implemented with a very low external component count. http://onsemi.com ZERO VOLTAGE SWITCH POWER CONTROLLER MARKING DIAGRAMS PDIP−8 P SUFFIX CASE 626 8 Features • • • • • • • • • 1 Zero Voltage Switch for Triacs, up to 2.0 kW (MAC212A8) Direct AC Line Operation Proportional Regulation of Temperature over a 1°C Band Programmable Temperature Reduction Preset Temperature (i.e. Defrost) Sensor Failsafe Adjustable Hysteresis Low External Component Count Pb−Free Packages are Available 3 Sampling Full Wave Logic + − Sense Input + Temperature Reduction + + 4−Bit DAC 1 SOIC−8 D SUFFIX CASE 751 2016x ALYW G 1 x = A or D A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G, G = Pb−Free Package (Note: Microdot may be in either location) 6 Pulse Amplifier Output 7 Internal Reference 1/2 +VCC PIN CONNECTIONS Vref 1 8 Sync Hys. Adj. 2 7 VCC Sensor 3 6 Output Temp. Reduc. 4 5 VEE Synchronization 2 Hysteresis Adjust 8 8 UAA2016 Failsafe 4 UAA2016P AWL YYWWG (Top View) Supply Voltage 11−Bit Counter (Sawtooth Generator) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. 1 Voltage Reference 8 5 Sync VEE Figure 1. Representative Block Diagram © Semiconductor Components Industries, LLC, 2006 January, 2006 − Rev. 9 1 Publication Order Number: UAA2016/D UAA2016 MAXIMUM RATINGS (Voltages referenced to Pin 7) Rating Supply Current (IPin 5) (Pulse Width = 1.0 ms) Symbol Value Unit ICC 15 mA ICCP 200 mA AC Synchronization Current Isync 3.0 mA Pin Voltages VPin 2 VPin 3 VPin 4 VPin 6 0; Vref 0; Vref 0; Vref 0; VEE V Vref Current Sink IPin 1 1.0 mA Output Current (Pin 6), (Pulse Width < 400 ms) IO 150 mA Power Dissipation PD 625 mW RqJA 100 °C/W TA − 20 to + 85 °C Non−Repetitive Supply Current, Thermal Resistance, Junction−to−Air Operating Temperature Range Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. ELECTRICAL CHARACTERISTICS (TA = 25°C, VEE = −7.0 V, voltages referred to Pin 7, unless otherwise noted.) Symbol Min Typ Max Unit Supply Current (Pins 6, 8 not connected), (TA = − 20° to + 85°C) Characteristic ICC − 0.9 1.5 mA Stabilized Supply Voltage (Pin 5), (ICC = 2.0 mA) VEE −10 −9.0 −8.0 V Reference Voltage (Pin 1) Vref −6.5 −5.5 −4.5 V Output Pulse Current (TA = − 20° to + 85°C), (Rout = 60 W, VEE = − 8.0 V) IO 90 100 130 mA Output Leakage Current (Vout = 0 V) IOL − − 10 mA Output Pulse Width (TA = − 20° to + 85°C) (Note 1), (Mains = 220 Vrms, Rsync = 220 kW) TP 50 − 100 ms Comparator Offset (Note 5) Voff −10 − +10 mV Sensor Input Bias Current IIB − − 0.1 mA Sawtooth Period (Note 2) TS − 40.96 − sec Sawtooth Amplitude (Note 6) AS 50 70 90 mV Temperature Reduction Voltage (Note 3), (Pin 4 Connected to VCC) VTR 280 350 420 mV Internal Hysteresis Voltage, (Pin 2 Not Connected) VIH − 10 − mV VH 280 350 420 mV VFSth 180 − 300 mV Additional Hysteresis (Note 4), (Pin 2 Connected to VCC) Failsafe Threshold (TA = − 20° to + 85°C) (Note 7) 1. Output pulses are centered with respect to zero crossing point. Pulse width is adjusted by the value of Rsync. Refer to application curves. 2. The actual sawtooth period depends on the AC power line frequency. It is exactly 2048 times the corresponding period. For the 50 Hz case it is 40.96 sec. For the 60 Hz case it is 34.13 sec. This is to comply with the European standard, namely that 2.0 kW loads cannot be connected or removed from the line more than once every 30 sec. The inertia of most heating systems combined with the UAA2016 will comply with the European Standard. 3. 350 mV corresponds to 5°C temperature reduction. This is tested at probe using internal test pad. Smaller temperature reduction can be obtained by adding an external resistor between Pin 4 and VCC. Refer to application curves. 4. 350 mV corresponds to a hysteresis of 5°C. This is tested at probe using internal test pad. Smaller additional hysteresis can be obtained by adding an external resistor between Pin 2 and VCC. Refer to application curves. 5. Parameter guaranteed but not tested. Worst case 10 mV corresponds to 0.15°C shift on set point. 6. Measured at probe by internal test pad. 70 mV corresponds to 1°C. Note that the proportional band is independent of the NTC value. 7. At very low temperature the NTC resistor increases quickly. This can cause the sensor input voltage to reach the failsafe threshold, thus inhibiting output pulses; refer to application schematics. The corresponding temperature is the limit at which the circuit works in the typical application. By setting this threshold at 0.05 Vref, the NTC value can increase up to 20 times its nominal value, thus the application works below − 20°C. http://onsemi.com 2 UAA2016 S2 S1 RS R2 R1 UAA2016 Failsafe R3 3 Sense Input NTC 4 Temp. Red. − + + MAC212A8 Sampling Full Wave Logic + Output 7 Internal Reference 1/2 + Rout 6 Pulse Amplifier 220 Vac Rdef +VCC CF 4−Bit DAC 2 Supply Voltage HysAdj 11−Bit Counter Synchronization Load 1 Vref Sync 8 5 VEE Rsync RS Figure 1. Application Schematic APPLICATION INFORMATION (For simplicity, the LED in series with Rout is omitted in the following calculations.) The load current is then: I Triac Choice and Rout Determination Load + (Vrms Ǹ2 sin(2pft)–V )ńR TM L where VTM is the maximum on state voltage of the triac, f is the line frequency. Depending on the power in the load, choose the triac that has the lowest peak gate trigger current. This will limit the output current of the UAA2016 and thus its power consumption. Use Figure 4 to determine Rout according to the triac maximum gate current (IGT) and the application low temperature limit. For a 2.0 kW load at 220 Vrms, a good triac choice is the ON Semiconductor MAC212A8. Its maximum peak gate trigger current at 25°C is 50 mA. For an application to work down to − 20°C, Rout should be 60 W. It is assumed that: IGT(T) = IGT(25°C) exp (−T/125) with T in °C, which applies to the MAC212A8. Set ILoad = ILatch for t = TP/2 to calculate TP. Figures 6 and 7 give the value of TP which corresponds to the higher of the values of IHold and ILatch, assuming that VTM = 1.6 V. Figure 8 gives the Rsync that produces the corresponding TP. RSupply and Filter Capacitor With the output current and the pulse width determined as above, use Figures 9 and 10 to determine RSupply, assuming that the sinking current at Vref pin (including NTC bridge current) is less than 0.5 mA. Then use Figure 11 and 12 to determine the filter capacitor (CF) according to the ripple desired on supply voltage. The maximum ripple allowed is 1.0 V. Output Pulse Width, Rsync The pulse with TP is determined by the triac’s IHold, ILatch together with the load value and working conditions (frequency and voltage): Given the RMS AC voltage and the load power, the load value is: Temperature Reduction Determined by R1 (Refer to Figures 13 and 14.) RL = V2rms/POWER http://onsemi.com 3 UAA2016 Overshoot Proportional Band Room Temperature T (°C) Time (minutes, Typ.) Time (minutes, Typ.) Time (minutes, Typ.) Time (minutes, Typ.) Heating Power P(W) Proportional Temperature Control DReduced Overshoot DGood Stability ON/OFF Temperature Control DLarge Overshoot DMarginal Stability Figure 2. Comparison Between Proportional Control and ON/OFF Control TP is centered on the zero−crossing. TP AC Line Waveform IHold ILatch Gate Current Pulse T + P 14xRsync ) 7 Vrms f = AC Line Frequency (Hz) Vrms = AC Line RMS Voltage (V) Rsync = Synchronization Resistor (W) 10 5 Ǹ2 xpf (μs) Figure 3. Zero Voltage Technique http://onsemi.com 4 UAA2016 CIRCUIT FUNCTIONAL DESCRIPTION Power Supply (Pin 5 and Pin 7) Sawtooth Generator The application uses a current source supplied by a single high voltage rectifier in series with a power dropping resistor. An integrated shunt regulator delivers a VEE voltage of − 8.6 V with respect to Pin 7. The current used by the total regulating system can be shared in four functional blocks: IC supply, sensing bridge, triac gate firing pulses and zener current. The integrated zener, as in any shunt regulator, absorbs the excess supply current. The 50 Hz pulsed supply current is smoothed by the large value capacitor connected between Pins 5 and 7. In order to comply with European norms, the ON/OFF period on the load must exceed 30 seconds. This is achieved by an internal digital sawtooth which performs the proportional regulation without any additional components. The sawtooth signal is added to the reference applied to the comparator inverting input. Figure 2 shows the regulation improvement using the proportional band action. Figure 4 displays a timing diagram of typical system performance using the UAA2016. The internal sawtooth generator runs at a typical 40.96 sec period. The output duty cycle drive waveform is adjusted depending on the time within the 40.96 sec period the drive needs to turn on. This occurs when the voltage on the sawtooth waveform is above the voltage provided at the Sense Input. Temperature Sensing (Pin 3) The actual temperature is sensed by a negative temperature coefficient element connected in a resistor divider fashion. This two element network is connected between the ground terminal Pin 5 and the reference voltage − 5.5 V available on Pin 1. The resulting voltage, a function of the measured temperature, is applied to Pin 3 and internally compared to a control voltage whose value depends on several elements: Sawtooth, Temperature Reduction and Hysteresis Adjust. (Refer to Application Information.) Noise Immunity The noisy environment requires good immunity. Both the voltage reference and the comparator hysteresis minimize the noise effect on the comparator input. In addition the effective triac triggering is enabled every 1/3 sec. Failsafe Output pulses are inhibited by the “failsafe” circuit if the comparator input voltage exceeds the specified threshold voltage. This would occur if the temperature sensor circuit is open. Temperature Reduction For energy saving, a remotely programmable temperature reduction is available on Pin 4. The choice of resistor R1 connected between Pin 4 and VCC sets the temperature reduction level. Sampling Full Wave Logic Two consecutive zero−crossing trigger pulses are generated at every positive mains half−cycle. This ensures that the number of delivered pulses is even in every case. The pulse length is selectable by Rsync connected on Pin 8. The pulse is centered on the zero−crossing mains waveform. Comparator When the noninverting input (Pin 3) receives a voltage less than the internal reference value, the comparator allows the triggering logic to deliver pulses to the triac gate. To improve the noise immunity, the comparator has an adjustable hysteresis. The external resistor R3 connected to Pin 2 sets the hysteresis level. Setting Pin 2 open makes a 10 mV hysteresis level, corresponding to 0.15°C. Maximum hysteresis is obtained by connecting Pin 2 to VCC. In that case the level is set at 5°C. This configuration can be useful for low temperature inertia systems. Pulse Amplifier The pulse amplifier circuit sinks current pulses from Pin 6 to VEE. The minimum amplitude is 70 mA. The triac is then triggered in quadrants II and III. The effective output current amplitude is given by the external resistor Rout. Eventually, an LED can be inserted in series with the Triac gate (see Figure 1). http://onsemi.com 5 UAA2016 Triac On Load Voltage Triac Off Output Pin 1/2 VCC 40.96 sec From Temperature Sensor (Sense Input) Figure 4. I Out(min) , MINIMUM OUTPUT CURRENT (mA) R out , OUTPUT RESISTOR (Ω ) 200 180 160 140 120 TA = +10°C TA = 0°C 100 80 TA = − 20°C 60 40 20 TA = −10°C 30 40 50 IGT, TRIAC GATE CURRENT SPECIFIED AT 25°C (mA) 60 100 80 60 40 TA = + 85°C TA = − 20°C 20 0 40 60 80 100 120 140 160 Rout, OUTPUT RESISTOR (W) 180 Figure 6. Minimum Output Current versus Output Resistor Figure 5. Output Resistor versus Triac Gate Current http://onsemi.com 6 200 UAA2016 120 F = 50 Hz 2.0 kW Loads VTM = 1.6 V TA = 25°C 100 TP, OUTPUT PULSE WIDTH (μ s) TP, OUTPUT PULSE WIDTH (μ s) 120 80 110 Vrms 60 220 Vrms 40 20 0 10 20 30 40 50 ILatch(max), MAXIMUM TRIAC LATCH CURRENT (mA) 100 60 220 Vrms 400 F = 50 Hz 300 220 Vrms 200 0 20 110 Vrms 40 60 80 TP, OUTPUT PULSE WIDTH (ms) 100 C F(min), MINIMUM FILTER CAPACITOR (μ F) R Supply , MAXIMUM SUPPLY RESISTOR (kΩ ) V = 110 Vrms F = 50 Hz 25 TP = 50 ms 100 ms 10 150 ms 200 ms 0 25 50 75 IO, OUTPUT CURRENT (mA) 60 V = 220 Vrms F = 50 Hz 50 TP = 50 ms 40 100 ms 150 ms 30 20 200 ms 0 25 50 75 IO, OUTPUT CURRENT (mA) 100 Figure 10. Maximum Supply Resistor versus Output Current 30 15 10 20 30 40 50 ILatch(max), MAXIMUM TRIAC LATCH CURRENT (mA) 60 Figure 9. Synchronization Resistor versus Output Pulse Width 20 0 Figure 8. Output Pulse Width versus Maximum Triac Latch Current R Supply , MAXIMUM SUPPLY RESISTOR (kΩ ) R sync , SYNCHRONIZATION RESISTOR (k Ω ) Figure 7. Output Pulse Width versus Maximum Triac Latch Current 100 F = 50 Hz 1.0 kW Loads VTM = 1.6 V TA = 25°C 40 20 60 110 Vrms 80 100 90 Ripple = 1.0 Vp−p F = 50 Hz 80 200 ms 70 150 ms 60 100 ms 50 TP = 50 ms 40 0 Figure 11. Maximum Supply Resistor versus Output Current 20 40 60 IO, OUTPUT CURRENT (mA) 80 Figure 12. Minimum Filter Capacitor versus Output Current http://onsemi.com 7 100 180 Ripple = 0.5 Vp−p F = 50 Hz 160 200 ms 140 150 ms 120 100 ms 100 TP = 50 ms 80 0 20 40 60 IO, OUTPUT CURRENT (mA) 80 7.0 TR , TEMPERATURE REDUCTION ( °C) C F(min) , MINIMUM FILTER CAPACITOR (μ F UAA2016 Setpoint = 20°C 6.0 5.0 4.0 3.0 2.0 10 kW NTC 1.0 100 kW NTC 0 100 0 4 6.0 R1 = 0 5.6 10 kW NTC 5.2 4.8 100 kW NTC 4.4 4.0 10 14 18 22 26 TS, TEMPERATURE SETPOINT (°C) 100 kW NTC 3 10 kW NTC 2 1 0 30 0 8 TDEF = 4°C 6 4 10 kW NTC RDEF = 29 kW 2 100 kW NTC RDEF = 310 kW 14 18 22 26 30 TS, TEMPERATURE SETPOINT (°C) 5 10 15 20 25 TDEF, PRESET TEMPERATURE (°C) 30 Figure 16. RDEF versus Preset Temperature V H , COMPARATOR HYSTERESIS VOLTAGE (V) ( R S + R2 /(NOMINAL NTC VALUE) RATIO Figure 15. Temperature Reduction versus Temperature Setpoint 0 10 100 Figure 14. Temperature Reduction versus R1 RDEF /(NOMINAL NTC VALUE) RATIO TR , TEMPERATURE REDUCTION ( °C) Figure 13. Minimum Filter Capacitor versus Output Current 10 20 30 40 50 60 70 80 90 R1, TEMPERATURE REDUCTION RESISTOR (kW) 34 0.5 0.4 0.3 0.2 0.1 0 0 Figure 17. RS + R2 versus Preset Setpoint 100 200 300 R3, HYSTERESIS ADJUST RESISTOR (kW) 400 Figure 18. Comparator Hysteresis versus R3 http://onsemi.com 8 UAA2016 ORDERING INFORMATION Device Operating Temperature Range UAA2016D UAA2016DG UAA2016AD UAA2016ADG TA = −20° to +85°C UAA2016P UAA2016PG Package Shipping † SOIC−8 98 Units / Rail SOIC−8 (Pb−Free) 98 Units / Rail SOIC−8 98 Units / Rail SOIC−8 (Pb−Free) 98 Units / Rail PDIP−8 1000 Units / Rail PDIP−8 (Pb−Free) 1000 Units / Rail †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 9 UAA2016 PACKAGE DIMENSIONS PDIP−8 P SUFFIX CASE 626−05 ISSUE L 8 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5 −B− 1 4 F −A− NOTE 2 L C J −T− N SEATING PLANE D H M K G 0.13 (0.005) M T A M B M http://onsemi.com 10 DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC −−− 10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC −−− 10_ 0.030 0.040 UAA2016 PACKAGE DIMENSIONS SOIC−8 D SUFFIX CASE 751−07 ISSUE AG NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. −X− A 8 5 S B 1 0.25 (0.010) M Y M 4 K −Y− G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− 0.10 (0.004) H D 0.25 (0.010) M Z Y S X M J S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 11 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8 _ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 UAA2016 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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