LINER LTC1438IG Dual high efficiency, low noise, synchronous step-down switching regulator Datasheet

LTC1438/LTC1439
Dual High Efficiency,
Low Noise, Synchronous
Step-Down Switching Regulators
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DESCRIPTION
FEATURES
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The LTC ®1438/LTC1439 are dual, synchronous stepdown switching regulator controllers which drive external
N-channel power MOSFETs in a phase-lockable fixed
frequency architecture. The Adaptive PowerTM output stage
selectively drives two N-channel MOSFETs at frequencies
up to 400kHz while reducing switching losses to maintain
high efficiencies at low output currents.
Maintains Constant Frequency at Low Output Currents
Dual N-Channel MOSFET Synchronous Drive
Programmable Fixed Frequency (PLL Lockable)
Wide VIN Range: 3.5V to 36V Operation
Ultrahigh Efficiency
Very Low Dropout Operation: 99% Duty Cycle
Low Dropout, 0.5A Linear Regulator for VPP
Generation or Low Noise Audio Supply
Built-In Power-On Reset Timer
Programmable Soft Start
Low-Battery Detector
Remote Output Voltage Sense
Foldback Current Limiting (Optional)
Pin Selectable Output Voltage
Logic-Controlled Micropower Shutdown: IQ < 30µA
Output Voltages from 1.19V to 9V
Available in 28- and 36-Lead SSOP Packages
An auxiliary 0.5A linear regulator using an external PNP
pass device provides a low noise, low dropout voltage
source. A secondary winding feedback control pin (SFB1)
guarantees regulation regardless of load on the main
output by forcing continuous operation.
An additional comparator is available for use as a low
battery detector. A power-on reset timer (POR) is included
which generates a signal delayed by 65536/fCLK (typ
300ms) after the output is within 5% of the regulated
output voltage. Internal resistive dividers provide pin
selectable output voltages with remote sense capability on
one of the two outputs.
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APPLICATIONS
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Notebook and Palmtop Computers, PDAs
Portable Instruments
Battery-Operated Devices
DC Power Distribution Systems
The operating current levels are user-programmable via
external current sense resistors. Wide input supply range
allows operation from 3.5V to 30V (36V maximum).
, LTC and LT are registered trademarks of Linear Technology Corporation.
Adaptive Power is a trademark of Linear Technology Corporation.
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TYPICAL APPLICATION
DB1, CMDSH-3
DB2, CMDSH-3
VPROG1
BOOST 1
M1
L1
10µH
M3*
CB1
0.1µF
INTVCC
VIN
TGL2
TGS1
TGS2
SW2
VOUT1
5V
3.5A
+
COUT1
220µF
10V
M1, M2, M4, M5: Si4412DY
CIN
22µF
35V
×4
VIN
5.2V TO 28V
M4
M6*
CB2, 0.1µF
M5
LTC1439
L2
10µH
D2
MBR140T3
SENSE + 2
SENSE + 1
RSENSE1
0.03Ω
4.7µF
16V
BG2
BG1
M2
+
BOOST 2
TGL1
SW1
D1
MBR140T3
+
SENSE – 2
1000pF
RSENSE2
0.03Ω
1000pF
CC1
1000pF
CC1A
220pF
VOSENSE2
SENSE – 1
ITH1
ITH2
RUN/SS1
RC1
10k
M3, M6: IRLML2803
CDSC
CSS1
0.1µF
VPROG2
SGND
COSC
56pF
*NOT REQUIRED FOR LTC1438
PGND RUN/SS2
CSS2
0.1µF
VOUT2
3.3V
3.5A
CC2
1000pF
RC2
10k
CC2A
470pF
BOLD LINES INDICATE HIGH CURRENT PATHS
+
COUT
220µF
10V
1438 F01
Figure 1. High Efficiency Dual 5V/3V Step-Down Converter
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LTC1438/LTC1439
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ABSOLUTE MAXIMUM RATINGS
Input Supply Voltage (VIN)....................... 36V to – 0.3V
Topside Driver Voltage (BOOST 1, 2) ...... 42V to – 0.3V
Switch Voltage (SW1, 2)...................... VIN + 5V to – 5V
EXTVCC Voltage....................................... 10V to – 0.3V
POR2, LBO Voltages ............................... 12V to – 0.3V
AUXFB Voltage ....................................... 20V to – 0.3V
AUXDR Voltage ....................................... 28V to – 0.3V
SENSE + 1, SENSE + 2, SENSE – 1, SENSE – 2,
VOSENSE2 Voltages ................... INTVCC + 0.3V to – 0.3V
VPROG1, VPROG2 Voltages ................... INTVCC to – 0.3V
PLL LPF, ITH1, ITH2 Voltages .................. 2.7V to – 0.3V
AUXON, PLLIN, SFB1,
RUN/SS1, RUN/SS2, LBI Voltages ......... 10V to – 0.3V
Peak Output Current < 10µs (TGL1, 2, BG1, 2) ......... 2A
Peak Output Current < 10µs (TGS1, 2) .............. 250mA
INTVCC Output Current ....................................... 50mA
Operating Ambient Temperature Range
Commercial ........................................... 0°C to 70°C
Industrial .......................................... – 40°C to 85°C
Junction Temperature (Note 1) ............................ 125°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
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PACKAGE/ORDER INFORMATION
ORDER
PART NUMBER
TOP VIEW
SENSE + 1
1
28 RUN/SS1
SENSE – 1
2
27 BOOST 1
VPROG1*
3
26 TGL1
ITH1
4
25 SW1
POR2**
5
24 VIN
COSC
6
23 BG1
SGND
7
LBI
8
21 PGND
LBO
9
20 BG2
SFB1 10
22 INTVCC
19 EXTVCC
ITH2 11
18 SW2
VOSENSE2 12
17 TGL2
SENSE – 2 13
16 BOOST 2
SENSE+ 2 14
15 RUN/SS2
G PACKAGE
28-LEAD PLASTIC SSOP
*VOSENSE1 ON LTC1438-ADJ
**NC ON THE LTC1438XCG
TJMAX = 125°C, θJA = 95°C/ W
Consult factory for Military grade parts.
2
LTC1438CG
LTC1438CG-ADJ
LTC1438IG
LTC1438IG-ADJ
LTC1438XCG
TOP VIEW
RUN/SS1
1
36 PLL LPF
SENSE + 1
2
35 PLLIN
SENSE – 1
3
34 BOOST 1
VPROG1
4
33 TGL1
ITH1
5
32 SW1
POR2
6
31 TGS1
COSC
7
30 VIN
SGND
8
29 BG1
LBI
9
28 INTVCC
LBO 10
SFB1 11
ITH2 12
27 PGND
26 BG2
25 EXTVCC
VPROG2 13
24 TGS2
VOSENSE2 14
23 SW2
SENSE – 2
22 TGL2
15
SENSE+ 2 16
21 BOOST 2
RUN/SS2 17
20 AUXON
AUXDR 18
19 AUXFB
G PACKAGE
GW PACKAGE
36-LEAD PLASTIC SSOP
36-LEAD PLASTIC SSOP
TJMAX = 125°C, θJA = 95°C/ W (G)
TJMAX = 125°C, θJA = 85°C/ W (GW)
ORDER
PART NUMBER
LTC1439CG
LTC1439IG
LTC1439CGW
LTC1439IGW
LTC1438/LTC1439
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
Main Control Loops
IIN VOSENSE1,2 Feedback Current
Regulated Output Voltage
VOUT1,2
1.19V (Adjustable) Selected
3.3V Selected
5V Selected
VLINEREG1,2
Reference Voltage Line Regulation
VLOADREG1,2 Output Voltage Load Regulation
VSFB1
ISFB1
VOVL
IPROG1,2
Secondary Feedback Threshold
Secondary Feedback Current
Output Overvoltage Lockout
VPROG1,2 Input Current
IQ
Input DC Supply Current
Normal Mode
Shutdown
VRUN/SS1,2
Run Pin Threshold
IRUN/SS1,2
Soft Start Current Source
∆VSENSE(MAX) Maximum Current Sense Threshold
TGL1, 2 t r, t f TGL1, TGL2 Transition Time
Rise Time
Fall Time
TGS1, 2 t r, t f TGS1, TGS2 Transition Time
Rise Time
Fall Time
BG1, 2 t r, t f
BG1, BG2 Transition Time
Rise Time
Fall Time
Internal VCC Regulator
VINTVCC
Internal VCC Voltage
VLDO INT
INTVCC Load Regulation
VLDO EXT
EXTVCC Voltage Drop
VEXTVCC
EXTVCC Switchover Voltage
Oscillator and Phase-Locked Loop
fOSC
Oscillator Frequency
VCO High
RPLLIN
PLLIN Input Resistance
IPLLLPF
Phase Detector Output Current
Sinking Capability
Sourcing Capability
Power-On Reset
VSATPOR2
POR2 Saturation Voltage
ILPOR2
VTHPOR2
POR2 Leakage
POR2 Trip Voltage
tDPOR2
POR2 Delay
TA = 25°C, VIN = 15V, VRUN/SS1,2 = 5V unless otherwise noted.
CONDITIONS
TYP
MAX
10
50
nA
1.19
3.30
5.00
0.002
0.5
– 0.5
1.19
–1
1.28
–3
3
1.202
3.380
5.100
0.01
0.8
– 0.8
1.22
–2
1.32
–6
6
V
V
V
%/V
%
%
V
µA
V
µA
µA
320
16
1.3
3
150
30
2
4.5
180
µA
µA
V
µA
mV
CLOAD = 3000pF
CLOAD = 3000pF
50
50
150
150
ns
ns
CLOAD = 500pF
CLOAD = 500pF
100
50
150
150
ns
ns
CLOAD = 3000pF
CLOAD = 3000pF
50
50
150
150
ns
ns
5.0
– 0.2
170
4.7
5.2
–1
300
V
%
mV
V
VPROG1, VPROG2 Pins Open (Note 2)
(Note 2)
VPROG1, VPROG2 Pins Open
VPROG1, VPROG2 = 0V
VPROG1, VPROG2 = INT VCC
VIN = 3.6V to 20V (Note 2), VPROG1,2 Pins Open
ITH1,2 Sinking 5µA (Note 2)
ITH1,2 Sourcing 5µA
VSFB1 Ramping Negative
VSFB1 = 1.5V
VPROG1,2, SENSE – 1 and VOSENSE1,2 Pins Open
0.5V > VPROG1,2
INTVCC – 0.5V < VPROG1,2 < INTVCC
EXTVCC = 5V (Note 3)
3.6V < VIN < 30V, VAUXON = 0V
VRUN/SS1,2 = 0V, 3.6V < VIN < 15V
MIN
●
●
●
●
●
●
1.16
1.24
●
VRUN/SS1,2 = 0V
VOSENSE1,2 = 0V, 5V VPROG1,2 = Pins Open
6V < VIN < 30V, VEXTVCC = 4V
IINTVCC = 20mA, VEXTVCC = 4V
IINTVCC = 20mA, VEXTVCC = 5V
IINTVCC = 20mA, EXTVCC Ramping Positive
1.178
3.220
4.900
0.8
1.5
130
●
4.8
●
4.5
UNITS
COSC = 100pF, LTC1439: PLL LPF = 0V (Note 4)
LTC1439, VPLLLPF = 2.4V
112
200
125
240
50
138
kHz
kHz
kΩ
LTC1439
fPLLIN < fOSC
fPLLIN > fOSC
10
10
15
15
20
20
µA
µA
0.6
1
V
0.2
1
µA
– 7.5
65536
–4
IPOR2 = 1.6mA, VOSENSE2 = 1V,
VPROG2 Pin Open
VPOR2 = 12V, VOSENSE2 = 1.2V, VPROG2 Pin Open
VPROG2 Pin Open % of VREF
VOSENSE2 Ramping Negative
VPROG2 Pin Open
– 11
%
Cycles
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LTC1438/LTC1439
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
Low-Battery Comparator
VSATLBO
LBO Saturation Voltage
ILLBO
LBO Leakage
VTHLB1
LBI Trip Voltage
IINLB1
LBI Input Current
VHYSLBO
LBO Hysteresis
Auxiliary Regulator/Comparator
AUXDR Current
IAUXDR
Max Current Sinking Capability
Control Current
Leakage when OFF
IINAUXFB
AUXFB Input Current
IINAUXON
AUXON Input Current
VTHAUXON
AUXON Trip Voltage
VSATAUXDR
AUXDR Saturation Voltage
VAUXFB
AUXFB Voltage
VTHAUXDR
AUXFB Divider Disconnect Voltage
TA = 25°C, VIN = 15V, VRUN/SS1,2 = 5V unless otherwise noted.
CONDITIONS
ILBO = 1.6mA, VLBI = 1.1V
VLBO = 12V, VLBI = 1.4V
High to Low Transition on LBO
VLBI = 1.19V
VEXTVCC = 0V
VAUXDR = 4V, VAUXFB = 1.0V, VAUXON = 5V
VAUXDR = 5V, VAUXFB = 1.5V, VAUXON = 5V
VAUXDR = 24V, VAUXFB = 1.5V, VAUXON = 0V
VAUXFB = 1.19V, VAUXON = 5V
VAUXON = 5V
VAUXDR = 4V, VAUXFB = 1V
IAUXDR = 1.6mA, VAUXFB = 1V, VAUXON = 5V
VAUXON = 5V, 11V < VAUXDR < 24V (Note 5)
VAUXON = 5V, 3V < VAUXDR < 7V
VAUXON = 5V (Note 5); Ramping Negative
The ● denotes specifications which apply over the full operating
temperature range.
Note 1: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formulas:
LTC1438CG, LTC1439CG: TJ = TA + (PD)(95°C/W)
LTC1439CGW: TJ = TA + (PD)(85°C/W)
Note 2: The LTC1438 and LTC1439 are tested in a feedback loop which
servos VOSENSE1,2 to the balance point for the error amplifier
(VITH1,2 = 1.19V).
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MIN
TYP
MAX
UNITS
1.16
0.6
0.01
1.19
1
20
1
1
1.22
50
V
µA
V
nA
mV
●
●
●
10
1.0
●
●
11.5
1.14
7.5
15
1
0.01
0.01
0.01
1.19
0.4
12.0
1.19
8.5
5
1
1
1
1.4
0.8
12.5
1.24
9.5
mA
µA
µA
µA
µA
V
V
V
V
V
Note 3: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 4: Oscillator frequency is tested by measuring the COSC charge and
discharge current (IOSC) and applying the formula:
fOSC (kHz) = 8.4(108)[COSC (pF) + 11] –1 (1/ICHG + 1/IDISC) –1
Note 5: The auxiliary regulator is tested in a feedback loop which servos
VAUXFB to the balance point for the error amplifier. For applications with
VAUXDR > 9.5V, VAUXFB uses an internal resistive divider. See Applications
Information section.
LTC1438/LTC1439
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TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Input Voltage
VOUT = 3.3V
Efficiency vs Input Voltage
VOUT = 5V
100
VOUT = 3.3V
VOUT = 5V
95
90
ILOAD = 1A
85
ILOAD = 100mA
80
75
90
EFFICIENCY (%)
EFFICIENCY (%)
90
VIN = 10V
VOUT = 5V
RSENSE = 0.33Ω
95
95
ILOAD = 1A
EFFICIENCY (%)
Efficiency vs Load Current
100
100
ILOAD = 100mA
85
80
CONTINUOUS
MODE
85
80
Burst Mode®
OPERATION
75
70
65
Adaptive Power
MODE
60
75
55
70
0
10
15
20
INPUT VOLTAGE (V)
5
25
70
30
0
5
10
15
20
INPUT VOLTAGE (V)
25
1438 G01
1435 G03
Load Regulation
VITH Pin Voltage vs Output Current
3.0
0
RSENSE = 0.033Ω
VOUT DROP OF 5%
M1, M2: Si4412
0.4
RSENSE = 0.033Ω
∆VOUT (%)
0.3
0.2
0.1
– 0.25
2.5
– 0.50
2.0
VITH (V)
0.5
– 0.75
0.5
1.0
1.5
2.0
LOAD CURRENT (A)
2.5
1.5
Burst Mode
OPERATION
–1.00
1.0
–1.25
0.5
–1.50
0
0
10
1
0.01
0.1
LOAD CURRENT (A)
1438 G02
VIN – VOUT Dropout Voltage
vs Load Current
VIN – VOUT (V)
50
0.001
30
3.0
0
0
0.5
2.5
1.0
1.5
2.0
LOAD CURRENT (A)
1438 G04
0
3.0
10 20 30 40 50 60 70 80 90 100
OUTPUT CURRENT (%)
1438 G06
1438 G05
Input Supply Current
vs Input Voltage
EXTVCC Switch Drop
vs INTVCC Load Current
INTVCC Regulation
vs INTVCC Load Current
35
2.5
CONTINUOUS/Adaptive
Power MODE
300
2
SUPPLY CURRENT (mA)
25
1.5
20
15
1.0
5V AND
3.3V ON
5V OFF
3.3V ON
10
0.5
0
5
5V ON
3.3V OFF
0
5
10
15
20
INPUT VOLTAGE (V)
25
30
0
1438 G07
SHUTDOWN CURRENT (µA)
SHUTDOWN
CURRENT
1
EXTVCC – INTVCC (mV)
30
2.0
INTVCC % CHANGE, NORMALIZED (V)
EXTVCC = 0V
70°C
0
25°C
–1
–2
70°C
200
25°C
– 45°C
100
0
0
20
30
40
10
INTVCC LOAD CURRENT (mA)
50
1438 G08
0
5
15
20
25
10
INTVCC LOAD CURRENT (mA)
30
1438 G09
Burst Mode is a trademark of Linear Technology Corporation.
5
LTC1438/LTC1439
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TYPICAL PERFORMANCE CHARACTERISTICS
Normalized Oscillator Frequency
vs Temperature
RUN/SS Pin Current
vs Temperature
10
4
5
3
SFB1 Pin Current vs Temperature
0
fO
–5
SFB CURRENT (µA)
RUN/SS CURRENT (µA)
FREQUENCY (%)
– 0.25
2
–1.50
– 0.75
–1.00
1
–1.25
–10
– 40 –15
60
35
85
10
TEMPERATURE (°C)
110
135
0
– 40 –15
85
10
35
60
TEMPERATURE (°C)
1438 G10
110
135
–1.50
– 40 –15
60
35
85
10
TEMPERATURE (°C)
1438 G11
Maximum Current Sense
Threshold Voltage vs Temperature
110
135
1438 G12
Transient Response
Transient Response
CURRENT SENSE THRESHOLD (mV)
154
152
VOUT
50mV/DIV
VOUT
50mV/DIV
150
148
ILOAD = 50mA to 1A
146
– 40 –15
85
10
35
60
TEMPERATURE (°C)
110
ILOAD = 1A to 3A
1438 G14
1438 G15
135
1438 G13
Auxiliary Regulator Load
Regulation
Soft Start: Load Current vs Time
Burst Mode Operation
VOUT
20mV/DIV
RUN/SS
5V/DIV
INDUCTOR
CURRENT
1A/DIV
VITH
200mV/DIV
ILOAD = 50mA
1438 G16
1438 G17
AUXILIARY OUTPUT VOLTAGE (V)
12.2
EXTERNAL PNP: 2N2907A
12.1
12.0
11.9
11.8
11.7
0
40
120
160
80
AUXILIARY LOAD CURRENT (mA)
200
1438 G18
6
LTC1438/LTC1439
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TYPICAL PERFORMANCE CHARACTERISTICS
Auxiliary Regulator
Sink Current Available
Auxiliary Regulator PSRR
70
20
10mA LOAD
15
50
PSRR (dB)
AUX DR CURRENT (mA)
60
10
100mA LOAD
40
30
5
20
0
0
2
4
10 12
6
8
AUX DR VOLTAGE (V)
14
16
10
10
100
FREQUENCY (kHz)
1000
1438 G20
1438 G19
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PIN FUNCTIONS
VIN: Main Supply Pin. Must be closely decoupled to the
IC’s signal ground pin.
INTVCC: Output of the Internal 5V Regulator and the
EXTVCC Switch. The driver and control circuits are powered from this voltage. Must be closely decoupled to
power ground with a minimum of 2.2µF tantalum or
electrolytic capacitor. The INTVCC regulator turns off when
both RUN/SS1 and RUN/SS2 are low. Refer to the LTC1538/
LTC1539 for 5V keep-alive applications.
EXTVCC: External Power Input to an Internal Switch. This
switch closes and supplies INTVCC, bypassing the internal
low dropout regulator whenever EXTVCC is higher than
4.7V. Connect this pin to VOUT of the controller with the
higher output voltage. Do not exceed 10V on this pin. See
EXTVCC connection in Applications Information section.
SGND: Small-Signal Ground. Common to both controllers, must be routed separately from high current grounds
to the (–) terminals of the COUT capacitors.
PGND: Driver Power Ground. Connects to sources of
bottom N-channel MOSFETs and the (–) terminals of CIN.
SENSE – 1, SENSE – 2: Connects to the (–) input for the
current comparators. Except for the LTC1438-ADJ, SENSE –
1 is internally connected to the first controller’s VOUT
sensing point. The first controller can only be used as a
3.3V or 5.0V regulator controlled by the VPROG1 pin with
the LTC1438, LTC1438X and LTC1439. The LTC1438-ADJ
Controller 1 implements a remote sensing adjustable
regulator. The second controller can be set to a 3.3V, 5.0V
or an adjustable regulator controlled by the VPROG2 pin
(see Table 1).
BOOST 1, BOOST 2: Supplies to the Topside Floating
Drivers. The bootstrap capacitors are returned to these
pins. Voltage swing at these pins is from INTVCC to
VIN + INTVCC.
Table 1. Output Voltage Table
Controller 1
Adjustable Only
SW1, SW2: Switch Node Connections to Inductors. Voltage swing at these pins is from a Schottky diode (external)
voltage drop below ground to VIN.
Controller 2
Adjustable Only
Remote Sensing
POR2 Output
LTC1438-ADJ
LTC1438/LTC1438X
LTC1439
5V or 3.3V Only
Secondary Feedback Loop
Adjustable Only
Remote Sensing
POR2 Output
5V/3.3V/Adjustable
Remote Sensing
POR2 Output
7
LTC1438/LTC1439
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PIN FUNCTIONS
SENSE + 1, SENSE + 2: The (+) Input to Each Current
Comparator. Built-in offsets between SENSE – 1 and
SENSE + 1 pins in conjunction with RSENSE1 set the current
trip threshold (same for second controller).
VOSENSE1,2: Receives the remotely sensed feedback voltage either from the output directly or from an external
resistive divider across the output. The VPROG2 pin determines which point VOSENSE2 must connect to. The
VOSENSE1 pin, only available on the LTC1438-ADJ, requires an external resistive divider to set the output
voltage.
VPROG1, VPROG2: Programs Internal Voltage Attenuators
for Output Voltage Sensing. The voltage sensing for thefirst
controller is internally connected to SENSE – 1 while the
VOSENSE2 pin allows for remote sensing for the second
controller. For VPROG1, VPROG2 < VINTVCC /3, the divider is
set for an output voltage of 3.3V. With VPROG1 ,
VPROG2 > VINTVCC /1.5 the divider is set for an output
voltage of 5V. Leaving VPROG2 open (DC) allows the output
voltage of the second controller to be set by an external
resistive divider connected to VOSENSE2.
COSC: External capacitor COSC from this pin to ground sets
the operating frequency.
ITH1, ITH2: Error Amplifier Compensation Point. Each associated current comparator threshold increases with this
control voltage.
RUN/SS1, RUN/SS2: Combination of Soft Start and Run
Control Inputs. A capacitor to ground at each of these pins
sets the ramp time to full current output. The time is
approximately 0.5s/µF. Forcing either of these pins below
1.3V causes the IC to shut down the circuitry required for
that particular controller. Forcing both of these pins below
1.3V causes the device to shut down completely. For
applications which require 5V keep-alive, refer to the
LTC1538-AUX/LTC1539.
TGL1, TGL2: High Current Gate Drives for Main Top
N-Channel MOSFET. These are the outputs of floating
drivers with a voltage swing equal to INTVCC superimposed on the switch node voltage SW1 and SW2.
TGS1, TGS2: Gate Drives for Small Top N-Channel
MOSFET. These are the outputs of floating drivers with a
voltage swing equal to INTVCC superimposed on the
8
switch node voltage SW. Leaving TGS1 or TGS2 open
invokes Burst Mode operation for that controller.
BG1, BG2: High Current Gate Drive Outputs for Bottom
N-Channel MOSFETs. Voltage swing at these pins is from
ground to INTVCC.
SFB1: Secondary Winding Feedback Input. This input acts
only on the first controller and is normally connected to a
feedback resistive divider from the secondary winding.
Pulling this pin below 1.19V will force continuous synchronous operation for the first controller. This pin should
be tied to: ground to force continuous operation; INTVCC
in applications that don’t use a secondary winding; and a
resistive divider from the output in applications using a
secondary winding.
POR2: This output is a drain of an N-channel pull-down.
This pin sinks current when the output voltage of the second
controller drops 7.5% below its regulated voltage and releases 65536 oscillator cycles after the output voltage of the
second controller rises to within –5% value of its regulated
value. The POR2 output is asserted when RUN/SS1 and RUN/
SS2 are both low, independant of the VOUT2. This pin is not
functional on the LTC1438X.
LBO: This output is a drain of an N-channel pull-down. This
pin will sink current when the LBI pin goes below 1.19V.
LBI: The (+) input of a comparator which can be used as
a low-battery voltage detector. The (–) input is connected
to the 1.19V internal reference.
PLLIN: External Synchronizing Input to Phase Detector.
This pin is internally terminated to SGND with 50kΩ. Tie
this pin to SGND in applications which do not use the
phase-locked loop.
PLL LPF: Output of Phase Detector and Control Input of
Oscillator. Normally a series RC lowpass filter network is
connected from this pin to ground. Tie this pin to SGND in
applications which do not use the phase-locked loop. Can
be driven by a 0V to 2.4V logic signal for a frequency
shifting option.
AUXFB: Feedback Input to the Auxiliary Regulator/Comparator. When used as a linear regulator, this input can
either be connected to an external resistive divider or
directly to the collector of the external PNP pass device for
LTC1438/LTC1439
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PIN FUNCTIONS
AUXDR: Open Drain Output of the Auxiliary Regulator/
Comparator. The base of an external PNP device is connected to this pin when used as a linear regulator. An
external pull-up resistor is required for use as a comparator. A voltage > 9.5V on AUXDR causes the internal 12V
resistive divider to be connected in series with the AUXFB pin.
12V operation. When used as a comparator, this is the
noninverting input of a comparator whose inverting input
is tied to the internal 1.19V reference. See Auxiliary Regulator Application section.
AUXON: Pulling this pin high turns on the auxiliary regulator/comparator. The threshold is 1.19V. This is a convenient linear power supply logic-controlled on/off input.
W
FUNCTIONAL DIAGRA
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PLLIN**
PHASE
DETECTOR
fIN
50k
VIN
2.4V
INTVCC
DB
BOOST
DUPLICATE FOR SECOND CONTROLLER CHANNEL
RLP PLL LPF**
CLP
TGL
DROPOUT
DETECTOR
COSC
OSCILLATOR
COSC
SFB
S Q
CB
R Q
POR2
TGS**
VFB2
POWER-ON
RESET
0.6V
1.11V
+
SHUTDOWN
LBI
BATTERY
SENSE
–
•
INTVCC
BG
–
I1
+
+
–
–
COUT
INTVCC
+
–
RSENSE
I2
–
AUXDR**
CIN
PGND
+
9V
•
+
+
AUXON**
VSEC
SW
–
LBO
SWITCH
LOGIC
+
8k
30k
SENSE –
VLDO
+
4k
+
+
VFB
EA
SFB
VIN
1.19V
REF
gm = 1m
VREF
VOSENSE*
CSEC
VPROG*
+
0V
VIN
DFB†
–
4.8V
+
5V LDO
REGULATOR
EXTVCC
VOUT
61k
119k
–
1µA
320k
–
Ω
+
SFB1*
SENSE +
180k
10k
90.8k
+
AUXFB**
1.28V
1.19V
3µA
–
ITH
SHUTDOWN
CC
RC
RUN
SOFT START
6V
INTVCC
+
RUN/SS
CSS
SGND
INTERNAL
SUPPLY
*IN SOME VERSIONS, NOT AVAILABLE ON BOTH CHANNELS
**NOT AVAILABLE ON LTC1438
†
FOLDBACK CURRENT LIMITING OPTION
BOLD LINES INDICATE HIGH CURRENT PATHS
1438 FD
9
LTC1438/LTC1439
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OPERATION (Refer to Functional Diagram)
Main Control Loop
Low Current Operation
The LTC1438/LTC1439 use a constant frequency, current
mode step-down architecture. During normal operation,
the top MOSFET is turned on each cycle when the oscillator
sets the RS latch and turned off when the main current
comparator I1 resets the RS latch. The peak inductor
current at which I1 resets the RS latch is controlled by the
voltage on the ITH1 (ITH2) pin, which is the output of each
error amplifier (EA). The VPROG1 pin, described in the Pin
Functions, allows the EA to receive a selectively attenuated
output feedback voltage VFB1 from the SENSE – 1 pin while
VPROG2 and VOSENSE2 allow EA to receive an output feedback voltage VFB2 from either internal or external resistive
dividers on the second controller. When the load current
increases, it causes a slight decrease in VFB relative to the
1.19V reference, which in turn causes the ITH1 (ITH2)
voltage to increase until the average inductor current
matches the new load current. After the large top MOSFET
has turned off, the bottom MOSFET is turned on until either
the inductor current starts to reverse, as indicated by
current comparator I2, or the beginning of the next cycle.
Adaptive Power mode allows the LTC1439 to automatically change between two output stages sized for different
load currents. The TGL1 (TGL2) and BG1 (BG2) pins drive
large synchronous N-channel MOSFETs for operation at
high currents, while the TGS1 (TGS2) pin drives a much
smaller N-channel MOSFET used in conjunction with a
Schottky diode for operation at low currents. This allows
the loop to continue to operate at normal operating frequency as the load current decreases without incurring the
large MOSFET gate charge losses. If the TGS1 (TGS2) pin
is left open, the loop defaults to Burst Mode operation in
which the large MOSFETs operate intermittently based on
load demand.
The top MOSFET drivers are biased from floating boot
strap capacitor CB, which normally is recharged during
each Off cycle. When VIN decreases to a voltage close to
VOUT, however, the loop may enter dropout and attempt to
turn on the top MOSFET continuously. The dropout detector counts the number of oscillator cycles that the top
MOSFET remains on and periodically forces a brief off
period to allow CB to recharge.
The main control loop is shut down by pulling the RUN/
SS1 (RUN/SS2) pin low. Releasing RUN/SS1 (RUN/SS2)
allows an internal 3µA current source to charge soft start
capacitor CSS. When CSS reaches 1.3V, the main control
loop is enabled with the ITH1 (ITH2) voltage clamped at
approximately 30% of its maximum value. As CSS continues to charge, ITH1 (ITH2) is gradually released allowing
normal operation to resume. When both RUN/SS1 and
RUN/SS2 are low, all LTC1438/LTC1439 functions are
shut down. Refer to the LTC1538-AUX/LTC1539 data
sheet for 5V keep-alive applications.
Comparator OV guards against transient overshoots > 7.5%
by turning off the top MOSFET and keeping it off until the
fault is removed.
10
Adaptive Power mode provides constant frequency operation down to approximately 1% of rated load current. This
results in an order of magnitude reduction of load current
before Burst Mode operation commences. Without the
small MOSFET (i.e., no Adaptive Power mode) the transition to Burst Mode operation is approximately 10% of
rated load current.
The transition to low current operation begins when comparator I2 detects current reversal and turns off the
bottom MOSFET. If the voltage across RSENSE does not
exceed the hysteresis of I2 (approximately 20mV) for one
full cycle, then on following cycles the top drive is routed
to the small MOSFET at the TGS1 (TGS2) pin and the BG1
(BG2) pin is disabled. This continues until an inductor
current peak exceeds 20mV/RSENSE or the ITH1 (ITH2)
voltage exceeds 0.6V, either of which causes drive to be
returned to the TGL1 (TGL2) pin on the next cycle.
Two conditions can force continuous synchronous operation, even when the load current would otherwise dictate
low current operation. One is when the common mode
voltage of the SENSE + 1 (SENSE + 2) and SENSE – 1
(SENSE – 2) pins are below 1.4V, and the other is when the
SFB1 pin is below 1.19V. The latter condition is used to
assist in secondary winding regulation, as described in the
Applications Information section.
LTC1438/LTC1439
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OPERATION
(Refer to Functional Diagram)
Frequency Synchronization
A Phase-Locked Loop (PLL) is available on the LTC1439
to allow the oscillator to be synchronized to an external
source connected to the PLLIN pin. The output of the
phase detector at the PLL LPF pin is also the control input
of the oscillator, which operates over a 0V to 2.4V range
corresponding to – 30% to 30% in frequency. When
locked, the PLL aligns the turn-on of the top MOSFET to
the rising edge of the synchronizing signal. When PLLIN
is left open, PLL LPF goes low, forcing the oscillator to
minimum frequency.
the AUXDR pin is above 9.5V to allow regulated 12V
VPP supplies to be easily implemented. When AUXDR is
below 8.5V an external feedback divider may be used to set
other output voltages. Taking the AUXON pin low shuts
down the auxiliary regulator providing a convenient logiccontrolled power supply.
The AUX block can be used as a comparator having its
inverting input tied to the internal 1.19V reference. The
AUXDR pin is used as the output and requires an external
pull-up to a supply of less than 8.5V in order to inhibit the
invoking of the internal resistive divider.
Power-On Reset
INTVCC / EXTVCC Power
The POR2 pin is an open drain output which pulls low
when the main regulator output voltage of the second
controller is out of regulation. When the output voltage
rises to within 7.5% of regulation, a timer is started which
releases POR2 after 216 (65536) oscillator cycles. This
function is not available on the LTC1438X.
Power for the top and bottom MOSFET drivers and most
of the other LTC1438/LTC1439 circuitry is derived from
the INTVCC pin. The bottom MOSFET driver supply is also
connected to INTVCC. When the EXTVCC pin is left open, an
internal 5V low dropout regulator supplies INTVCC power.
If EXTVCC is taken above 4.8V, the 5V regulator is turned
off and an internal switch is turned on to connect EXTVCC
to INTVCC. This allows the INTVCC power to be derived
from a high efficiency external source such as the output
of the regulator itself or a secondary winding, as described
in the Applications Information section.
Auxiliary Linear Regulator
The auxiliary linear regulator in the LTC1439 controls an
external PNP transistor for operation up to 500mA. A
precise internal AUXFB resistive divider is invoked when
11
LTC1438/LTC1439
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The basic LTC1439 application circuit is shown in Figure 1. External component selection is driven by the load
requirement and begins with the selection of RSENSE. Once
RSENSE is known, COSC and L can be chosen. Next, the
power MOSFETs and D1 are selected. Finally, CIN and COUT
are selected. The circuit shown in Figure 1 can be configured for operation up to an input voltage of 28V (limited by
the external MOSFETs).
A graph for selecting COSC vs frequency is given in Figure
2. As the operating frequency is increased the gate charge
losses will be higher, reducing efficiency (see Efficiency
Considerations). The maximum recommended switching
frequency is 400kHz. When using Figure 2 for
synchronizable applications, choose COSC corresponding
to a frequency approximately 30% below your center
frequency. (See Phase-Locked Loop and Frequency
Sychronization).
RSENSE Selection for Output Current
300
VPLLLPF = 0V
250
COSC VALUE (pF)
RSENSE is chosen based on the required output current.
The LTC1438/LTC1439 current comparator has a maximum threshold of 150mV/RSENSE and an input common
mode range of SGND to INTVCC. The current comparator
threshold sets the peak of the inductor current, yielding a
maximum average output current IMAX equal to the peak
value less half the peak-to-peak ripple current, ∆IL.
Allowing some margin for variations in the LTC1438/
LTC1439 and external component values yield:
200
150
100
50
0
100mV
RSENSE =
IMAX
The LTC1438/LTC1439 work well with values of RSENSE
from 0.005Ω to 0.2Ω.
COSC Selection for Operating Frequency
The LTC1438/LTC1439 use a constant frequency architecture with the frequency determined by an external
oscillator capacitor on COSC. Each time the topside MOSFET
turns on, the voltage on COSC is reset to ground. During the
on-time, COSC is charged by a fixed current plus an
additional current which is proportional to the output
voltage of the phase detector (VPLLLPF)(LTC1439 only).
When the voltage on the capacitor reaches 1.19V, COSC is
reset to ground. The process then repeats.
The value of COSC is calculated from the desired operating
frequency. Assuming the phase-locked loop has no external oscillator input (VPLLLPF = 0V):
 1.37(104 ) 
 − 11
COSC (pF) = 
 Frequency (kHz) 


12
0
100
200
300
400
OPERATING FREQUENCY (kHz)
500
LTC1435 • F02
Figure 2. Timing Capacitor Value
Inductor Value Calculation
The operating frequency and inductor selection are interrelated in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because of
MOSFET gate charge losses. In addition to this basic trade
off, the effect of inductor value on ripple current and low
current operation must also be considered.
The inductor value has a direct effect on ripple current. The
inductor ripple current ∆IL decreases with higher inductance or frequency and increases with higher VIN or VOUT:
∆IL =
 V

1
VOUT  1 – OUT 
(f)(L)
VIN 

LTC1438/LTC1439
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APPLICATIONS INFORMATION
Accepting larger values of ∆IL allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is ∆IL = 0.4(IMAX). Remember, the
maximum ∆IL occurs at the maximum input voltage.
The inductor value also has an effect on low current
operation. The transition to low current operation begins
when the inductor current reaches zero while the bottom
MOSFET is on. Lower inductor values (higher ∆IL) will
cause this to occur at higher load currents, which can
cause a dip in efficiency in the upper range of low current
operation. In Burst Mode operation (TGS1, 2 pins open),
lower inductance values will cause the burst frequency to
decrease.
The Figure 3 graph gives a range of recommended inductor values vs operating frequency and VOUT.
VOUT = 5.0V
VOUT = 3.3V
VOUT = 2.5V
50
INDUCTOR VALUE (µH)
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss core material for toroids, but it is more expensive than
ferrite. A reasonable compromise from the same manufacturer is Kool Mµ. Toroids are very space efficient,
especially when you can use several layers of wire. Because they generally lack a bobbin, mounting is more
difficult. However, designs for surface mount are available
which do not increase the height significantly.
Power MOSFET and D1 Selection
60
40
30
20
10
0
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that inductance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
0
100
150
200
250
50
OPERATING FREQUENCY (kHz)
300
1438 F03
Figure 3. Recommended Inductor Values
Inductor Core Selection
Once the value for L is known, the type of inductor must be
selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite, molypermalloy
or Kool Mµ® cores. Actual core loss is independent of core
size for a fixed inductor value, but it is very dependent on
inductance selected. As inductance increases, core losses
go down. Unfortunately, increased inductance requires more
turns of wire and therefore copper losses will increase.
Three external power MOSFETs must be selected for each
controller with the LTC1439: a pair of N-channel MOSFETs
for the top (main) switch and an N-channel MOSFET for
the bottom (synchronous) switch. Only one top MOSFET
is required for each LTC1438 controller.
To take advantage of the Adaptive Power output stage, two
topside MOSFETs must be selected. A large [low RSD(ON)]
MOSFET and a small [higher RDS(ON)] MOSFET are required. The large MOSFET is used as the main switch and
works in conjunction with the synchronous switch. The
smaller MOSFET is only enabled under low load current
conditions. The benefit of this is to boost low to midcurrent
efficiencies while continuing to operate at constant frequency. Also, by using the small MOSFET the circuit will
keep switching at a constant frequency down to lower
currents and delay skipping cycles.
The RDS(ON) recommended for the small MOSFET is
around 0.5Ω. Be careful not to use a MOSFET with an
RDS(ON) that is too low; remember, we want to conserve
gate charge. (A higher RDS(ON) MOSFET has a smaller gate
capacitance and thus requires less current to charge its
gate). For all LTC1438 and cost sensitive LTC1439 applications, the small MOSFET is not required. The circuit then
begins Burst Mode operation as the load current drops.
Kool Mµ is a registered trademark of Magnetics, Inc.
13
LTC1438/LTC1439
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The peak-to-peak drive levels are set by the INTVCC voltage. This voltage is typically 5V during start-up (see
EXTVCC Pin Connection). Consequently, logic level threshold MOSFETs must be used in most LTC1438/LTC1439
applications. The only exception is applications in which
EXTVCC is powered from an external supply greater than
8V (must be less than 10V), in which standard threshold
MOSFETs (VGS(TH) < 4V) may be used. Pay close attention
to the BVDSS specification for the MOSFETs as well; many
of the logic level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the "ON"
resistance RSD(ON), reverse transfer capacitance CRSS,
input voltage and maximum output current. When the
LTC1438/LTC1439 are operating in continuous mode the
duty cycles for the top and bottom MOSFETs are given by:
V
Main Switch Duty Cycle = OUT
VIN
Synchronous Switch Duty Cycle =
(VIN – VOUT)
VIN
The MOSFET power dissipations at maximum output
current are given by:
V
2
PMAIN = OUT (IMAX ) (1 + δ )RDS(ON) +
VIN
k (VIN)
1.85
(IMAX)(CRSS )( f)
V –V
2
PSYNC = IN OUT (IMAX ) (1 + δ ) RDS(ON)
VIN
where δ is the temperature dependency of RDS(ON) and k
is a constant inversely related to the gate drive current.
Both MOSFETs have I2R losses while the topside
N-channel equation includes an additional term for transition losses, which are highest at high input voltages. For
VIN < 20V the high current efficiency generally improves
with larger MOSFETs, while for VIN > 20V the transition
losses rapidly increase to the point that the use of a higher
RDS(ON) device with lower CRSS actual provides higher
14
efficiency. The synchronous MOSFET losses are greatest
at high input voltage or during a short circuit when the duty
cycle in this switch is nearly 100%. Refer to the Foldback
Current Limiting section for further applications information.
The term (1 + δ) is generally given for a MOSFET in the
form of a normalized RDS(ON) vs Temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs. CRSS is usually specified in the MOSFET
characteristics. The constant k = 2.5 can be used to
estimate the contributions of the two terms in the main
switch dissipation equation.
The Schottky diode D1 shown in Figure 1 serves two
purposes. During continuous synchronous operation, D1
conducts during the dead-time between the conduction of
the two large power MOSFETs. This prevents the body
diode of the bottom MOSFET from turning on and storing
charge during the dead-time, which could cost as much as
1% in efficiency. During low current operation, D1 operates in conjunction with the small top MOSFET to provide
an efficient low current output stage. A 1A Schottky is
generally a good compromise for both regions of operation due to the relatively small average current.
CIN and COUT Selection
In continuous mode, the source current of the top
N-channel MOSFET is a square wave of duty cycle VOUT/
VIN. To prevent large voltage transients, a low ESR input
capacitor sized for the maximum RMS current must be
used. The maximum RMS capacitor current is given by:
CIN Required IRMS ≈ IMAX
[VOUT (VIN – VOUT)]1/ 2
VIN
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Note that capacitor manufacturer’s ripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to
meet size or height requirements in the design. Always
consult the manufacturer if there is any question.
LTC1438/LTC1439
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The selection of COUT is driven by the required effective
series resistance (ESR). Typically, once the ESR requirement is satisified the capacitance is adequate for filtering.
The output ripple (∆VOUT) is approximated by:

1 
∆VOUT ≈ ∆IL  ESR +

4 fC OUT 

where f = operating frequency, COUT = output capacitance
and ∆IL = ripple current in the inductor. The output ripple
is highest at maximum input voltage since ∆IL increases
with input voltage. With ∆IL = 0.4IOUT(MAX) the output
ripple will be less than 100mV at max VIN assuming:
COUT Required ESR < 2RSENSE
Manufacturers such as Nichicon, United Chemicon and
Sanyo should be considered for high performance throughhole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo has the lowest (ESR size)
product of any aluminum electrolytic at a somewhat
higher price. Once the ESR requirement for COUT has been
met, the RMS current rating generally far exceeds the
IRIPPLE(P-P) requirement.
In surface mount applications multiple capacitors may
have to be paralleled to meet the ESR or RMS current
handling requirements of the application. Aluminum electrolytic and dry tantalum capacitors are both available in
surface mount configurations. In the case of tantalum, it is
critical that the capacitors are surge tested for use in
switching power supplies. An excellent choice is the AVX
TPS series of surface mount tantalums, available in case
heights ranging from 2mm to 4mm. Other capacitor types
include Sanyo OS-CON, Nichicon PL series and Sprague
593D and 595D series. Consult the manufacturer for other
specific recommendations.
INTVCC Regulator
An internal P-channel low dropout regulator produces 5V
at the INTVCC pin from the VIN supply pin. INTVCC powers
the drivers and internal circuitry within the LTC1438/
LTC1439. The INTVCC pin regulator can supply 40mA and
must be bypassed to ground with a minimum of 2.2µF
tantalum or low ESR electrolytic capacitor. Good bypassing is necessary to supply the high transient currents
required by the MOSFET gate drivers.
High input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maximum junction temperature rating for the LTC1438/LTC1439
to be exceeded. The IC supply current is dominated by the
gate charge supply current when not using an output
derived EXTVCC source. The gate charge is dependent on
operating frequency as discussed in the Efficiency Considerations section. The junction temperature can be estimated by using the equations given in Note 1 of the
Electrical Characteristics. For example, the LTC1439 is
limited to less than 21mA from a 30V supply:
TJ = 70°C + (21mA)(30V)(85°C/W) = 124°C
To prevent maximum junction temperature from being
exceeded, the input supply current must be checked while
operating in continuous mode at maximum VIN.
EXTVCC Connection
The LTC1438/LTC1439 contain an internal P-channel
MOSFET switch connected between the EXTV CC and
INTVCC pins. When the voltage applied to EXTVCC rises
above 4.8V, the internal regulator is turned off and an
internal switch closes, connecting the EXTV CC pin to the
INTVCC pin thereby supplying internal power to the IC. The
switch remains closed as long as the voltage applied to
EXTVCC remains above 4.5V. This allows the MOSFET
driver and control power to be derived from the output
during normal operation (4.8V < V OUT < 9V) and from the
internal regulator when the output is out of regulation
(start-up, short circuit). Do not apply greater than 10V to
the EXTVCC pin and ensure that EXTVCC ≤ VIN.
Significant efficiency gains can be realized by powering
INTVCC from the output, since the VIN current resulting
from the driver and control currents will be scaled by a
factor of Duty Cycle/Efficiency. For 5V regulators this
supply means connecting the EXTVCC pin directly to VOUT.
However, for 3.3V and other lower voltage regulators,
additional circuitry is required to derive INTVCC power
from the output.
The following list summarizes the four possible connections for EXTVCC:
1. EXTVCC left open (or grounded). This will cause INTVCC
to be powered from the internal 5V regulator resulting
15
LTC1438/LTC1439
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in an efficiency penalty of up to 10% at high input
voltages.
2. EXTVCC connected directly to VOUT. This is the normal
connection for a 5V regulator and provides the highest
efficiency.
3. EXTVCC connected to an output-derived boost network.
For 3.3V and other low voltage regulators, efficiency
gains can still be realized by connecting EXTVCC to an
output-derived voltage which has been boosted to
greater than 4.8V. This can be done with either the
inductive boost winding as shown in Figure 4a or the
capacitive charge pump shown in Figure 4b. The charge
pump has the advantage of simple magnetics.
4. EXTVCC connected to an external supply. If an external
supply is available in the 5V to 10V range (EXTVCC ≤
VIN) it may be used to power EXTVCC providing it is
LTC1438
LTC1439*
+
VIN
1N4148
CIN
VSEC
VIN
EXTVCC
TGL1
N-CH
TGS1*
R6
•
RSENSE
SGND
VOUT
•
+
N-CH
BG1
R5
COUT
PGND
1438 F04a
OPTIONAL EXTVCC
CONNECTION
5V ≤ VSEC ≤ 9V
*TGS1 ONLY AVAILABLE ON THE LTC1439
Figure 4a. Secondary Output Loop and EXTVCC Connection
+
1µF
LTC1438
LTC1439*
+
VIN
BAT85
0.22µF
BAT85
VN2222LL
BAT85
CIN
VIN
TGL1
TGS1*
EXTVCC
N-CH
L1
N-CH
BG1
RSENSE
VOUT
SW1
+
N-CH
COUT
PGND
1438 F04b
*TGS1 ONLY AVAILABLE ON THE LTC1439
Figure 4b. Capacitive Charge Pump for EXTVCC
16
Topside MOSFET Driver Supply (CB, DB)
External bootstrap capacitors CB connected to the BOOST
1 and BOOST 2 pins supply the gate drive voltages for the
topside MOSFETs. Capacitor CB in the Functional Diagram is charged through diode DB from INTVCC when the
SW1(SW2) pin is low. When one of the topside MOSFETs
is to be turned on, the driver places the CB voltage across
the gate source of the desired MOSFET. This enhances
the MOSFET and turns on the topside switch. The switch
node voltage SW1(SW2) rises to VIN and the BOOST
1(BOOST 2) pin follows. With the topside MOSFET on,
the boost voltage is above the input supply: VBOOST = VIN
+ VINTVCC. The value of the boost capacitor CB needs to
be 100 times that of the total input capacitance of the
topside MOSFET(s). The reverse breakdown on DB must
be greater than VIN(MAX).
1µF
N-CH
SW1
SFB1
+
L1
1:1
compatible with the MOSFET gate drive requirements.
When driving standard threshold MOSFETs, the external supply must be always present during operation to
prevent MOSFET failure due to insufficient gate drive.
Output Voltage Programming
The LTC1438/LTC1439 have pin selectable output voltage
programming. Controller 1 on the LTC1438-ADJ is a
dedicated adjustable controller. The output voltage is
selected by the VPROG1 (VPROG2) pin as follows on all of the
other parts:
VPROG1,2 = 0V
VPROG1,2 = INTVCC
VPROG2 = Open (DC)
VOUT1,2 = 3.3V
VOUT1,2 = 5V
VOUT2 = Adjustable
Except for the LTC1438-ADJ, the top of an internal resistive divider is connected to SENSE – 1 pin in Controller 1.
For fixed output voltage applications the SENSE – 1 pin is
connected to the output voltage as shown in Figure 5a.
When using an external resistive divider for an adjustable
regulator, the VPROG2 pin is left open (VPROG1 is internally
left open on the LTC1438-ADJ) and the VOSENSE2 pin is
connected to the feedback resistors as shown in Figure 5b.
The adjustable controller will force the externally attenuated output voltage to 1.19V.
LTC1438/LTC1439
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VPROG1
–
SENSE 1
LTC1438
LTC1439
GND: VOUT = 3.3V
INTVCC: VOUT = 5V
VOUT
+
COUT
SGND
1438 F05a
Figure 5a. LTC1438/LTC1439 Fixed Output Applications
1.19V ≤ VOUT ≤ 9V
VPROG2*
R2
OPEN (DC)
VOSENSE1,2
LTC1438
LTC1439
SGND
*LTC1439 ONLY
R1
100pF
( )
VOUT = 1.19V 1 +
1438 F05b
R2
R1
Figure 5b. LTC1438/LTC1439 Adjustable Applications
Power-On Reset Function (POR)
The power-on reset function (not available on the
LTC1438X) monitors the output voltage of the second
controller and turns on an open drain device when it is
below its properly regulated voltage. An external pull-up
resistor is required on the POR2 pin.
When power is first applied or when coming out of
shutdown, the POR2 output is held at ground. When the
output voltage rises above a level which is 5% below the
final regulated output value, an internal counter starts.
After this counter counts 216 (65536) clock cycles, the
POR2 pull-down device turns off.
The POR2 output will go low whenever the output voltage
of the second controller drops below 7.5% of its regulated
value for longer than approximately 30µs, signaling an
out-of-regulation condition. In shutdown, when RUN/SS1
and RUN/SS2 are both below 1.3V, the POR2 output is
pulled low even if the regulator’s output is held up by an
external source. The POR2 output is active during shutdown if VIN is powered.
Run/ Soft Start Function
The RUN/SS1 and RUN/SS2 pins each serve two functions. Each pin provides the soft start function and a
means to shut down each controller. Soft start reduces
surge currents from VIN by providing a gradual ramp-up of
the internal current limit. Power supply sequencing can
also be accomplished using this pin.
An internal 3µA current source charges up an external
capacitor CSS. When the voltage on RUN/SS1 (RUN/SS2)
reaches 1.3V the particular controller is permitted to start
operating. As the voltage on the pin continues to ramp
from 1.3V to 2.4V, the internal current limit is also ramped
at a proportional linear rate. The current limit begins at
approximately 50mV/RSENSE (at VRUN/SS = 1.3V) and ends
at 150mV/RSENSE (VRUN/SS ≥ 2.7V). The output current
thus ramps up slowly, reducing the starting surge current
required from the input power supply. If RUN/SS has been
pulled all the way to ground there is a delay before starting
of approximately 500ms/µF, followed by a similar time to
reach full current on that controller.
By pulling both RUN/SS controller pins below 1.3V, the
LTC1438/LTC1439 are put into low current shutdown
(IQ < 25µA). These pins can be driven directly from logic
as shown in Figure 6. Diode D1 in Figure 6 reduces the start
delay but allows CSS to ramp up slowly providing the soft
start function; this diode and CSS can be deleted if soft start
is not needed. Each RUN/SS pin has an internal 6V Zener
clamp (See Functional Diagram).
3.3V
OR 5V
RUN/SS1
(RUN/SS2)
RUN/SS1
(RUN/SS2)
D1
CSS
CSS
1438 F06
Figure 6. RUN/SS Pin Interfacing
Foldback Current Limiting
As described in Power MOSFET and D1 Selection, the
worst-case dissipation for either MOSFET occurs with a
short-circuited output, when the synchronous MOSFET
conducts the current limit value almost continuously. In
most applications this will not cause excessive heating,
even for extended fault intervals. However, when heat
sinking is at a premium or higher RDS(ON) MOSFETs are
being used, foldback current limiting should be added to
reduce the current in proportion to the severity of the fault.
Foldback current limiting is implemented by adding diode
DFB between the output and the ITH pin as shown in the
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Functional Diagram. In a hard short (VOUT = 0V) the current
will be reduced to approximately 25% of the maximum
output current. This technique may be used for all applications with regulated output voltages of 1.8V or greater.
Phase-Locked Loop and Frequency Synchronization
NORMALIZED FREQUENCY
The LTC1439 has an internal voltage-controlled oscillator
and phase detector comprising a phase-locked loop. This
allows the top MOSFET turn-on to be locked to the rising
edge of an external source. The frequency range of the
voltage-controlled oscillator is ±30% around the center
frequency fO.
1.3fO
fO
0.7fO
0
0.5
1.0
1.5
VPLLLPF (V)
2.5
2.0
1438 F07
Figure 7. Operating Frequency vs VPLLLPF
The phase detector used is an edge sensitive digital type
which provides zero degrees phase shift between the
external and internal oscillators. This type of phase detector will not lock up on input frequencies close to the
harmonics of the VCO center frequency. The PLL hold-in
range, ∆fH, is equal to the capture range, ∆fC:
∆fH = ∆fC = ±0.3 fO.
The output of the phase detector is a complementary pair
of current sources charging or discharging the external
filter network on the PLL LPF pin. A simplified block
diagram is shown in Figure 8.
If the external frequency fPLLIN is greater than the oscillator frequency f0SC, current is sourced continuously, pulling up the PLL LPF pin. When the external frequency is less
than f0SC, current is sunk continuously, pulling down the
PLL LPF pin. If the external and internal frequencies are the
same but exhibit a phase difference, the current sources
turn on for an amount of time corresponding to the phase
difference. Thus the voltage on the PLL LPF pin is adjusted
until the phase and frequency of the external and internal
oscillators are identical. At this stable operating point the
phase comparator output is open and the filter capacitor
EXTERNAL
FREQUENCY
RLP
2.4V
The value of COSC is calculated from the desired operating
frequency (fO). Assuming the phase-locked loop is locked
(VPLLLPF = 1.19V):


2.1(104 )
 − 11
COSC (pF) = 
 Frequency (kHz) 


PHASE
DETECTOR
PLL LPF*
PLLIN*
SGND
50k
DIGITAL
PHASE/
FREQUENCY
DETECTOR
COSC
OSC
Stating the frequency as a function of VPLLLPF and COSC:
( )
Frequency kHz =
1438 F08
*LTC1439 ONLY
8.4(108 )




1

COSC pF + 11 
+ 2000
V

 17µA + 18µA PLLLPF 



 2.4V 
[ ( ) ]
18
COSC
CLP
Figure 8. Phase-Locked Loop Block Diagram
LTC1438/LTC1439
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CLP holds the voltage. The LTC1439 PLLIN pin must be
driven from a low impedance such as a logic gate located
close to the pin. Any external attenuator used needs to be
referenced to SGND.
VIN
The loop filter components CLP, RLP smooth out the
current pulses from the phase detector and provide a
stable input to the voltage-controlled oscillator. The filter
components CLP and RLP determine how fast the loop
acquires lock. Typically, RLP =10k and CLP is 0.01µF to 0.1µF.
The low side of the filter needs to be connected to SGND.
SGND
The PLL LPF pin can be driven with external logic to obtain
a 1:1.9 frequency shift. The circuit shown in Figure 9 will
provide a frequency shift from fO to 1.9fO as the voltage on
VPLLLPF increases from OV to 2.4V. Do not exceed 2.4V on
VPLLLPF.
2.4V
MAX
3.3V OR 5V
PLL LPF
18k
LTC1435 • F09
Figure 9. Directly Driving PLL LPF Pin
Low-Battery Comparator
The LTC1438/LTC1439 have an on-chip low-battery comparator which can be used to sense a low-battery condition when implemented as shown in Figure 10. The resistor
divider R3/R4 sets the comparator trip point as follows:
 R4 
VLBITRIP = 1.19V 1 + 
 R3 
The divided down voltage at the negative (–) input to the
comparator is compared to an internal 1.19V reference. A
20mV hysteresis is built in to assure rapid switching. The
output is an open drain MOSFET and requires a pull-up
resistor. This comparator is not active when both the
RUN/SS1 and RUN/SS2 pins are low. Refer to the LTC1538/
LTC1539 for a comparator which is active during shutdown.
The low side of the resistive divider needs to be connected to
SGND.
R4
LTC1438/LTC1439
LBI
R3
LBO
–
+
1.19V REFERENCE
1438 F10
Figure 10. Low-Battery Comparator
SFB1 Pin Operation
When the SFB1 pin drops below its ground referenced
1.19V threshold, continuous mode operation is forced. In
continuous mode, the large N-channel main and synchronous switches are used regardless of the load on the main
output.
In addition to providing a logic input to force continuous
synchronous operation, the SFB1 pin provides a means to
regulate a flyback winding output. The use of a synchronous switch removes the requirement that power must be
drawn from the inductor primary in order to extract power
from the auxiliary winding. With the loop in continuous
mode, the auxiliary output may be loaded without regard
to the primary output load. The SFB1 pin provides a way
to force continuous synchronous operation as needed by
the flyback winding.
The secondary output voltage is set by the turns ratio of
the transformer in conjunction with a pair of external
resistors returned to the SFB1 pin as shown in Figure 4a.
The secondary regulated voltage VSEC in Figure 4a is given
by:
 R6
VSEC ≈ (N + 1)VOUT > 1.19V  1 + 
 R5
where N is the turns ratio of the transformer, and VOUT is
the main output voltage sensed by Sense– 1.
Auxiliary Regulator/Comparator
The auxiliary regulator/comparator can be used as a
comparator or low dropout regulator (by adding an external PNP pass device).
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When the voltage present at the AUXON pin is greater than
1.19V the regulator/comparator is on. The amplifier is
stable when operating as a low dropout regulator. This
same amplifier can be used as a comparator whose
inverting input is tied to the 1.19V reference.
The AUXDR pin is internally connected to an open drain
MOSFET which can sink up to 10mA. The voltage on
AUXDR determines whether or not an internal 12V resistive divider is connected to AUXFB as described below. A
pull-up resistor is required on AUXDR and the voltage
must not exceed 28V.
When used as a voltage comparator as shown in Figure
11c, the auxiliary block has a noninverting characteristic.
When AUXFB drops below 1.19V, the AUXDR pin will be
pulled low. A minimum current of 5µA is required to pull
up the AUXDR pin to 5V when used as a comparator output
in order to counteract a 1.5µA internal pull-down current
source.
SECONDARY
WINDING
1:N
The AUXFB pin is the feedback point of the regulator. An
internal resistor divider is available to provide a 12V output
by simply connecting AUXFB directly to the collector of the
external PNP. The internal resistive divider is switched in
when the voltage at AUXFB goes above 9.5V with 1V builtin hysteresis. For other output voltages, an external resistive divider is fed back to AUXFB as shown in Figure 11b.
The output voltage VOAUX is set as follows:
 R8 
VOAUX = 1.19V  1 +  < 8V AUXDR < 8.5V
 R7 
VOAUX = 12V
AUXDR ≥ 12V
20
R6
> 13V
R5
VSEC
With the addition of an external PNP pass device, a linear
regulator capable of supplying up to 0.5A is created. As
shown in Figure 11a, the base of the external PNP connects to the AUXDR pin together with a pull-up resistor.
The output voltage VOAUX at the collector of the external
PNP is sensed by the AUXFB pin.
The input voltage to the auxiliary regulator can be taken
from a secondary winding on the primary inductor as
shown in Figure 11a. In this application, the SFB1 pin
regulates the input voltage to the PNP regulator (see SFB1
Pin Operation) and should be set to approximately 1V to
2V above the required output voltage of the auxiliary
regulator. A Zener clamp diode may be required to keep the
secondary winding resultant output voltage under the 28V
AUXDR pin specification when the primary is heavily
loaded and the secondary is not.
( )
VSEC = 1.19V 1 +
AUXDR
R6
+
SFB1
R5
AUXFB
+
LTC1439
VOAUX
12V
10µF
AUXON
ON/OFF
1438 F11a
Figure 11a. 12V Output Auxiliary Regulator
Using Internal Feedback Resistors
SECONDARY
WINDING
1:N
( )
VSEC = 1.19V 1 +
R6
> VOAUX
R5
VSEC
VOAUX
AUXDR
R6
+
SFB1
R5
R8
AUXFB
+
AUXON
10µF
R7
LTC1439
ON/OFF
1438 F11b
Figure 11b. 5V Output Auxiliary Regulator Using
External Feedback Resistors
VPULL-UP < 7.5V
ON/OFF
INPUT
AUXON
AUXFB
LTC1439
–
AUXDR
OUTPUT
+
1.19V REFERENCE
1438 F11c
Figure 11c. Auxiliary Comparator Configuration
LTC1438/LTC1439
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Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1438/LTC1439 circuits. LTC1438/LTC1439
VIN current, INTVCC current, I2R losses and topside MOSFET
transition losses.
1. The VIN current is the DC supply current given in the
Electrical Characteristics which excludes MOSFET driver
and control currents. VIN current typically results in a
small (<< 1%) loss which increases with VIN.
2. INTVCC current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from INTVCC to ground. The resulting dQ/dt is a current
out of INTVCC which is typically much larger than the
control circuit current. In continuous mode, IGATECHG =
f(QT + QB), where QT and QB are the gate charges of the
topside and bottom side MOSFETs. It is for this reason
that the large topside and synchronous MOSFETs are
turned off during low current operation in favor of the
small topside MOSFET and external Schottky diode,
allowing efficient, constant-frequency operation at low
output currents.
By powering EXTVCC from an output-derived source,
the additional VIN current resulting from the driver and
control currents will be scaled by a factor of Duty Cycle/
Efficiency. For example, in a 20V to 5V application,
10mA of INTVCC current results in approximately 3mA
of VIN current. This reduces the midcurrent loss from
10% or more (if the driver was powered directly from
VIN) to only a few percent.
3. I2R losses are predicted from the DC resistances of the
MOSFET, inductor and current sense R. In continuous
mode the average output current flows through L and
RSENSE, but is “chopped” between the topside main
MOSFET and the synchronous MOSFET. If the two
MOSFETs have approximately the same RDS(ON), then
the resistance of one MOSFET can simply be summed
with the resistances of L and RSENSE to obtain I2R
losses. For example, if each RDS(ON) = 0.05Ω, RL =
0.15Ω and RSENSE = 0.05Ω, then the total resistance is
0.25Ω. This results in losses ranging from 3% to 10%
as the output current increases from 0.5A to 2A. I2R
losses cause the efficiency to roll off at high output
currents.
4. Transition losses apply only to the topside MOSFET(s)
and only when operating at high input voltages (typically
20V or greater). Transition losses can be estimated from:
Transition Loss ≈ 2.5(VIN)1.85(IMAX)(CRSS)(f)
Other losses including CIN and COUT ESR dissipative
losses, Schottky conduction losses during dead-time,
and inductor core losses, generally account for less
than 2% total additional loss.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in DC (resistive) load
current. When a load step occurs, VOUT shifts by an
amount equal to (∆ILOAD)(ESR) where ESR is the effective
series resistance of COUT. ∆ILOAD also begins to charge or
discharge COUT generating the feedback error signal which
forces the regulator loop to adapt to the current change
and return VOUT to its steady-state value. During this
recovery time VOUT can be monitored for overshoot or
ringing which would indicate a stability problem. The ITH
external components shown in Figure 1 will prove adequate compensation for most applications.
A second, more severe transient is caused by switching in
loads with large (> 1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
21
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switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25)(CLOAD).
Thus a 10µF capacitor would require a 250µs rise time,
limiting the charging current to about 200mA.
Automotive Considerations: Plugging into the
Cigarette Lighter
As battery-powered devices go mobile, there is a natural
interest in plugging into the cigarette lighter in order to
conserve or even recharge battery packs during operation.
But before you connect, be advised: you are plugging into
the supply from hell. The main battery line in an automobile is the source of a number of nasty potential transients,
including load dump, reverse battery and double battery.
Load dump is the result of a loose battery cable. When the
cable breaks connection, the field collapse in the alternator
can cause a positive spike as high as 60V which takes
several hundred milliseconds to decay. Reverse battery is
just what it says, while double battery is a consequence of
tow-truck operators finding that a 24V jump start cranks
cold engines faster than 12V.
The network shown in Figure 12 is the most straightforward approach to protect a DC/DC converter from the
ravages of an automotive battery line. The series diode
prevents current from flowing during reverse battery,
while the transient suppressor clamps the input voltage
during load dump. Note that the transient suppressor
should not conduct during double battery operation, but
must still clamp the input voltage below breakdown of the
converter. Although the LT1438/LT1439 has a maximum
input voltage of 36V, most applications will be limited to
30V by the MOSFET BVDSS.
12V
As a design example, assume VIN = 12V(nominal), VIN =
22V(max), VOUT = 3.3V, IMAX = 3A and f = 250kHz, RSENSE
and COSC can immediately be calculated:
RSENSE = 100mV/3A = 0.033Ω
COSC = [1.37(104)/250] – 11 ≈ 43pF
Refering to Figure 3, a 10µH inductor falls within the
recommended range. To check the actual value of the
ripple current the following equation is used :
 V

V
∆IL = OUT  1 – OUT 
(f)(L) 
VIN 
The highest value of the ripple current occurs at the
maximum input voltage:
∆IL =
 3.3V 
3.3V
 1–
 = 1.12A
250kHz(10µH)  22V 
The power dissipation on the topside MOSFET can be
easily estimated. Using a Siliconix Si4412DY for example;
RDS(ON) = 0.042Ω, CRSS = 100pF. At maximum input
voltage with T(estimated) = 50°C:
PMAIN =
[
]
3.3V 2
(3) 1+ (0.005)(50°C − 25°C ) (0.042Ω)
22V
+ 2.5(22V )
1.85
(3A)(100pF )(250kHz) = 122mW
The most stringent requirement for the synchronous
N-channel MOSFET is with VOUT = 0V (i.e. short circuit).
During a continuous short circuit, the worst-case dissipation rises to:
PSYNC = [ISC(AVG)]2(1 + δ)RDS(ON)
With the 0.033Ω sense resistor ISC(AVG) = 4A will result,
increasing the Si4412DY dissipation to 950mW at a die
temperature of 105°C.
50A IPK RATING
VIN
TRANSIENT VOLTAGE
SUPPRESSOR
GENERAL INSTRUMENT
1.5KA24A
Design Example
LTC1438
LTC1439
1438 F12
Figure 12. Automotive Application Protection
CIN will require an RMS current rating of at least 1.5A at
temperature and COUT will require an ESR of 0.03Ω for low
output ripple. The output ripple in continuous mode will be
highest at the maximum input voltage. The output voltage
ripple due to ESR is approximately:
VORIPPLE = RESR(∆IL) = 0.03Ω(1.12A) = 34mVP-P
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CLP
0.01µF
RLP
10k
CSS
0.1µF
1
1000pF
2
1000pF
CC1B
220pF
CC1A
1000pF
3
INTVCC
4
5
RC1
10k
COSC
100k 6
VIN
7
8
9
CC2B
470pF
10
CC2A
1000pF
RC2
10k
INTVCC
11
12
100pF
13
14
22pF
OUTPUT DIVIDER
REQUIRED WITH
VPROG OPEN
1000pF
10Ω
220pF
+
SENSE 1
PLL LPF
PLLIN
SENSE – 1 BOOST 1
TGL1
VPROG1
ITH1
SW1
POR2
TGS1
LTC1439
COSC
VIN
SGND
BG1
LBI
INTVCC
LBO
PGND
SFB1
ITH2
BG2
EXTVCC
VPROG2
TGS2
VOSENSE2
SW2
15
SENSE – 2
TGL2
16
SENSE+ 2 BOOST 2
17
CSS
0.1µF
RUN/SS1
18
RUN/SS2
AUXDR
AUXON
AUXFB
36
35
EXT
CLOCK
CB1
0.1µF
34
33
M1
+
32
CIN1
L1
31
M3
RSENSE1
30
DB1
29
28
M2
+
D1
COUT1
GROUND PLANE
27
26
25
+
4.7µF
D2
M5
+
VOUT1
VIN
–
–
–
VOUT2
RSENSE2
L2
M6
+
COUT2
DB2
24
+
+
23
+
22
M4
21
20
19
CIN2
CB2
0.1µF
10Ω
1438 F13
NOT ALL PINS CONNECTED FOR CLARITY
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 13. LTC1439 Physical Layout Diagram
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1438/LTC1439. These items are also illustrated graphically in the layout diagram of Figure 13. Check the following in your layout:
1. Are the high current power ground current paths using
or running through any part of signal ground? The
LTC1438/LTC1438X/LTC1439 ICs have their sensitive
pins on one side of the package. These pins include the
signal ground for the reference, the oscillator input, the
voltage and current sensing for both controllers and the
low-battery/comparator input. The signal ground area
used on this side of the IC must return to the bottom
plates of all of the output capacitors. The high current
power loops formed by the input capacitors and the
ground returns to the sources of the bottom N-channel
MOSFETs, anodes of the Schottky diodes and (–) plates
of CIN, should be as short as possible and tied through
a low resistance path to the bottom plates of the output
capacitors for the ground return.
2. Do the LTC1438/LTC1439 SENSE – 1 and VOSENSE2 pins
connect to the (+) plates of COUT? In adjustable applications, the resistive divider R1/R2 must be connected
between the (+) plate of COUT and signal ground and the
HF decoupling capacitor should be as close as possible
to the LTC1438/LTC1439.
23
LTC1438/LTC1439
U
W
U
U
APPLICATIONS INFORMATION
3. Are the SENSE – and SENSE + leads routed together with
minimum PC trace spacing? The filter capacitors between SENSE + 1 (SENSE + 2) and SENSE – 1 (SENSE – 2)
should be as close as possible to the LTC1438/LTC1439.
4. Do the (+) plates of CIN connect to the drains of the
topside MOSFETs as closely as possible? This capacitor
provides the AC current to the MOSFETs.
5. Is the INTVCC decoupling capacitor connected closely
between INTVCC and the power ground pin? This capacitor carries the MOSFET driver peak currents.
6. Keep the switching nodes, SW1 (SW2), away from
sensitive small-signal nodes. Ideally the switch nodes
should be placed at the furthest point from the LTC1438/
LTC1439.
7. Use a low impedance source such as a logic gate to drive
the PLLIN pin and keep the lead as short as possible.
PC Board Layout Suggestions
Switching power supply printed circuit layouts are certainly among the most difficult analog circuits to design.
The following suggestions will help to get a reasonably
close solution on the first try.
The output circuits, including the external switching
MOSFETs, inductor, secondary windings, sense resistor,
input capacitors and output capacitors all have very large
voltage and/or current levels associated with them. These
components and the radiated fields (electrostatic and/or
electromagnetic) must be kept away from the very sensitive control circuitry and loop compensation components
required for a current mode switching regulator.
The electrostatic or capacitive coupling problems can be
reduced by increasing the distance from the radiator,
typically a very large or very fast moving voltage signal.
The signal points that cause problems generally include:
the “switch” node, any secondary flyback winding voltage
and any nodes which also move with these nodes. The
switch, MOSFET gate and boost nodes move between VIN
and PGND each cycle with less than a 100ns transition
time. The secondary flyback winding output has an AC
signal component of – VIN times the turns ratio of the
transformer, and also has a similar < 100ns transition
time. The feedback control input signals need to have less
24
than a few millivolts of noise in order for the regulator to
perform properly. A rough calculation shows that 80dB of
isolation at 2MHz is required from the switch node for low
noise switcher operation. The situation is worse by a factor
of the turns ratio for the secondary flyback winding. Keep
these switch node related PC traces small and away from
the “quiet” side of the IC (not just above and below each
other on the opposite side of the board).
The electromagnetic or current loop induced feedback
problems can be minimized by keeping the high AC
current (transmitter) paths and the feedback circuit (receiver) path small and/or short. Maxwell’s equations are at
work here, trying to disrupt our clean flow of current and
voltage information from the output back to the controller
input. It is crucial to understand and minimize the susceptibility of the control input stage as well as the more
obvious reduction of radiation from the high current
output stage(s). An inductive transmitter depends upon
the frequency, current amplitude and the size of the
current loop to determine the radiation characteristic of
the generated field. The current levels are set in the output
stage once the input voltage, output voltage and inductor
value(s) have been selected. The frequency is set by the
output stage transition times. The only parameter over
which we have some control is the size of the antenna we
create on the PC board, i.e., the loop. A loop is formed with
the input capacitance, the top MOSFET, the Schottky diode
and the path from the Schottky diode’s ground connection
and the input capacitor’s ground connection. A second
path is formed when a secondary winding is used comprising the secondary output capacitor, the secondary
winding and the rectifier diode or switching MOSFET (in
the case of a synchronous approach). These “loops”
should be kept as small and tightly packed as possible in
order to minimize their “far field” radiation effects. The
radiated field produced is picked up by the current comparator input filter circuit(s), as well as by the voltage
feedback circuit(s). The current comparator’s filter capacitor placed across the sense pins attenuates the radiated current signal. It is important to place this capacitor
immediately adjacent to the IC sense pins. The voltage
sensing input(s) minimizes the inductive pickup component by using an input capacitance filter to SGND. The
capacitors in both case serve to integrate the induced
LTC1438/LTC1439
U
U
W
U
APPLICATIONS INFORMATION
current, reducing the susceptibility to both the “loop”
radiated magnetic fields and the transformer or inductor
leakage fields.
The capacitor on INTVCC acts as a reservoir to supply the
high transient currents to the bottom gates and to recharge the boost capacitor. This capacitor should be a
4.7µF tantalum capacitor placed as close as possible to the
INTVCC and PGND pins of the IC. Peak current driving the
MOSFET gates exceeds 1A. The PGND pin of the IC,
connected to this capacitor, should connect directly to the
lower plates of the output capacitors to minimize the AC
ripple on the INTVCC IC power supply.
The previous instructions will yield a PC layout which has
three separate ground regions returning separately to the
bottom plates of the output capacitors: a signal ground, a
MOSFET gate/INTVCC ground and the ground from the
input capacitors, Schottky diode and synchronous
MOSFET. In practice, this may produce a long power
ground path from the input and output capacitors. A long,
low resistance path between the input and output capacitor power grounds will not upset the operation of the
switching controllers as long as the signal and power
grounds from the IC pins does not “tap in” along this path.
U
TYPICAL APPLICATIONS
LTC1438 5V/3A, 3.3V/3.5A Regulator
0.1µF
VIN
5.2V
TO
28V
10Ω
100Ω
1000pF
1N4148
1000pF
10k
100Ω
1000pF
1
SENSE + 1 RUN/SS1
28
2
SENSE – 1 BOOST 1
27
3
INTVCC
4
220pF
56pF
POR2
5
6
470pF
1000pF
10k
56pF
221k, 1%
392k, 1%
220pF
0.1µF
10Ω
VPROG1
TGL1
ITH1
SW1
POR2
VIN
COSC
BG1
LTC1438
7
SGND
INTVCC
8
LBI
PGND
LBI
9
LBO
BG2
LBO
10
EXTVCC
SFB1
11
SW2
ITH2
1k
12
VOSENSE2
TGL2
22pF
13
SENSE – 2 BOOST 2
1000pF
14
SENSE+ 2 RUN/SS2
1N4148
10Ω
+
0.1µF
22µF
35V
+
22µF
35V
10µH
SUMIDA
M1 CDRH125-100MC
26
25
24
0.033Ω
VOUT1
5V
3A
CMDSH-3
+
23
0.1µF
22
+
M2
MBRS140T3
M4
MBRS140T3
4.7µF 16V
220µF
10V
21
20
19
VOUT1
CMDSH-3
GND
220µF
10V
+
VOUT2
3.3V
3.5A
0.033Ω
18
17
M3
16
15
10µH
SUMIDA
CDRH125-100MC
+
22µF
35V
+
22µF
35V
0.1µF
1438 TA01
VIN 5.2V TO 28V: SWITCHING FREQUENCY = 180kHz
5V, 3A/3.3V, 3.5A
M1 TO M4: Si4412DY
INPUT CAPACITORS ARE AVX-TPS SERIES
OUTPUT CAPACITORS ARE AVX-TPSV LEVEL II SERIES
25
LTC1438/LTC1439
U
TYPICAL APPLICATIONS
LTC1439 High Efficiency Low Noise 5V/3A, 3.3V/3.5A and 12V/200mA Regulator
VIN
6V TO 28V
CLP
0.01µF
RLP
10k
EXT
CLOCK
CSS1
0.1µF
1
1000pF
1000pF
CC1A
220pF
CC1
1000pF
INTVCC
RUN/SS1
PLL LPF
2
SENSE + 1
PLLIN
3
SENSE – 1 BOOST 1
4
5
POR2
RC1
10k
COSC
56pF
6
100k
7
8
110k, 1%
100pF
9
390k, 1%
CC2A
470pF
LBO
10
100k
CC2
1000pF
RC
10k
11
12
13
14
15
0.1µF
1000pF
16
17
CSS2
0.1µF
18
TGL1
VPROG1
SW1
ITH1
POR2
TGS1
LTC1439
COSC
VIN
SGND
BG1
LBI
INTVCC
LBO
PGND
BG2
SFB1
EXTVCC
ITH2
VPROG2
TGS2
VOSENSE2
SW2
SENSE – 2
TGL2
+
SENSE 2 BOOST 2
RUN/SS2
AUXON
AUXDR
AUXFB
+
36
35
0.1µF
CIN1
22µF
35V
×2
MBRS1100T3
34
33
M1
T1*
10µH
1:1.8
3.3µF +
25V
32
31
30
29
28
M3
+
D2
CMDSH-3
+
VOUT1
5V/3A
RSENSE1
0.03Ω
M2
D1
MBRS140T3
M5
D3
MBRS140T3
4.7µF 16V
COUT1
100µF
10V
×2
27
26
25
D4
CMDSH-3
24
+
COUT2
100µF
10V × 2
VOUT2
3.3V
3.5A
L2
10µH
M6
RSENSE2
0.03Ω
23
22
M4
CIN2
22µF
35V
×2
+
21
20
19
0.1µF
VOUT1
AUX ON/OFF
47k
R6
1M
1%
MMBT
2907
4.7µF
25V
+
VOUT2
12V
200mA
R5
90.9k
1%
1438 TA02
* T1 = DALE LPE-6562-A262 GAPPED E-CORE
BH ELECTRONICS 501-0657 GAPPED TOROID
M1, M2, M4, M5 = IRF7403
M3, M6 = IRLML2803
L2 = SUMIDA CDRH125-100MC
ALL INPUT OUTPUT CAPACITORS ARE AVX-TPS SERIES
26
CC2A
470pF
RC
10k
390k, 1%
COSC
56pF
220pF
OUTPUT DIVIDER 121k
REQUIRED WITH 1%
VPROG OPEN DC
100pF
100pF
* T1 = DALE LPE-6562-A214
M1, M2, M4, M5 = Si9410DY
M3, M6 = IRLML2803
L2 = SUMIDA CDRH125-100MC
110k
1%
RC1 10k
CC1, 1000pF
110k, 1%
1000pF
CC1A, 220pF
CSS1
0.1µF
CLP
0.01µF
100pF
100k
100k
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
PLLIN
PLL LPF
SENSE
TGL2
SW2
TGS2
EXTVCC
BG2
PGND
AUXDR
RUN/SS2
AUXFB
AUXON
SENSE+ 2 BOOST 2
–2
VOSENSE2
BG1
VIN
TGS1
SW1
TGL1
INTVCC
LTC1439
VPROG2
ITH2
SFB1
LBO
LBI
SGND
COSC
POR2
ITH1
VPROG1
SENSE – 1 BOOST 1
SENSE
+1
RUN/SS1
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
INPUT CAPACITORS ARE AVX-TPS SERIES
OUTPUT CAPACITORS ARE AVX-TPSV LEVEL II SERIES
10Ω
CSS2
0.1µF
10Ω
1000pF
22pF
CC2
1000pF
LBO
POR2
1000pF
100Ω
100Ω
AUX
ON/OFF
0.1µF
10Ω
+
M3
CIN1
22µF
35V
×2
0.1µF
D4
CMDSH-3
VOUT1
M6
4.7µF 16V
D2
CMDSH-3
0.1µF
EXT
CLOCK
M4
M5
M2
M1
RSENSE1
0.025Ω
3.3µF +
35V
L2
10µH
RSENSE2
0.02Ω
D3
MBRS140T3
D1
MBRS140T3
T1*
9µH
1:3.74
MBRS1100T3
+
+
RLP
10k
COUT2
470µF
6V
+
COUT1
330µF
10V
4.7µF
25V
+
47k
MMBT2907
ALTI
VOUT2
12V
200mA
CIN2
22µF
35V
×2
VOUT2
2.5V
5A
VOUT1
3.3V/4A
24V
+
LTC1439 High Effciency 3.3V/2.5V Regulator with Low Noise 12V Linear Regulator
1438 TA03
R5
100k
R6
1M
VIN
4V TO 28V
LTC1438/LTC1439
TYPICAL APPLICATIONS
27
U
R4
11.3k
1%
R3
100k
1%
D7
R12
1k
C6,
1000pF
INTVCC
R20
10Ω
LBO
LB1
POR2
R21
10Ω
C10, 1000pF
R7
221k
1%
C3
56pF
C2
1000pF
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
PLLIN
PLL LPF
R18
100Ω
TGL1
TGL2
SW2
AUXDR
RUN/SS2
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
R19
100Ω
+
M1B
C1, C21,
C22
22µF
35V
EA
M1A
C27
0.1µF
D4
CMDSH-3
C17, 22pF
M4
M5
L2
10µH
D3
MBRS140
D1
MBRS140
C28, C29
100µF
10V
EA
R5
4.7k
C16, C19
100µF
10V EA
R12
0.02Ω
1W
D6
CMDSH-3
R10
C18, 0.01µF
T1*
10µH
1:1.42
ALL INPUT AND OUTPUT CAPACITORS
ARE AVX-TPS SERIES
C24, 4.7µF, 16V
D2
CMDSH-3
C20
0.1µF
R8, 316k,1%
5V STANDBY
(LTC1539)
VOUT1
C23, 0.1µF
R22
10Ω
Q1 = MOTOROLA, MMBT2907ALT1
Q2 = ZETEX, FZT849
T1 = DALE, LPE-6562-A236
L2 = SUMIDA, CDRH127-100MC
AUXFB
AUXON
SENSE+ 2 BOOST 2
SENSE – 2
VOSENSE2
TGS2
EXTVCC
BG2
PGND
INTVCC
BG1
VIN
TGS1
LTC1439
SW1
LTC1539
VPROG2
ITH2
SFB1
LBO
LBI
SGND
COSC
POR2
ITH1
VPROG1
SENSE – 1 BOOST 1
SENSE + 1
RUN/SS1
C13
1000pF
VIN 5.2V TO 28V: SWITCHING FREQUENCY = 200kHz
5V/3A, 3.3V/3A, 2.9V/1A, 2.6A PEAK LINEAR, 12V/200mA
M1, M2, M4 AND M5 = SILICONIX, Si4412DY
M3, M6 = IRLML2803
M7 = INTERNATIONAL RECTIFIER, IRLL014
C11
0.1µF
C9
220pF
C7,
470pF
R15
10k
R13, 10k
C8
220pF
C14, 0.1µF
C15
33pF
+
+
28
+
+
C12
6.8nF
+
+
R2
100Ω
R9
47k
C25, C26
22µF
35V
EA
M7
C5
330µF
6.3V
R11
10Ω
Q1
2N2907
R1
27Ω
C4
3.3µF
25V
+
VOUT2
3.3V
3A
GND
VOUT1
5V
3A
VOUT3
12V
120mA
1438 TA04
OPTIONAL
330µF
6.3V
GND
VLDO
2.9V/1A
2.6A PEAK
VIN
(28V MAX)
Q2 ZETEX
FZT849
D5
MMBD914L
LTC1439/LTC1539 4-Output High Efficiency Low Noise 5V/3A, 3.3V/3A, 2.9V/2.6A, 12V/200mA Notebook Computer Power Supply
(See PCB LAYOUT AND FILM for Layout of Schematic)
LTC1438/LTC1439
TYPICAL APPLICATIONS
U
LTC1438/LTC1439
U
W
PCB LAYOUT A D FIL
Silkscreen Top
Copper Layer 1
Copper Layer 3
(Gerber files for this circuit board are available. Call LTC Marketing.)
Silkscreen Bottom
Copper Layer 2 Ground Plane
Copper Layer 4
29
LTC1438/LTC1439
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
G Package
28-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
0.397 – 0.407*
(10.07 – 10.33)
28 27 26 25 24 23 22 21 20 19 18 17 16 15
0.301 – 0.311
(7.65 – 7.90)
1 2 3 4 5 6 7 8 9 10 11 12 13 14
0.205 – 0.212**
(5.20 – 5.38)
0.068 – 0.078
(1.73 – 1.99)
0° – 8°
0.005 – 0.009
(0.13 – 0.22)
0.0256
(0.65)
BSC
0.022 – 0.037
(0.55 – 0.95)
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.002 – 0.008
(0.05 – 0.21)
0.010 – 0.015
(0.25 – 0.38)
G28 SSOP 0694
G Package
36-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
0.499 – 0.509*
(12.67 – 12.93)
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
0.301 – 0.311
(7.65 – 7.90)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
0.205 – 0.212**
(5.20 – 5.38)
0.068 – 0.078
(1.73 – 1.99)
0° – 8°
0.005 – 0.009
(0.13 – 0.22)
0.022 – 0.037
(0.55 – 0.95)
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
30
0.0256
(0.65)
BSC
0.010 – 0.015
(0.25 – 0.38)
0.002 – 0.008
(0.05 – 0.21)
G36 SSOP 1196
LTC1438/LTC1439
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
GW Package
36-Lead Plastic SSOP (Wide 0.300)
(LTC DWG # 05-08-1642)
0.602 – 0.612*
(15.290 – 15.544)
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
0.400 – 0.410
(10.160 – 10.414)
0.292 – 0.299**
(7.417 – 7.595)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
0.097 – 0.104
(2.463 – 2.641)
0.010 – 0.016 × 45°
(0.254 – 0.406)
0.090 – 0.094
(2.286 – 2.387)
0° – 8° TYP
0.031
0.012 – 0.017
(0.800)
(0.304 – 0.431)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.009 – 0.012
(0.231 – 0.305)
0.024 – 0.040
(0.610 – 1.016)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
0.005 – 0.012
(0.127 – 0.305)
GW36 SSOP 0795
31
LTC1438/LTC1439
U
TYPICAL APPLICATION
3.3V to 2.9V at 3A Low Noise Linear Regulator
5V
6.8nF
47k
27Ω
3.3V
Q1
MMBT2907ALTI
100Ω
ZETEX
FZT849
(SURFACE MOUNT)
10Ω
2.9V
3A
AUXDR
LTC1439
22pF
316k
1%
AUXFB
2.9V
ON/OFF
AUXON
221k
1%
+
330µF
×2
1438 TA05
RELATED PARTS
PART NUMBER
DESCRIPTION
LTC1142/LTC1142HV
Dual High Efficiency Synchronous Step-Down Switching Regulators
Dual Synchronous, VIN ≤ 20V
LTC1148/LTC1148HV
High Efficiency Step-Down Switching Regulator Controllers
Synchronous, VIN ≤ 20V
LTC1159
High Efficiency Step-Down Switching Regulator Controller
Synchronous, VIN ≤ 40V, For Logic Threshold FETs
LT 1375/LT1376
1.5A, 500kHz Step-Down Switching Regulators
High Frequency, Small Inductor, High Efficiency
Switchers, 1.5A Switch
LTC1430
High Power Step-Down Switching Regulator Controller
High Efficiency 5V to 3.3V Conversion at Up to 15A
LTC1435
Single High Efficiency Low Noise Switching Regulator Controller
®
LTC1436/LTC1436-PLL/ High Efficiency Low Noise Synchronous Step-Down
LTC1437
Switching Regulator Controllers
COMMENTS
16-Pin Narrow SO and SSOP Packages
Full-Featured Single Controller
LT1510
Constant-Voltage/Constant-Current Battery Charger
1.3A, Li-Ion, NiCd, NiMH, Pb-Acid Charger
LTC1538-AUX
Dual, Synchronous Controller with AUX Regulator
5V Standby in Shutdown
LTC1539
Dual High Efficiency, Low Noise, Synchronous Step-Down
Switching Regulator Controller
5V Standby in Shutdown
32
Linear Technology Corporation
14389fa LT/GP 0197 REV A 5K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977
 LINEAR TECHNOLOGY CORPORATION 1997
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