Fairchild FQD4P40 400v p-channel mosfet Datasheet

FQD4P40 / FQU4P40
January 2009
QFET
®
FQD4P40 / FQU4P40
400V P-Channel MOSFET
General Description
Features
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for electronic lamp ballast based on complimentary
half bridge.
•
•
•
•
•
•
•
-2.7A, -400V, RDS(on) = 3.1Ω @VGS = -10 V
Low gate charge ( typical 18 nC)
Low Crss ( typical 11 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
RoHS Compliant
S
!
D
G!
●
●
▶ ▲
G
S
D-PAK
FQD Series
G D S
Absolute Maximum Ratings
Symbol
VDSS
ID
●
I-PAK
FQU Series
!
D
TC = 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
FQD4P40 / FQU4P40
-400
- Continuous (TC = 100°C)
IDM
Drain Current
VGSS
Gate-Source Voltage
- Pulsed
(Note 1)
Units
V
-2.7
A
-1.71
A
-10.8
A
± 30
V
EAS
Single Pulsed Avalanche Energy
(Note 2)
260
mJ
IAR
Avalanche Current
(Note 1)
-2.7
A
EAR
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C) *
(Note 1)
5.0
-4.5
2.5
mJ
V/ns
W
50
0.4
-55 to +150
W
W/°C
°C
300
°C
dv/dt
PD
TJ, TSTG
TL
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
Parameter
Thermal Resistance, Junction-to-Case
Typ
--
Max
2.5
Units
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient *
--
50
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient
--
110
°C/W
* When mounted on the minimum pad size recommended (PCB Mount)
©2009 Fairchild Semiconductor Internationa
Rev. A2, January 2009
Symbol
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Units
-400
--
--
V
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = -250 µA
∆BVDSS
/
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = -250 µA, Referenced to 25°C
--
0.36
--
V/°C
-1
µA
µA
IDSS
Zero Gate Voltage Drain Current
VDS = -400 V, VGS = 0 V
--
--
VDS = -320 V, TC = 125°C
--
--
-10
IGSSF
Gate-Body Leakage Current, Forward
VGS = -30 V, VDS = 0 V
--
--
-100
nA
IGSSR
Gate-Body Leakage Current, Reverse
VGS = 30 V, VDS = 0 V
--
--
100
nA
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = -250 µA
-3.0
--
-5.0
V
RDS(on)
Static Drain-Source
On-Resistance
VGS = -10 V, ID = -1.35 A
--
2.44
3.1
Ω
gFS
Forward Transconductance
VDS = -50 V, ID = -1.35 A
--
2.5
--
S
--
520
680
pF
--
80
105
pF
--
11
15
pF
--
13
35
ns
(Note 4)
FQD4P40 / FQU4P40
Elerical Characteristics
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = -25 V, VGS = 0 V,
f = 1.0 MHz
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = -200 V, ID = -3.5 A,
RG = 25 Ω
(Note 4, 5)
VDS = -320 V, ID = -3.5 A,
VGS = -10 V
(Note 4, 5)
--
55
120
ns
--
35
80
ns
--
37
85
ns
--
18
23
nC
--
3.8
--
nC
--
9.4
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
-2.7
A
ISM
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = -2.7 A
Drain-Source Diode Forward Voltage
--
--
-10.8
A
VSD
--
--
-5.0
V
trr
Reverse Recovery Time
--
260
--
ns
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = -3.5 A,
dIF / dt = 100 A/µs
--
1.4
--
µC
(Note 4)
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 62mH, IAS = -2.7A, VDD = -50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ -3.5A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2009 Fairchild Semiconductor International
Rev. A2, January 2009
1
10
1
10
VGS
-15.0 V
-10.0 V
-8.0 V
-7.0 V
-6.5 V
-6.0 V
Bottom : -5.5 V
-I D, Drain Current [A]
0
10
-I D , Drain Current [A]
Top :
-1
10
※ Notes :
1. 250μs Pulse Test
2. TC = 25℃
-2
10
0
10
150℃
25℃
-55℃
0
10
1
10
10
2
4
8
10
Figure 2. Transfer Characteristics
8
1
10
VGS = - 10V
6
-I DR , Reverse Drain Current [A]
RDS(on) [ Ω ],
Drain-Source On-Resistance
6
-VGS , Gate-Source Voltage [V]
Figure 1. On-Region Characteristics
VGS = - 20V
4
2
※ Note : TJ = 25℃
0
※ Notes :
1. VDS = -50V
2. 250μs Pulse Test
-1
-1
10
-VDS, Drain-Source Voltage [V]
0
10
150℃
25℃
※ Notes :
1. VGS = 0V
2. 250μs Pulse Test
-1
0
3
6
9
12
10
0.0
0.5
1.0
-ID , Drain Current [A]
1200
Ciss
600
Coss
400
※ Notes :
1. VGS = 0 V
2. f = 1 MHz
Crss
0
-1
10
0
10
1
10
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2009 Fairchild Semiconductor International
2.5
3.0
12
10
-V GS , Gate-Source Voltage [V]
800
200
2.0
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
1000
1.5
-VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Capacitance [pF]
FQD4P40 / FQU4P40
Typical Characteristics
VDS = -80V
VDS = -200V
8
VDS = -320V
6
4
2
※ Note : ID = -3.5 A
0
0
2
4
6
8
10
12
14
16
18
20
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. A2, January 2009
(Continued)
2.5
1.2
2.0
1.1
RDS(ON) , (Normalized)
Drain-Source On-Resistance
-BV DSS , (Normalized)
Drain-Source Breakdown Voltage
FQD4P40 / FQU4P40
Typical Characteristics
1.0
※ Notes :
1. VGS = 0 V
2. ID = -250 μA
0.9
0.8
-100
-50
0
50
100
150
1.5
1.0
※ Notes :
1. VGS = -10 V
2. ID = -1.75 A
0.5
0.0
-100
200
-50
o
0
50
100
150
200
o
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
3.0
Operation in This Area
is Limited by R DS(on)
2.5
1
100 µs
-I D, Drain Current [A]
-I D, Drain Current [A]
10
1 ms
0
DC
10
-1
10
10 ms
※ Notes :
o
1. TC = 25 C
2.0
1.5
1.0
0.5
o
2. TJ = 150 C
3. Single Pulse
-2
10
0
1
10
2
10
0.0
25
3
10
10
50
150
※ N o te s :
1 . Z θ J C ( t ) = 2 . 5 ℃ /W M a x .
2 . D u ty F a c t o r , D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C( t )
0 .1
0 .0 5
-1
0 .0 2
0 .0 1
PDM
t1
Z
s in g le p u ls e
10
125
Figure 10. Maximum Drain Current
vs. Case Temperature
0 .2
10
100
D = 0 .5
0
θ JC
( t) , T h e r m a l R e s p o n s e
Figure 9. Maximum Safe Operating Area
10
75
TC, Case Temperature [℃]
-VDS, Drain-Source Voltage [V]
t2
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
Figure 11. Transient Thermal Response Curve
©2009 Fairchild Semiconductor International
Rev. A2, January 2009
FQD4P40 / FQU4P40
Gate Charge Test Circuit & Waveform
50KΩ
200nF
12V
VGS
Same Type
as DUT
Qg
-10V
300nF
VDS
VGS
Qgs
Qgd
DUT
-3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RG
RL
t on
VDD
VGS
td(on)
VGS
t off
tr
td(off)
tf
10%
DUT
-10V
VDS
90%
Unclamped Inductive Switching Test Circuit & Waveforms
VDS
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
tp
ID
RG
VDD
DUT
-10V
tp
©2009 Fairchild Semiconductor International
VDD
Time
VDS (t)
ID (t)
IAS
BVDSS
Rev. A2, January 2009
FQD4P40 / FQU4P40
Peak Diode Recovery dv/dt Test Circuit & Waveforms
+
VDS
DUT
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
I SD
( DUT )
Compliment of DUT
(N-Channel)
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
Body Diode Reverse Current
IRM
di/dt
IFM , Body Diode Forward Current
VDS
( DUT )
VSD
Body Diode
Forward Voltage Drop
VDD
Body Diode Recovery dv/dt
©2009 Fairchild Semiconductor International
Rev. A2, January 2009
FQD4P40 / FQU4P40
Mechanical Dimensions
TO-252 (DPAK) (FS PKG Code 36)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
millimeters
Part Weight per unit (gram): 0.33
©2009 Fairchild Semiconductor International
Rev. A2, January 2009
FQD4P40 / FQU4P40
Mechanical Dimensions
I - PAK
Dimensions in Millimeters
©2009 Fairchild Semiconductor International
Rev. A2, January 2009
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Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
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First Production
Datasheet contains preliminary data; supplementary data will be published at a later
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Semiconductor. The datasheet is for reference information only.
Rev. I37
©2009 Fairchild Semiconductor Corporation
Rev. A2. January 2009
FQD4P40 / FQU4P40
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