ONSEMI SM05T1

SM05T1 Series
Preferred Device
Transient Voltage
Suppressor Diode Array
SOT-23 Dual Common Anode Zeners
for ESD Protection
These dual monolithic silicon zener diodes are designed for
applications requiring transient overvoltage protection capability. They
are intended for use in voltage and ESD sensitive equipment such as
computers, printers, business machines, communication systems,
medical equipment and other applications. Their dual junction common
anode design protects two separate lines using only one package. These
devices are ideal for situations where board space is at a premium.
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PIN 1. CATHODE
2. CATHODE
3. ANODE
1
3
2
Specification Features:
• SOT-23 Package Allows Either Two Separate Unidirectional
1
2
5M
M
•
•
•
•
Configurations or a Single Bidirectional Configuration
Working Peak Reverse Voltage Range - 5.0 V to 12 V
Peak Power - 300 Watt (8 X 20 s)
Low Leakage
Flammability Rating UL 94 V-0
MARKING
DIAGRAM
3
SOT-23
CASE 318
STYLE 12
Mechanical Characteristics:
CASE: Void-free, transfer-molded, thermosetting plastic case
FINISH: Corrosion resistant finish, easily solderable
MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES:
260°C for 10 Seconds
Package designed for optimal automated board assembly
Small package size for high density applications
Available in 8 mm Tape and Reel
Use the Device Number to order the 7 inch/3,000 unit reel.
Replace the “T1” with “T3” in the Device Number to order the
13 inch/10,000 unit reel.
5M
M
= Device Code
= Date Code
ORDERING INFORMATION
Device
Package
Shipping
SM05T1
SOT-23
3000/Tape & Reel
SM12T1
SOT-23
3000/Tape & Reel
Preferred devices are recommended choices for future use
and best overall value.
 Semiconductor Components Industries, LLC, 2003
June, 2003 - Rev. 0
1
Publication Order Number:
SM05T1/D
SM05T1 Series
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Ppk
300
Watts
±15
±8.0
kV
IEC 61000-4-4 (EFT)
40
A
IEC 61000-4-5 (Lightening)
12
A
Peak Power Dissipation @ 20 s (Note 1)
@ TL ≤ 25°C
IEC 61000-4-2 (ESD)
Air
Contact
Total Power Dissipation on FR-5 Board (Note 2) @ TA = 25°C
Derate above 25°C
°PD°
225
1.8
°mW°
mW/°C
Thermal Resistance Junction to Ambient
RθJA
556
°C/W
Total Power Dissipation on Alumina Substrate (Note 3) @ TA = 25°C
Derate above 25°C
°PD°
300
2.4
°mW
mW/°C
Thermal Resistance Junction to Ambient
RθJA
417
°C/W
TJ, Tstg
- 55 to +150
°C
TL
260
°C
Junction and Storage Temperature Range
Lead Solder Temperature - Maximum (10 Second Duration)
1. Non-repetitive current pulse per Figure 3
2. FR-5 = 1.0 x 0.75 x 0.62 in.
3. Alumina = 0.4 x 0.3 x 0.024 in., 99.5% alumina
*Other voltages may be available upon request
ELECTRICAL CHARACTERISTICS
I
(TA = 25°C unless otherwise noted)
UNIDIRECTIONAL (Circuit tied to Pins 1 and 3 or 2 and 3)
Parameter
Symbol
IPP
Maximum Reverse Peak Pulse Current
VC
Clamping Voltage @ IPP
VRWM
IR
VBR
IT
VBR
IF
VC VBR VRWM
IR VF
IT
Working Peak Reverse Voltage
V
Maximum Reverse Leakage Current @ VRWM
Breakdown Voltage @ IT
Test Current
IPP
Maximum Temperature Coefficient of VBR
IF
Forward Current
VF
Forward Voltage @ IF
ZZT
Maximum Zener Impedance @ IZT
IZK
Reverse Current
ZZK
Maximum Zener Impedance @ IZK
Uni-Directional TVS
ELECTRICAL CHARACTERISTICS
VBR, Breakdown Voltage
VRWM
Device
Device
Marking
(Volts)
(A)
IT
(Volts)
IR @ VRWM
Min
VC @
IPP =
1 Amp
Max IPP
(Note 4)
Typical
Capacitance
(pF)
Max
mA
(Volts)
(Amps)
Pin 1 to 3
@ 0 Volts
SM05T1
5M
5
10
6.2
7.3
1.0
9.8
17
225
SM12T1
12M
12
1.0
13.3
15.75
1.0
19
12
95
4. 8 × 20 s pulse waveform per Figure 3
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2
SM05T1 Series
TYPICAL CHARACTERISTICS
300
PD, POWER DISSIPATION (mW)
PPP, PEAK PULSE POWER (kW)
10
1
0.1
0.01
250
ALUMINA SUBSTRATE
200
150
100
FR-5 BOARD
50
0
0.1
1
100
10
tp, PULSE DURATION (s)
1000
0
Figure 1. Non-Repetitive Peak Pulse Power
versus Pulse Time
90
C, CAPACITANCE (pF)
70
60
HALF VALUE IRSM/2 @ 20 s
50
40
30
75
100
125
TEMPERATURE (°C)
150
175
250
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 s
80
50
Figure 2. Steady State Power Derating Curve
PEAK VALUE IRSM @ 8 s
tr
tP
20
210
170
130
10
0
90
0
20
40
60
0
80
1
t, TIME (s)
Figure 3. 8 × 20 s Pulse Waveform
2
3
BIAS VOLTAGE (VOLTS)
90
80
70
60
50
40
30
20
10
0
0
4
Figure 4. Typical Diode Capacitance (SM05)
100
C, CAPACITANCE (pF)
% OF PEAK PULSE CURRENT
100
25
1
5
8
BIAS VOLTAGE (VOLTS)
12
Figure 5. Typical Diode Capacitance (SM12)
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3
5
SM05T1 Series
TYPICAL COMMON ANODE APPLICATIONS
A quad junction common anode design in a SOT-23
package protects four separate lines using only one package.
This adds flexibility and creativity to PCB design especially
when board space is at a premium. Two simplified examples
of TVS applications are illustrated below.
Computer Interface Protection
A
KEYBOARD
TERMINAL
PRINTER
ETC.
B
C
I/O
D
FUNCTIONAL
DECODER
GND
SM05T1
Series
Microprocessor Protection
VDD
VGG
ADDRESS BUS
RAM
ROM
DATA BUS
I/O
CPU
SM05T1
Series
CLOCK
CONTROL BUS
GND
SM05T1
Series
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4
SM05T1 Series
INFORMATION FOR USING THE SOT-23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the
total design. The footprint for the semiconductor packages
must be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
inches
mm
SOT-23
SOT-23 POWER DISSIPATION
SOLDERING PRECAUTIONS
The power dissipation of the SOT-23 is a function of the
drain pad size. This can vary from the minimum pad size
for soldering to a pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
determined by TJ(max), the maximum rated junction
temperature of the die, RθJA, the thermal resistance from
the device junction to ambient, and the operating
temperature, TA. Using the values provided on the data
sheet for the SOT-23 package, PD can be calculated as
follows:
PD =
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
• The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied
during cooling.
TJ(max) - TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature TA of 25°C,
one can calculate the power dissipation of the device which
in this case is 225 milliwatts.
PD = 150°C - 25°C = 225 milliwatts
556°C/W
The 556°C/W for the SOT-23 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 225
milliwatts. There are other alternatives to achieving higher
power dissipation from the SOT-23 package. Another
alternative would be to use a ceramic substrate or an
aluminum core board such as Thermal Clad. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
* * Soldering a device without preheating can cause
excessive thermal shock and stress which can result in
damage to the device.
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5
SM05T1 Series
PACKAGE DIMENSIONS
SOT-23
TO-236AB
CASE 318-08
ISSUE AH
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
4. 318−03 AND −07 OBSOLETE, NEW STANDARD
318−08.
A
L
3
1
V
B S
2
DIM
A
B
C
D
G
H
J
K
L
S
V
G
C
D
H
J
K
INCHES
MIN
MAX
0.1102 0.1197
0.0472 0.0551
0.0350 0.0440
0.0150 0.0200
0.0701 0.0807
0.0005 0.0040
0.0034 0.0070
0.0140 0.0285
0.0350 0.0401
0.0830 0.1039
0.0177 0.0236
MILLIMETERS
MIN
MAX
2.80
3.04
1.20
1.40
0.89
1.11
0.37
0.50
1.78
2.04
0.013
0.100
0.085
0.177
0.35
0.69
0.89
1.02
2.10
2.64
0.45
0.60
STYLE 12:
PIN 1. CATHODE
2. CATHODE
3. ANODE
Thermal Clad is a registered trademark of the Bergquist Company.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make
changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada
Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada
Email: [email protected]
JAPAN: ON Semiconductor, Japan Customer Focus Center
2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051
Phone: 81-3-5773-3850
ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local
Sales Representative.
N. American Technical Support: 800-282-9855 Toll Free USA/Canada
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6
SM05T1/D